From nobody Tue May 21 20:44:11 2024 Received: from forward501b.mail.yandex.net (forward501b.mail.yandex.net [178.154.239.145]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9414231A89; Fri, 19 Apr 2024 12:45:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.154.239.145 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713530721; cv=none; b=oabqgdCclQ5uevPtdH+VZ5XJ8fGQojDJ1xJX1830dO9S9I2mOkhUIGbG26a+1a2mCgWOt1cWxn0FwNzZELHRkECP7pewYDCWNMQZSotZAZTgEFsXZitc/cNJ3696nG1b2a5432VeU/4Iz96eXTTpy9I7hLjlPWPRrRI9OI0Pqqo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713530721; c=relaxed/simple; bh=GLSI6vHuSNFBB34OPzNk3wEjWhkccNqqJfO1tOkQDI0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=fzz4w5s+hNqYBStRtSBYF17uD9Dd04kZNKAKkt9ttZLPGUR0BbcmtqWhtHAQkv6ptiqrxo+znnpM41l1TIpuTuBKjxk+qmh+SXjO2A1kMFWSsEoCi2H45XCJjVR+5CK+LWpIirTnOv+ypLSXji2Ay/NkP/6sF4qoWjOJfEs/50M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ya.ru; spf=pass smtp.mailfrom=ya.ru; dkim=pass (1024-bit key) header.d=ya.ru header.i=@ya.ru header.b=oUV7whNE; arc=none smtp.client-ip=178.154.239.145 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ya.ru Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ya.ru Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ya.ru header.i=@ya.ru header.b="oUV7whNE" Received: from mail-nwsmtp-smtp-production-main-45.myt.yp-c.yandex.net (mail-nwsmtp-smtp-production-main-45.myt.yp-c.yandex.net [IPv6:2a02:6b8:c12:5003:0:640:89b0:0]) by forward501b.mail.yandex.net (Yandex) with ESMTPS id 550326126A; Fri, 19 Apr 2024 15:45:15 +0300 (MSK) Received: by mail-nwsmtp-smtp-production-main-45.myt.yp-c.yandex.net (smtp/Yandex) with ESMTPSA id 8jF8ngSo6uQ0-IZwFvvke; Fri, 19 Apr 2024 15:45:14 +0300 X-Yandex-Fwd: 1 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ya.ru; s=mail; t=1713530714; bh=f98sLx3wwNNPDW5Jc75hbRxEbuMeLdbQ4VYugBELXm4=; h=Message-Id:Date:In-Reply-To:Cc:Subject:References:To:From; b=oUV7whNEBBe6e8m3ujuX66H4sBQ1TiYG4dUPcBybKpt4vqAV49alZWfrZe44oGfu1 dITVJ8/lCmu6S8LtrVtfldRZIZl0woNnBexnBtdZtgsTeVcAj2NlqlRaTm54FdrqJz 2oNdIId3GA08Hr6UfQPfa7fduM3T9IEdUSGeGpak= Authentication-Results: mail-nwsmtp-smtp-production-main-45.myt.yp-c.yandex.net; dkim=pass header.i=@ya.ru From: Konstantin Pugin To: Cc: Konstantin Pugin , Greg Kroah-Hartman , Jiri Slaby , Hugo Villeneuve , Andy Shevchenko , Lech Perczak , =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , Thomas Gleixner , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org Subject: [PATCH v4 1/3] serial: sc16is7xx: announce support of SER_RS485_RTS_ON_SEND Date: Fri, 19 Apr 2024 15:45:01 +0300 Message-Id: <20240419124506.1531035-2-rilian.la.te@ya.ru> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240419124506.1531035-1-rilian.la.te@ya.ru> References: <20240419124506.1531035-1-rilian.la.te@ya.ru> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Konstantin Pugin The hardware supports both RTS_ON_SEND and RTS_AFTER_SEND modes, but after the commit 4afeced55baa ("serial: core: fix sanitizing check for RTS settings") we always end up with SER_RS485_RTS_AFTER_SEND set and always write to the register field SC16IS7XX_EFCR_RTS_INVERT_BIT, which breaks some hardware using these chips. Fixes: 267913ecf737 ("serial: sc16is7xx: Fill in rs485_supported") Signed-off-by: Konstantin Pugin --- drivers/tty/serial/sc16is7xx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c index 03cf30e20b75..dfcc804f558f 100644 --- a/drivers/tty/serial/sc16is7xx.c +++ b/drivers/tty/serial/sc16is7xx.c @@ -1449,7 +1449,7 @@ static int sc16is7xx_setup_mctrl_ports(struct sc16is7= xx_port *s, } =20 static const struct serial_rs485 sc16is7xx_rs485_supported =3D { - .flags =3D SER_RS485_ENABLED | SER_RS485_RTS_AFTER_SEND, + .flags =3D SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND | SER_RS485_RTS_AFTE= R_SEND, .delay_rts_before_send =3D 1, .delay_rts_after_send =3D 1, /* Not supported but keep returning -EINVAL = */ }; --=20 2.34.1 From nobody Tue May 21 20:44:11 2024 Received: from forward501b.mail.yandex.net (forward501b.mail.yandex.net [178.154.239.145]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 078538565E; Fri, 19 Apr 2024 12:45:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.154.239.145 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713530723; cv=none; b=RP1M6IZu7x6VVKraP3xENMhvh1aDZpCOYOfjqZ1knQ8wuNb0vZxEUU2dtODK5JNZDZ1thjyyeh0Lc7KQRkGggStk77E2dsRve6iPVR49cPSvT84i1NUapumRsRcR6Zcjhl5OwUWN98JvAW+IarG/IbViGs1ynaVvMxgcEDIrdww= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713530723; c=relaxed/simple; bh=FOi6eJPUFSojRtF9P/XwjqEpVwed2EL1xlarcDukTeg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=DPfUp6lPZ1gyNxzrYVtE5NbTKg6NzUeJA4lPX50BvnvaW1/iZNMQH75uqJatZIz4PrKsv7689vHefPXPt4i3MvcbBRg9xh4mkRJ5Q2P4QWBGXTyJY5j146CQ3YLrrrgJhZ3Gzs93sHjWvFS01VOJt8Lx8EvEiaXaecA0xjQUINE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ya.ru; spf=pass smtp.mailfrom=ya.ru; dkim=pass (1024-bit key) header.d=ya.ru header.i=@ya.ru header.b=lXDFXnHr; arc=none smtp.client-ip=178.154.239.145 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ya.ru Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ya.ru Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ya.ru header.i=@ya.ru header.b="lXDFXnHr" Received: from mail-nwsmtp-smtp-production-main-45.myt.yp-c.yandex.net (mail-nwsmtp-smtp-production-main-45.myt.yp-c.yandex.net [IPv6:2a02:6b8:c12:5003:0:640:89b0:0]) by forward501b.mail.yandex.net (Yandex) with ESMTPS id 6D3A6611D2; Fri, 19 Apr 2024 15:45:20 +0300 (MSK) Received: by mail-nwsmtp-smtp-production-main-45.myt.yp-c.yandex.net (smtp/Yandex) with ESMTPSA id 8jF8ngSo6uQ0-YxpMdtGo; Fri, 19 Apr 2024 15:45:19 +0300 X-Yandex-Fwd: 1 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ya.ru; s=mail; t=1713530719; bh=GaYIntdqsvXpjyEkkhoOihijbTv7eiJ72X4WWAqXMnU=; h=Message-Id:Date:In-Reply-To:Cc:Subject:References:To:From; b=lXDFXnHrDvfCgYIfU5IbNUSfYEs1Ri/4rRWnMVsXIH81AvoWgf5wQSu/J0m7a26NZ VWD/eZgUzIYZNgxLNMDXs9DEFiJ30ng+3JB3tg1GfH6W3QMR2V13tpBVqMhLW6AY6b hndVSItWLK6DzlliUQbPRHxMMk8SX97o5I7hUYXY= Authentication-Results: mail-nwsmtp-smtp-production-main-45.myt.yp-c.yandex.net; dkim=pass header.i=@ya.ru From: Konstantin Pugin To: Cc: Konstantin Pugin , Vladimir Zapolskiy , Greg Kroah-Hartman , Jiri Slaby , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Hugo Villeneuve , Andy Shevchenko , Lech Perczak , =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , Thomas Gleixner , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v4 2/3] dt-bindings: sc16is7xx: Add compatible line for XR20M1172 UART Date: Fri, 19 Apr 2024 15:45:02 +0300 Message-Id: <20240419124506.1531035-3-rilian.la.te@ya.ru> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240419124506.1531035-1-rilian.la.te@ya.ru> References: <20240419124506.1531035-1-rilian.la.te@ya.ru> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Konstantin Pugin Add EXAR XR20M1172 UART compatible line into devicetree documentation. Reviewed-by: Vladimir Zapolskiy Signed-off-by: Konstantin Pugin Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/serial/nxp,sc16is7xx.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/serial/nxp,sc16is7xx.yaml b/= Documentation/devicetree/bindings/serial/nxp,sc16is7xx.yaml index 5dec15b7e7c3..c4bedf23368b 100644 --- a/Documentation/devicetree/bindings/serial/nxp,sc16is7xx.yaml +++ b/Documentation/devicetree/bindings/serial/nxp,sc16is7xx.yaml @@ -12,6 +12,7 @@ maintainers: properties: compatible: enum: + - exar,xr20m1172 - nxp,sc16is740 - nxp,sc16is741 - nxp,sc16is750 --=20 2.34.1 From nobody Tue May 21 20:44:11 2024 Received: from forward501b.mail.yandex.net (forward501b.mail.yandex.net [178.154.239.145]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 799EF8529A; Fri, 19 Apr 2024 12:45:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.154.239.145 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713530737; cv=none; b=u0alDhqcYW8Ra7LonZVVrfiZXmUPAiLhAQ03dUCUQ+Aa4rnnRWc1N316nWhXoB/7tNZ8PxfqQI6+2+eWEEfXgkOw4tDPntA+uX7w3FuLXu5Vd07Ozw2u/7S0tla97N4NwQqVnAm/Hn6v90/WQO9Q3WFHUJxYPvDlzVrUcU8e2HU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713530737; c=relaxed/simple; bh=avkxOss0awU4WVoPTx4yQxuH9b70RE4XM5Fo/C/r6Ww=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=fgQrtDUcIkHAW4wZoUv6WV2vsNy4dQdJPR0j35O7p1HtLwNjr1QlNR3faLveHXa/FylnGoQuam8Ynlg79Q4iHt18C7a8VQr2ojksd8t0AheFgtwx89JMX4Vt+m1GR00smYJLNwoKR9CZg7Ew0VkWQF1Bj6DPndXZ3cidneRaL1k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ya.ru; spf=pass smtp.mailfrom=ya.ru; dkim=pass (1024-bit key) header.d=ya.ru header.i=@ya.ru header.b=hGIDb/ut; arc=none smtp.client-ip=178.154.239.145 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ya.ru Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ya.ru Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ya.ru header.i=@ya.ru header.b="hGIDb/ut" Received: from mail-nwsmtp-smtp-production-main-45.myt.yp-c.yandex.net (mail-nwsmtp-smtp-production-main-45.myt.yp-c.yandex.net [IPv6:2a02:6b8:c12:5003:0:640:89b0:0]) by forward501b.mail.yandex.net (Yandex) with ESMTPS id CD3B56131A; Fri, 19 Apr 2024 15:45:33 +0300 (MSK) Received: by mail-nwsmtp-smtp-production-main-45.myt.yp-c.yandex.net (smtp/Yandex) with ESMTPSA id 8jF8ngSo6uQ0-hLmdNGQz; Fri, 19 Apr 2024 15:45:32 +0300 X-Yandex-Fwd: 1 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ya.ru; s=mail; t=1713530732; bh=UjeOAqIADE79dzRdgyeAV0HN7jCvBDh2vqGVzlNRJVs=; h=Message-Id:Date:In-Reply-To:Cc:Subject:References:To:From; b=hGIDb/utJBG3kd+A8uYnd5cA3RdvQMtS4BNrVW1xsQcBHlBI6ND5ebQg/cK4bISGm hW0Rcni1+DBE+p5NZf7zbjzg0xVhtWXg7skT7ON6BzjjvCUr+xRIQ9zbNWWhW4BGvM KRsq81UR25Oh1I/0R+ICOtov1N+hGyPot1iqA2N0= Authentication-Results: mail-nwsmtp-smtp-production-main-45.myt.yp-c.yandex.net; dkim=pass header.i=@ya.ru From: Konstantin Pugin To: Cc: Konstantin Pugin , Greg Kroah-Hartman , Jiri Slaby , Max Filippov , Jonathan Corbet , Jacky Huang , Anup Patel , Herve Codina , Manikanta Guntupalli , Conor Dooley , Hugo Villeneuve , Andy Shevchenko , Lech Perczak , =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , Thomas Gleixner , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org Subject: [PATCH v4 3/3] serial: sc16is7xx: add support for EXAR XR20M1172 UART Date: Fri, 19 Apr 2024 15:45:03 +0300 Message-Id: <20240419124506.1531035-4-rilian.la.te@ya.ru> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240419124506.1531035-1-rilian.la.te@ya.ru> References: <20240419124506.1531035-1-rilian.la.te@ya.ru> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Konstantin Pugin XR20M1172 register set is mostly compatible with SC16IS762, but it has a support for additional division rates of UART with special DLD register. So, add handling this register by appropriate devicetree bindings. Signed-off-by: Konstantin Pugin --- drivers/tty/serial/Kconfig | 18 +++++---- drivers/tty/serial/sc16is7xx.c | 60 ++++++++++++++++++++++++++++-- drivers/tty/serial/sc16is7xx_i2c.c | 1 + drivers/tty/serial/sc16is7xx_spi.c | 1 + 4 files changed, 68 insertions(+), 12 deletions(-) diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig index 4fdd7857ef4d..4380bfe7dfff 100644 --- a/drivers/tty/serial/Kconfig +++ b/drivers/tty/serial/Kconfig @@ -1029,15 +1029,17 @@ config SERIAL_SC16IS7XX_CORE select SERIAL_SC16IS7XX_SPI if SPI_MASTER select SERIAL_SC16IS7XX_I2C if I2C help - Core driver for NXP SC16IS7xx UARTs. + Core driver for NXP SC16IS7xx-compatible UARTs. Supported ICs are: - - SC16IS740 - SC16IS741 - SC16IS750 - SC16IS752 - SC16IS760 - SC16IS762 + NXP: + SC16IS740 + SC16IS741 + SC16IS750 + SC16IS752 + SC16IS760 + SC16IS762 + EXAR: + XR20M1172 =20 The driver supports both I2C and SPI interfaces. =20 diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c index dfcc804f558f..b2aa2e487c84 100644 --- a/drivers/tty/serial/sc16is7xx.c +++ b/drivers/tty/serial/sc16is7xx.c @@ -10,6 +10,7 @@ #undef DEFAULT_SYMBOL_NAMESPACE #define DEFAULT_SYMBOL_NAMESPACE SERIAL_NXP_SC16IS7XX =20 +#include #include #include #include @@ -68,6 +69,7 @@ /* Special Register set: Only if ((LCR[7] =3D=3D 1) && (LCR !=3D 0xBF)) */ #define SC16IS7XX_DLL_REG (0x00) /* Divisor Latch Low */ #define SC16IS7XX_DLH_REG (0x01) /* Divisor Latch High */ +#define XR20M117X_DLD_REG (0x02) /* Divisor Fractional Register */ =20 /* Enhanced Register set: Only if (LCR =3D=3D 0xBF) */ #define SC16IS7XX_EFR_REG (0x02) /* Enhanced Features */ @@ -221,6 +223,20 @@ #define SC16IS7XX_TCR_RX_HALT(words) ((((words) / 4) & 0x0f) << 0) #define SC16IS7XX_TCR_RX_RESUME(words) ((((words) / 4) & 0x0f) << 4) =20 +/* + * Divisor Fractional Register bits (EXAR extension) + * EXAR hardware is mostly compatible with SC16IS7XX, but supports additio= nal feature: + * 4x and 8x divisor, instead of default 16x. It has a special register to= program it. + * Bits 0 to 3 is fractional divisor, it used to set value of last 16 bits= of + * uartclk * (16 / divisor) / baud, in case of default it will be uartclk = / baud. + * Bits 4 and 5 used as switches, and should not be set to 1 simultaneousl= y. + */ + +#define XR20M117X_DLD_16X 0 +#define XR20M117X_DLD_DIV_MASK GENMASK(3, 0) +#define XR20M117X_DLD_8X BIT(4) +#define XR20M117X_DLD_4X BIT(5) + /* * TLR register bits * If TLR[3:0] or TLR[7:4] are logical 0, the selectable trigger levels vi= a the @@ -523,6 +539,13 @@ const struct sc16is7xx_devtype sc16is762_devtype =3D { }; EXPORT_SYMBOL_GPL(sc16is762_devtype); =20 +static const struct sc16is7xx_devtype xr20m1172_devtype =3D { + .name =3D "XR20M1172", + .nr_gpio =3D 8, + .nr_uart =3D 2, +}; +EXPORT_SYMBOL_GPL(sc16is762_devtype); + static bool sc16is7xx_regmap_volatile(struct device *dev, unsigned int reg) { switch (reg) { @@ -555,18 +578,43 @@ static bool sc16is7xx_regmap_noinc(struct device *dev= , unsigned int reg) return reg =3D=3D SC16IS7XX_RHR_REG; } =20 +static bool sc16is7xx_has_dld(struct device *dev) +{ + struct sc16is7xx_port *s =3D dev_get_drvdata(dev); + + if (s->devtype =3D=3D &xr20m1172_devtype) + return true; + return false; +} + static int sc16is7xx_set_baud(struct uart_port *port, int baud) { struct sc16is7xx_one *one =3D to_sc16is7xx_one(port, port); - u8 lcr; + unsigned long clk =3D port->uartclk, div, div16; + bool has_dld =3D sc16is7xx_has_dld(port->dev); + u8 dld_mode =3D XR20M117X_DLD_16X; u8 prescaler =3D 0; - unsigned long clk =3D port->uartclk, div =3D clk / 16 / baud; + u8 divisor =3D 16; + u8 lcr; + + if (has_dld && DIV_ROUND_CLOSEST(clk, baud) < 16) + divisor =3D rounddown_pow_of_two(DIV_ROUND_CLOSEST(clk, baud)); + + div16 =3D (clk * 16) / divisor / baud; + div =3D div16 / 16; =20 if (div >=3D BIT(16)) { prescaler =3D SC16IS7XX_MCR_CLKSEL_BIT; div /=3D 4; } =20 + /* Count additional divisor for EXAR devices */ + if (divisor =3D=3D 8) + dld_mode =3D XR20M117X_DLD_8X; + if (divisor =3D=3D 4) + dld_mode =3D XR20M117X_DLD_4X; + dld_mode |=3D FIELD_PREP(XR20M117X_DLD_DIV_MASK, div16); + /* Enable enhanced features */ sc16is7xx_efr_lock(port); sc16is7xx_port_update(port, SC16IS7XX_EFR_REG, @@ -587,12 +635,14 @@ static int sc16is7xx_set_baud(struct uart_port *port,= int baud) regcache_cache_bypass(one->regmap, true); sc16is7xx_port_write(port, SC16IS7XX_DLH_REG, div / 256); sc16is7xx_port_write(port, SC16IS7XX_DLL_REG, div % 256); + if (has_dld) + sc16is7xx_port_write(port, XR20M117X_DLD_REG, dld_mode); regcache_cache_bypass(one->regmap, false); =20 /* Restore LCR and access to general register set */ sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, lcr); =20 - return DIV_ROUND_CLOSEST(clk / 16, div); + return DIV_ROUND_CLOSEST(clk / divisor, div); } =20 static void sc16is7xx_handle_rx(struct uart_port *port, unsigned int rxlen, @@ -1002,6 +1052,7 @@ static void sc16is7xx_set_termios(struct uart_port *p= ort, const struct ktermios *old) { struct sc16is7xx_one *one =3D to_sc16is7xx_one(port, port); + bool has_dld =3D sc16is7xx_has_dld(port->dev); unsigned int lcr, flow =3D 0; int baud; unsigned long flags; @@ -1084,7 +1135,7 @@ static void sc16is7xx_set_termios(struct uart_port *p= ort, /* Get baud rate generator configuration */ baud =3D uart_get_baud_rate(port, termios, old, port->uartclk / 16 / 4 / 0xffff, - port->uartclk / 16); + port->uartclk / (has_dld ? 4 : 16)); =20 /* Setup baudrate generator */ baud =3D sc16is7xx_set_baud(port, baud); @@ -1684,6 +1735,7 @@ void sc16is7xx_remove(struct device *dev) EXPORT_SYMBOL_GPL(sc16is7xx_remove); =20 const struct of_device_id __maybe_unused sc16is7xx_dt_ids[] =3D { + { .compatible =3D "exar,xr20m1172", .data =3D &xr20m1172_devtype, }, { .compatible =3D "nxp,sc16is740", .data =3D &sc16is74x_devtype, }, { .compatible =3D "nxp,sc16is741", .data =3D &sc16is74x_devtype, }, { .compatible =3D "nxp,sc16is750", .data =3D &sc16is750_devtype, }, diff --git a/drivers/tty/serial/sc16is7xx_i2c.c b/drivers/tty/serial/sc16is= 7xx_i2c.c index 3ed47c306d85..839de902821b 100644 --- a/drivers/tty/serial/sc16is7xx_i2c.c +++ b/drivers/tty/serial/sc16is7xx_i2c.c @@ -46,6 +46,7 @@ static const struct i2c_device_id sc16is7xx_i2c_id_table[= ] =3D { { "sc16is752", (kernel_ulong_t)&sc16is752_devtype, }, { "sc16is760", (kernel_ulong_t)&sc16is760_devtype, }, { "sc16is762", (kernel_ulong_t)&sc16is762_devtype, }, + { "xr20m1172", (kernel_ulong_t)&xr20m1172_devtype, }, { } }; MODULE_DEVICE_TABLE(i2c, sc16is7xx_i2c_id_table); diff --git a/drivers/tty/serial/sc16is7xx_spi.c b/drivers/tty/serial/sc16is= 7xx_spi.c index 73df36f8a7fd..2b278282dbd0 100644 --- a/drivers/tty/serial/sc16is7xx_spi.c +++ b/drivers/tty/serial/sc16is7xx_spi.c @@ -69,6 +69,7 @@ static const struct spi_device_id sc16is7xx_spi_id_table[= ] =3D { { "sc16is752", (kernel_ulong_t)&sc16is752_devtype, }, { "sc16is760", (kernel_ulong_t)&sc16is760_devtype, }, { "sc16is762", (kernel_ulong_t)&sc16is762_devtype, }, + { "xr20m1172", (kernel_ulong_t)&xr20m1172_devtype, }, { } }; MODULE_DEVICE_TABLE(spi, sc16is7xx_spi_id_table); --=20 2.34.1