From nobody Fri Dec 19 20:42:09 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D29795D905 for ; Tue, 16 Apr 2024 21:19:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.13 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713302401; cv=none; b=YOXMioou9Hh+zyVFUezu95TNvKAVA+VwKUkYU8OiPT2a4gM9//rsPtUfWqNg+Y4WuGdLKlbvybdjljVjei6tJUyr0SIlgv2fUy2O6Di6pImbdfCBjU0ZDEiERkB79flU+GjRdNpStJs/S6HOUXXNZVR15yTBIlfHLTY+h7y3DZk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713302401; c=relaxed/simple; bh=1xysypfQVziDzwWG3upBUJnEDoAX0Eg1A0VmJS43ebA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=c7b5+2GbBpE088gcwwYVtH+U2eiMh8K/oliAkw6vok6/aUJLCGGgjt3F5/mBcA2PKQJOJ6+HNZMutDqlVbCpDjcoCOIeKb0+C9L7b5QfxulTdNvzjpTfZ0MU7ElKhibuflxURA4d3xCJHnpinjnNkkDBieExqnuhTmwvyubxJOg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=hr4C8rHZ; arc=none smtp.client-ip=198.175.65.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="hr4C8rHZ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1713302399; x=1744838399; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=1xysypfQVziDzwWG3upBUJnEDoAX0Eg1A0VmJS43ebA=; b=hr4C8rHZiIrzk8Y8MTcO6hHMcWKKQvpmK4sZFqfc4xhl9nH7iFGovpfl CJ1g3fsPtaXdj3pqWNOOFIuVxLoIG+L14PJLiFeZpWctocSj/k2iJYcfX OReDzEaoPiK4G9msujo06oPFwn5Pxc9qyDm7BQmfXWHZVOFItq7tH/Fj2 hzA7aOhKk9XcrbYjsRnXeioRv3767NBq/PHPkYZMLLi1IHbQgBnYYUU+V Z7s/NOb1kr2t5PFn8M/2Uwrrz583nP9n0EbZD4cklDmntkGHpClF3hSZW JPHLBYYIMecLQGUp4w61/YZKc6NeHgyjIqezhRPC7ppnyfTSRKmoN2UHR A==; X-CSE-ConnectionGUID: SnQ4yY13Qae0ta6CqmNyGA== X-CSE-MsgGUID: odz6/4kDTda6H7rej/Apuw== X-IronPort-AV: E=McAfee;i="6600,9927,11046"; a="19914671" X-IronPort-AV: E=Sophos;i="6.07,207,1708416000"; d="scan'208";a="19914671" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Apr 2024 14:19:57 -0700 X-CSE-ConnectionGUID: wSsBaYMLQG2/b6yyT80pnQ== X-CSE-MsgGUID: LqPXntYjQ3Gy8rzYUPG/kA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,207,1708416000"; d="scan'208";a="22871875" Received: from agluck-desk3.sc.intel.com ([172.25.222.105]) by orviesa007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Apr 2024 14:19:56 -0700 From: Tony Luck To: Borislav Petkov Cc: x86@kernel.org, linux-kernel@vger.kernel.org, patches@lists.linux.dev, Tony Luck , Thomas Gleixner Subject: [PATCH v3 02/74] x86/cpu/vfm: Add new macros to work with (vendor/family/model) values Date: Tue, 16 Apr 2024 14:19:04 -0700 Message-ID: <20240416211941.9369-3-tony.luck@intel.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240416211941.9369-1-tony.luck@intel.com> References: <20240416211941.9369-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" To avoid adding a slew of new macros for each new Intel CPU family switch over from providing CPU model number #defines to a new scheme that encodes vendor, family, and model in a single number. Signed-off-by: Tony Luck Reviewed-by: Thomas Gleixner --- arch/x86/include/asm/cpu_device_id.h | 93 ++++++++++++++++++++++++++++ 1 file changed, 93 insertions(+) diff --git a/arch/x86/include/asm/cpu_device_id.h b/arch/x86/include/asm/cp= u_device_id.h index bf4e065cf1e2..833f230aeafc 100644 --- a/arch/x86/include/asm/cpu_device_id.h +++ b/arch/x86/include/asm/cpu_device_id.h @@ -2,6 +2,39 @@ #ifndef _ASM_X86_CPU_DEVICE_ID #define _ASM_X86_CPU_DEVICE_ID =20 +/* + * Can't use because it generates expressions that + * cannot be used in structure initializers. Bitfield construction + * here must match the union in struct cpuinfo_86: + * union { + * struct { + * __u8 x86_model; + * __u8 x86; + * __u8 x86_vendor; + * __u8 x86_reserved; + * }; + * __u32 x86_vfm; + * }; + */ +#define VFM_MODEL_BIT 0 +#define VFM_FAMILY_BIT 8 +#define VFM_VENDOR_BIT 16 +#define VFM_RSVD_BIT 24 + +#define VFM_MODEL_MASK GENMASK(VFM_FAMILY_BIT - 1, VFM_MODEL_BIT) +#define VFM_FAMILY_MASK GENMASK(VFM_VENDOR_BIT - 1, VFM_FAMILY_BIT) +#define VFM_VENDOR_MASK GENMASK(VFM_RSVD_BIT - 1, VFM_VENDOR_BIT) + +#define VFM_MODEL(vfm) (((vfm) & VFM_MODEL_MASK) >> VFM_MODEL_BIT) +#define VFM_FAMILY(vfm) (((vfm) & VFM_FAMILY_MASK) >> VFM_FAMILY_BIT) +#define VFM_VENDOR(vfm) (((vfm) & VFM_VENDOR_MASK) >> VFM_VENDOR_BIT) + +#define VFM_MAKE(_vendor, _family, _model) ( \ + ((_model) << VFM_MODEL_BIT) | \ + ((_family) << VFM_FAMILY_BIT) | \ + ((_vendor) << VFM_VENDOR_BIT) \ +) + /* * Declare drivers belonging to specific x86 CPUs * Similar in spirit to pci_device_id and related PCI functions @@ -49,6 +82,16 @@ .driver_data =3D (unsigned long) _data \ } =20 +#define X86_MATCH_VENDORID_FAM_MODEL_STEPPINGS_FEATURE(_vendor, _family, _= model, \ + _steppings, _feature, _data) { \ + .vendor =3D _vendor, \ + .family =3D _family, \ + .model =3D _model, \ + .steppings =3D _steppings, \ + .feature =3D _feature, \ + .driver_data =3D (unsigned long) _data \ +} + /** * X86_MATCH_VENDOR_FAM_MODEL_FEATURE - Macro for CPU matching * @_vendor: The vendor name, e.g. INTEL, AMD, HYGON, ..., ANY @@ -164,6 +207,56 @@ X86_MATCH_VENDOR_FAM_MODEL_STEPPINGS_FEATURE(INTEL, 6, INTEL_FAM6_##model= , \ steppings, X86_FEATURE_ANY, data) =20 +/** + * X86_MATCH_VFM - Match encoded vendor/family/model + * @vfm: Encoded 8-bits each for vendor, family, model + * @data: Driver specific data or NULL. The internal storage + * format is unsigned long. The supplied value, pointer + * etc. is casted to unsigned long internally. + * + * Stepping and feature are set to wildcards + */ +#define X86_MATCH_VFM(vfm, data) \ + X86_MATCH_VENDORID_FAM_MODEL_STEPPINGS_FEATURE( \ + VFM_VENDOR(vfm), \ + VFM_FAMILY(vfm), \ + VFM_MODEL(vfm), \ + X86_STEPPING_ANY, X86_FEATURE_ANY, data) + +/** + * X86_MATCH_VFM_STEPPINGS - Match encoded vendor/family/model/stepping + * @vfm: Encoded 8-bits each for vendor, family, model + * @steppings: Bitmask of steppings to match + * @data: Driver specific data or NULL. The internal storage + * format is unsigned long. The supplied value, pointer + * etc. is casted to unsigned long internally. + * + * feature is set to wildcard + */ +#define X86_MATCH_VFM_STEPPINGS(vfm, steppings, data) \ + X86_MATCH_VENDORID_FAM_MODEL_STEPPINGS_FEATURE( \ + VFM_VENDOR(vfm), \ + VFM_FAMILY(vfm), \ + VFM_MODEL(vfm), \ + steppings, X86_FEATURE_ANY, data) + +/** + * X86_MATCH_VFM_FEATURE - Match encoded vendor/family/model/feature + * @vfm: Encoded 8-bits each for vendor, family, model + * @feature: A X86_FEATURE bit + * @data: Driver specific data or NULL. The internal storage + * format is unsigned long. The supplied value, pointer + * etc. is casted to unsigned long internally. + * + * Steppings is set to wildcard + */ +#define X86_MATCH_VFM_FEATURE(vfm, feature, data) \ + X86_MATCH_VENDORID_FAM_MODEL_STEPPINGS_FEATURE( \ + VFM_VENDOR(vfm), \ + VFM_FAMILY(vfm), \ + VFM_MODEL(vfm), \ + X86_STEPPING_ANY, feature, data) + /* * Match specific microcode revisions. * --=20 2.44.0