From nobody Sat Feb 7 08:44:21 2026 Received: from mail-pl1-f174.google.com (mail-pl1-f174.google.com [209.85.214.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EDC0086626; Tue, 16 Apr 2024 10:04:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.174 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713261901; cv=none; b=U/wZ4nwUXvR2YW628NGWGXwFEdaonqed/uhOIZAglmK5qs5mHNKCER6VaHqyd6IU9TGY3vBL9ejkITphHR6Sqhibim+n24OQ8Y8TR9W+IPJrXpyaBl5MSlsgTnuXORNdt3uYoEzc/55KnFjgoYqRbv507N7Ht31jKbAWnRV81cA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713261901; c=relaxed/simple; bh=T6lQiVWmytZHVQJAW4xa+ziFT/0SMHSrOAt1hAa7bSA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=YbIGfU7X6tCVPNENB80/BerM+qX6EGsWTV7ksfQccbxBpxkLFcOSlvw9Uj3wgIW463rfhxCQdOwOpUG9PXBiKk+rG/JMBhYecTvmBw1lqrQ36dxaYcFHOBg4D1e3ai2EJVH7bvMfIxERu40An5CeHy79MPCPmaPFjyY87R4EL/4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=R5rzmTWv; arc=none smtp.client-ip=209.85.214.174 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="R5rzmTWv" Received: by mail-pl1-f174.google.com with SMTP id d9443c01a7336-1e5aa82d1f6so23129735ad.0; Tue, 16 Apr 2024 03:04:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1713261899; x=1713866699; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=NNeTl78vZFNcKOErgWglz32ctBFQT/HCoAapAxi94qA=; b=R5rzmTWvNCTSSJRHXI/lveRk02RrkKx6X70ddpdNqehe7mh0BVUlxvK40Y2YblN3aJ PgQqcrHg/gIGaYfs8YJJtDHl/uuIqX3uXM9bMwU8QsU6nLQvURjKEJOOSdbGwYAhGWRA a1XtM9VZi1el7337xn7UZ9IKccffonkc6PCkzZ/+jCbxyNPIn2GN798A8gO7hepMu6ta 7nuSib1Cy3KMNhOrKEnM7OG/s7Gb66RDbrm5iQEIQm4BcL6BmOxPI9EKNRa4k2/T19oT gKgeW6OLY6rCB1I04vKkydugII+UWeYxSbi5vcK3Gw37h3aFL81lJ7PahVRAcAQP1wKr 7iAA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713261899; x=1713866699; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=NNeTl78vZFNcKOErgWglz32ctBFQT/HCoAapAxi94qA=; b=o1FJRTODuOZVTSN1mFcRp5OhPNH12cjMbS7tbU8rf4ZzvS2R87V8eDyiULu0NC/mIX uxaDxcBSr7qulOXvSIMYMB1Jt3BN74HHUxTJMG6EVyPvMdFKjDJZfw4dxEMBe8+xDH3o iE045WGyVddkcN9ew6D6beZJNdux30y1WvlWf/s9c5EXS34xnRXoqu41pkDM+PTAeLXe uK3XeCB/8VM/iFTIOqqaF+0ToRXU8WvKXpIWpYNzb6bXee23MEhdlGwiSec2PLK5tbCV LGsV78aVQZUKTqOtGaCyBF6RyqRPiSXZrEwJjo2bQXEHzpiMPj86qC+46MkBC2AtPP+i ZSWg== X-Forwarded-Encrypted: i=1; AJvYcCWwt0yZ9+0xLgaML00n4PiMBrc0XEXcYjL4Gsu9AnED2aVVMBeb26SeisOBrQ0SDCG4cM3jBsIhVry+d9tJ6HLuFj54ppsxhU7zk/FH X-Gm-Message-State: AOJu0Yz30X0LAwnDktCQ2lhcUHhIhKqErY4RAEbiuR/zPW+mOel+oiVE JaNAcZkt3uRYririjvv0LDwVXgwDhSbFv+qsRMMtudeX10+Z3uMfgQ4b83YG X-Google-Smtp-Source: AGHT+IFkwaafvDgj28TS/HjmxtpVepHAQXknHPPQLalbmm20YJ0hQEeFsayqlXn6wBAgkSv8i2yKDA== X-Received: by 2002:a17:902:ce8d:b0:1e3:c186:8db3 with SMTP id f13-20020a170902ce8d00b001e3c1868db3mr3300420plg.15.1713261898970; Tue, 16 Apr 2024 03:04:58 -0700 (PDT) Received: from d.home.yangfl.dn42 ([104.28.245.199]) by smtp.gmail.com with ESMTPSA id y4-20020a17090322c400b001e0b287c1d2sm9353651plg.215.2024.04.16.03.04.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Apr 2024 03:04:58 -0700 (PDT) From: David Yang To: linux-clk@vger.kernel.org Cc: Michael Turquette , Stephen Boyd , linux-kernel@vger.kernel.org, David Yang Subject: [PATCH v10 02/13] clk: hisilicon: hi3516cv300: Use helper functions Date: Tue, 16 Apr 2024 18:03:36 +0800 Message-ID: <20240416100347.395295-3-mmyangfl@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240416100347.395295-1-mmyangfl@gmail.com> References: <20240416100347.395295-1-mmyangfl@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use common helper functions and register clks with a single of_device_id data. Signed-off-by: David Yang --- drivers/clk/hisilicon/crg-hi3516cv300.c | 171 +++--------------------- 1 file changed, 17 insertions(+), 154 deletions(-) diff --git a/drivers/clk/hisilicon/crg-hi3516cv300.c b/drivers/clk/hisilico= n/crg-hi3516cv300.c index e602e65fbc38..0e6b95d00c68 100644 --- a/drivers/clk/hisilicon/crg-hi3516cv300.c +++ b/drivers/clk/hisilicon/crg-hi3516cv300.c @@ -12,7 +12,6 @@ #include #include "clk.h" #include "crg.h" -#include "reset.h" =20 /* hi3516CV300 core CRG */ #define HI3516CV300_INNER_CLK_OFFSET 64 @@ -126,67 +125,14 @@ static const struct hisi_gate_clock hi3516cv300_gate_= clks[] =3D { { HI3516CV300_USB2_PHY_CLK, "clk_usb2_phy", NULL, 0, 0xb8, 7, 0, }, }; =20 -static struct hisi_clock_data *hi3516cv300_clk_register( - struct platform_device *pdev) -{ - struct hisi_clock_data *clk_data; - int ret; - - clk_data =3D hisi_clk_alloc(pdev, HI3516CV300_CRG_NR_CLKS); - if (!clk_data) - return ERR_PTR(-ENOMEM); - - ret =3D hisi_clk_register_fixed_rate(hi3516cv300_fixed_rate_clks, - ARRAY_SIZE(hi3516cv300_fixed_rate_clks), clk_data); - if (ret) - return ERR_PTR(ret); - - ret =3D hisi_clk_register_mux(hi3516cv300_mux_clks, - ARRAY_SIZE(hi3516cv300_mux_clks), clk_data); - if (ret) - goto unregister_fixed_rate; - - ret =3D hisi_clk_register_gate(hi3516cv300_gate_clks, - ARRAY_SIZE(hi3516cv300_gate_clks), clk_data); - if (ret) - goto unregister_mux; - - ret =3D of_clk_add_provider(pdev->dev.of_node, - of_clk_src_onecell_get, &clk_data->clk_data); - if (ret) - goto unregister_gate; - - return clk_data; - -unregister_gate: - hisi_clk_unregister_gate(hi3516cv300_gate_clks, - ARRAY_SIZE(hi3516cv300_gate_clks), clk_data); -unregister_mux: - hisi_clk_unregister_mux(hi3516cv300_mux_clks, - ARRAY_SIZE(hi3516cv300_mux_clks), clk_data); -unregister_fixed_rate: - hisi_clk_unregister_fixed_rate(hi3516cv300_fixed_rate_clks, - ARRAY_SIZE(hi3516cv300_fixed_rate_clks), clk_data); - return ERR_PTR(ret); -} - -static void hi3516cv300_clk_unregister(struct platform_device *pdev) -{ - struct hisi_crg_dev *crg =3D platform_get_drvdata(pdev); - - of_clk_del_provider(pdev->dev.of_node); - - hisi_clk_unregister_gate(hi3516cv300_gate_clks, - ARRAY_SIZE(hi3516cv300_gate_clks), crg->clk_data); - hisi_clk_unregister_mux(hi3516cv300_mux_clks, - ARRAY_SIZE(hi3516cv300_mux_clks), crg->clk_data); - hisi_clk_unregister_fixed_rate(hi3516cv300_fixed_rate_clks, - ARRAY_SIZE(hi3516cv300_fixed_rate_clks), crg->clk_data); -} - -static const struct hisi_crg_funcs hi3516cv300_crg_funcs =3D { - .register_clks =3D hi3516cv300_clk_register, - .unregister_clks =3D hi3516cv300_clk_unregister, +static const struct hisi_clocks hi3516cv300_crg_clks =3D { + .nr =3D HI3516CV300_CRG_NR_CLKS, + .fixed_rate_clks =3D hi3516cv300_fixed_rate_clks, + .fixed_rate_clks_num =3D ARRAY_SIZE(hi3516cv300_fixed_rate_clks), + .mux_clks =3D hi3516cv300_mux_clks, + .mux_clks_num =3D ARRAY_SIZE(hi3516cv300_mux_clks), + .gate_clks =3D hi3516cv300_gate_clks, + .gate_clks_num =3D ARRAY_SIZE(hi3516cv300_gate_clks), }; =20 /* hi3516CV300 sysctrl CRG */ @@ -200,118 +146,35 @@ static const struct hisi_mux_clock hi3516cv300_sysct= rl_mux_clks[] =3D { CLK_SET_RATE_PARENT, 0x0, 23, 1, 0, wdt_mux_table, }, }; =20 -static struct hisi_clock_data *hi3516cv300_sysctrl_clk_register( - struct platform_device *pdev) -{ - struct hisi_clock_data *clk_data; - int ret; - - clk_data =3D hisi_clk_alloc(pdev, HI3516CV300_SYSCTRL_NR_CLKS); - if (!clk_data) - return ERR_PTR(-ENOMEM); - - ret =3D hisi_clk_register_mux(hi3516cv300_sysctrl_mux_clks, - ARRAY_SIZE(hi3516cv300_sysctrl_mux_clks), clk_data); - if (ret) - return ERR_PTR(ret); - - - ret =3D of_clk_add_provider(pdev->dev.of_node, - of_clk_src_onecell_get, &clk_data->clk_data); - if (ret) - goto unregister_mux; - - return clk_data; - -unregister_mux: - hisi_clk_unregister_mux(hi3516cv300_sysctrl_mux_clks, - ARRAY_SIZE(hi3516cv300_sysctrl_mux_clks), clk_data); - return ERR_PTR(ret); -} - -static void hi3516cv300_sysctrl_clk_unregister(struct platform_device *pde= v) -{ - struct hisi_crg_dev *crg =3D platform_get_drvdata(pdev); - - of_clk_del_provider(pdev->dev.of_node); - - hisi_clk_unregister_mux(hi3516cv300_sysctrl_mux_clks, - ARRAY_SIZE(hi3516cv300_sysctrl_mux_clks), - crg->clk_data); -} - -static const struct hisi_crg_funcs hi3516cv300_sysctrl_funcs =3D { - .register_clks =3D hi3516cv300_sysctrl_clk_register, - .unregister_clks =3D hi3516cv300_sysctrl_clk_unregister, +static const struct hisi_clocks hi3516cv300_sysctrl_clks =3D { + .nr =3D HI3516CV300_SYSCTRL_NR_CLKS, + .mux_clks =3D hi3516cv300_sysctrl_mux_clks, + .mux_clks_num =3D ARRAY_SIZE(hi3516cv300_sysctrl_mux_clks), }; =20 static const struct of_device_id hi3516cv300_crg_match_table[] =3D { { .compatible =3D "hisilicon,hi3516cv300-crg", - .data =3D &hi3516cv300_crg_funcs + .data =3D &hi3516cv300_crg_clks, }, { .compatible =3D "hisilicon,hi3516cv300-sysctrl", - .data =3D &hi3516cv300_sysctrl_funcs + .data =3D &hi3516cv300_sysctrl_clks, }, { } }; MODULE_DEVICE_TABLE(of, hi3516cv300_crg_match_table); =20 -static int hi3516cv300_crg_probe(struct platform_device *pdev) -{ - struct hisi_crg_dev *crg; - - crg =3D devm_kmalloc(&pdev->dev, sizeof(*crg), GFP_KERNEL); - if (!crg) - return -ENOMEM; - - crg->funcs =3D of_device_get_match_data(&pdev->dev); - if (!crg->funcs) - return -ENOENT; - - crg->rstc =3D hisi_reset_init(pdev); - if (!crg->rstc) - return -ENOMEM; - - crg->clk_data =3D crg->funcs->register_clks(pdev); - if (IS_ERR(crg->clk_data)) { - hisi_reset_exit(crg->rstc); - return PTR_ERR(crg->clk_data); - } - - platform_set_drvdata(pdev, crg); - return 0; -} - -static void hi3516cv300_crg_remove(struct platform_device *pdev) -{ - struct hisi_crg_dev *crg =3D platform_get_drvdata(pdev); - - hisi_reset_exit(crg->rstc); - crg->funcs->unregister_clks(pdev); -} - static struct platform_driver hi3516cv300_crg_driver =3D { - .probe =3D hi3516cv300_crg_probe, - .remove_new =3D hi3516cv300_crg_remove, + .probe =3D hisi_crg_probe, + .remove_new =3D hisi_crg_remove, .driver =3D { .name =3D "hi3516cv300-crg", .of_match_table =3D hi3516cv300_crg_match_table, }, }; =20 -static int __init hi3516cv300_crg_init(void) -{ - return platform_driver_register(&hi3516cv300_crg_driver); -} -core_initcall(hi3516cv300_crg_init); - -static void __exit hi3516cv300_crg_exit(void) -{ - platform_driver_unregister(&hi3516cv300_crg_driver); -} -module_exit(hi3516cv300_crg_exit); +module_platform_driver(hi3516cv300_crg_driver); =20 MODULE_LICENSE("GPL v2"); MODULE_DESCRIPTION("HiSilicon Hi3516CV300 CRG Driver"); --=20 2.43.0