From nobody Fri Dec 19 22:07:45 2025 Received: from smtp.forwardemail.net (smtp.forwardemail.net [149.28.215.223]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 914EC7603F for ; Mon, 15 Apr 2024 15:04:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=149.28.215.223 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713193465; cv=none; b=Oz87iAgXUFMKGAz6TQmE1meI1l9U4TgottHn0MH9K7MWEGeANqSaIv64UdAR1b4FIWqKIZJ9GAtC3d4wciMiCIZVIc8UsTYR8inHaHlaY86GBwG2gwEsV3DHpOBy60BFqPzPPJHNglEaZusLAfzOfeEktiB1S+yMcwUMPcyOsRU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713193465; c=relaxed/simple; bh=m5RS2ptdjvUqdXoEWpLJN1ClndpPjatpiiqMigQQkGg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=VfMn6uBMab0J4jKLkqYc1MmXpHs3T5FbtnZ0/wFbMd+J+kOfbLpO0dRKaeOWIaq8tvq0NA7Uj61g3+jSrbv+TnSp/B8L3d2q22CPgxZLxlHWiARLijrHskKOkovuVkNEX5crpv04yKxrz7cw5ck7oUrB0D1RvFVM6XJEzrjC1gE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kwiboo.se; spf=pass smtp.mailfrom=fe-bounces.kwiboo.se; dkim=pass (2048-bit key) header.d=kwiboo.se header.i=@kwiboo.se header.b=eIK1Sm5C; arc=none smtp.client-ip=149.28.215.223 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kwiboo.se Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fe-bounces.kwiboo.se Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kwiboo.se header.i=@kwiboo.se header.b="eIK1Sm5C" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kwiboo.se; h=Content-Transfer-Encoding: MIME-Version: References: In-Reply-To: Message-ID: Date: Subject: Cc: To: From; q=dns/txt; s=fe-e1b5cab7be; t=1713193454; bh=Br1cPb612nXVCftZVJlVuBeRaWk4BxyFB/Atx/U13WQ=; b=eIK1Sm5ClMgXjK+b+HhMIoudcQd/O2ozoDcWV61cSBWjzCwbnNZpG4smbOBHMbbBr4JOjSqKI xdlY6gXi+xP63HPNyqVw59XxiJSHjfyuLMam6OGALKfyqt0ETkeviqegLK7KddTgpbkKxd8NL/W ZyYscjuFiN+TctcnKr3i0J7KT9fU+ybjgiJld+vQplthvGpoC1xhWzkyy5P+yDojmxblcqG6Yu3 Mmia+kveaYr8veqhRzM/HPZXg4mMVHBoKfJuZjsKWBA45xb9wlisenieT/9WopR5Tq5CohssL1j oxhNi7rodvbF9SbUWEYlR2UAWkA78UomiAKrVX513N2A== From: Jonas Karlman To: Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Jonas Karlman , Krzysztof Kozlowski Subject: [PATCH v3 1/2] dt-bindings: arm: rockchip: Add Radxa ZERO 3W/3E Date: Mon, 15 Apr 2024 15:03:43 +0000 Message-ID: <20240415150349.2207075-2-jonas@kwiboo.se> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240415150349.2207075-1-jonas@kwiboo.se> References: <20240415150349.2207075-1-jonas@kwiboo.se> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Report-Abuse-To: abuse@forwardemail.net X-Report-Abuse: abuse@forwardemail.net X-Complaints-To: abuse@forwardemail.net X-ForwardEmail-Version: 0.4.40 X-ForwardEmail-Sender: rfc822; jonas@kwiboo.se, smtp.forwardemail.net, 149.28.215.223 X-ForwardEmail-ID: 661d41eefc656ac01cb4646c Content-Type: text/plain; charset="utf-8" Add devicetree binding documentation for Radxa ZERO 3W/3E boards. The Radxa ZERO 3W/3E is an ultra-small, high-performance single board computer based on the Rockchip RK3566, with a compact form factor and rich interfaces. Signed-off-by: Jonas Karlman Acked-by: Krzysztof Kozlowski --- v2: Collect acked-by tag v3: Fix devicetree spelling --- Documentation/devicetree/bindings/arm/rockchip.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Document= ation/devicetree/bindings/arm/rockchip.yaml index 4bd033adeee4..2d43729bebab 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -804,6 +804,13 @@ properties: - const: radxa,rock-5b - const: rockchip,rk3588 =20 + - description: Radxa ZERO 3W/3E + items: + - enum: + - radxa,zero-3e + - radxa,zero-3w + - const: rockchip,rk3566 + - description: Rikomagic MK808 v1 items: - const: rikomagic,mk808 --=20 2.43.2 From nobody Fri Dec 19 22:07:45 2025 Received: from smtp.forwardemail.net (smtp.forwardemail.net [149.28.215.223]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9152D76046 for ; Mon, 15 Apr 2024 15:04:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=149.28.215.223 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713193464; cv=none; b=n/RcgoU7VbsS5bIj7y7kTTVOl19b9xgcDepQEJMCNtL27Q167W10GoFVefG3D2zsJY6GmbbDSrhhsHWorUwk9Od5SRmpzr77/ysEadZR+vXzmwnyy5wbBHq4iVzXqKpwElMDOJRUJjlGclX7YVRuzZDCQf26MS4rokZRfxz8LK8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713193464; c=relaxed/simple; bh=PYMDfBHaHrILD3dJuqjxWb9SKSASX9+XSQCaufF7ZyU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=YXmrAneVcTKyv29iYRGsZxNTEnWwWkuLfOO0aI5oqpgjAMznnFTI+PxPJO7F2XsSpWNtTJMjEqEwW6c3SdDqPRzHx31a7hKMiDUR7mKXsMEUKvd/aRvMGh87cQHEeb8Rs556n+hBhpLoAPwqSlRKQQi5RJjpb3/wTSlQNqmxAqU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kwiboo.se; spf=pass smtp.mailfrom=fe-bounces.kwiboo.se; dkim=pass (2048-bit key) header.d=kwiboo.se header.i=@kwiboo.se header.b=R4+bO91M; arc=none smtp.client-ip=149.28.215.223 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kwiboo.se Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fe-bounces.kwiboo.se Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kwiboo.se header.i=@kwiboo.se header.b="R4+bO91M" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kwiboo.se; h=Content-Transfer-Encoding: MIME-Version: References: In-Reply-To: Message-ID: Date: Subject: Cc: To: From; q=dns/txt; s=fe-e1b5cab7be; t=1713193459; bh=UilC9OCAXFeG1AIKKADdM+nKqFBTwDI8oJka53wTa84=; b=R4+bO91MxDIfubvqIV+OKonPMu6kotATJojbwzrf/XDPU4X+8v0H/kmy2Pl/2A6DJxYpQbDWq 51606dALGuIlmkz9pjbbDwH4LNwTVACHNyEFdlcJRTVzFensnA7d/puriOv8ENHH/qWFqadxOxL HHrFkGMZ0aMIOoOHvOe9SyPEYrCV6dShWpizYP28U/ZGItpc4/Dk1DUSc8UCZUhQgVPPcmrqPYm WBWubFdOkhI3s9wRjrR2/He3tgRffwNn3ElnUw5UNGMr3neWfw+cJP3oh9zrcys1FPh2Pt0drdX cS3knE8lixjbWU7fuPtivdU1baAYjPGwmyAUR4EpsakQ== From: Jonas Karlman To: Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Jonas Karlman Subject: [PATCH v3 2/2] arm64: dts: rockchip: Add Radxa ZERO 3W/3E Date: Mon, 15 Apr 2024 15:03:44 +0000 Message-ID: <20240415150349.2207075-3-jonas@kwiboo.se> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240415150349.2207075-1-jonas@kwiboo.se> References: <20240415150349.2207075-1-jonas@kwiboo.se> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Report-Abuse-To: abuse@forwardemail.net X-Report-Abuse: abuse@forwardemail.net X-Complaints-To: abuse@forwardemail.net X-ForwardEmail-Version: 0.4.40 X-ForwardEmail-Sender: rfc822; jonas@kwiboo.se, smtp.forwardemail.net, 149.28.215.223 X-ForwardEmail-ID: 661d41f3fc656ac01cb4647e Content-Type: text/plain; charset="utf-8" The Radxa ZERO 3W/3E is an ultra-small, high-performance single board computer based on the Rockchip RK3566, with a compact form factor and rich interfaces. The ZERO 3W and ZERO 3E are basically the same size and model, but differ only in storage and network interfaces. - eMMC (3W) - SD-card (both) - Ethernet (3E) - WiFi/BT (3W) This adds initial support for eMMC, SD-card, Ethernet, HDMI and USB. Signed-off-by: Jonas Karlman --- v2: Add to Makefile v3: Sort hdmi-con and leds nodes alphabetically v3: Sort pmic@20 and regulator@40 nodes by reg v3: Change to regulator-off-in-suspend for vdd_logic Following issue is reported by dtbs_check and is fixed by patch at [1]: hdmi@fe0a0000: Unevaluated properties are not allowed ('#sound-dai-cells'= was unexpected) from schema $id: http://devicetree.org/schemas/display/rockchip/rockchip,= dw-hdmi.yaml# [1] https://lore.kernel.org/linux-rockchip/3a035c16-75b5-471d-aa9d-e91c2bb9= f8d0@gmail.com/ --- arch/arm64/boot/dts/rockchip/Makefile | 2 + .../dts/rockchip/rk3566-radxa-zero-3e.dts | 41 ++ .../dts/rockchip/rk3566-radxa-zero-3w.dts | 26 + .../boot/dts/rockchip/rk3566-radxa-zero3.dtsi | 443 ++++++++++++++++++ 4 files changed, 512 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3e.dts create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3w.dts create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-radxa-zero3.dtsi diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/ro= ckchip/Makefile index 7da198be8787..ab534e7f993f 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -90,6 +90,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3566-powkiddy-x55.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3566-quartz64-a.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3566-quartz64-b.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3566-radxa-cm3-io.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3566-radxa-zero-3e.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3566-radxa-zero-3w.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3566-roc-pc.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3566-soquartz-blade.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3566-soquartz-cm4.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3e.dts b/arch/a= rm64/boot/dts/rockchip/rk3566-radxa-zero-3e.dts new file mode 100644 index 000000000000..0826f7e99a81 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3e.dts @@ -0,0 +1,41 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include "rk3566-radxa-zero3.dtsi" + +/ { + model =3D "Radxa ZERO 3E"; + compatible =3D "radxa,zero-3e", "rockchip,rk3566"; + + aliases { + ethernet0 =3D &gmac1; + }; +}; + +&gmac1 { + assigned-clocks =3D <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; + assigned-clock-parents =3D <&cru SCLK_GMAC1_RGMII_SPEED>; + assigned-clock-rates =3D <0>, <125000000>; + clock_in_out =3D "output"; + phy-handle =3D <&rgmii_phy1>; + phy-mode =3D "rgmii-id"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&gmac1m1_miim + &gmac1m1_tx_bus2 + &gmac1m1_rx_bus2 + &gmac1m1_rgmii_clk + &gmac1m1_rgmii_bus + &gmac1m1_clkinout>; + status =3D "okay"; +}; + +&mdio1 { + rgmii_phy1: ethernet-phy@0 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <0x0>; + reset-assert-us =3D <20000>; + reset-deassert-us =3D <100000>; + reset-gpios =3D <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>; + }; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3w.dts b/arch/a= rm64/boot/dts/rockchip/rk3566-radxa-zero-3w.dts new file mode 100644 index 000000000000..be4ddce78378 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3w.dts @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include "rk3566-radxa-zero3.dtsi" + +/ { + model =3D "Radxa ZERO 3W"; + compatible =3D "radxa,zero-3w", "rockchip,rk3566"; + + aliases { + mmc1 =3D &sdhci; + }; +}; + +&sdhci { + bus-width =3D <8>; + max-frequency =3D <200000000>; + mmc-hs200-1_8v; + non-removable; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; + vmmc-supply =3D <&vcc_3v3>; + vqmmc-supply =3D <&vcc_1v8>; + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero3.dtsi b/arch/ar= m64/boot/dts/rockchip/rk3566-radxa-zero3.dtsi new file mode 100644 index 000000000000..ea8ade3a4c99 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero3.dtsi @@ -0,0 +1,443 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +#include +#include +#include +#include +#include "rk3566.dtsi" + +/ { + aliases { + mmc0 =3D &sdmmc0; + }; + + chosen { + stdout-path =3D "serial2:1500000n8"; + }; + + hdmi-con { + compatible =3D "hdmi-connector"; + type =3D "d"; + + port { + hdmi_con_in: endpoint { + remote-endpoint =3D <&hdmi_out_con>; + }; + }; + }; + + leds { + compatible =3D "gpio-leds"; + + led-green { + color =3D ; + default-state =3D "on"; + function =3D LED_FUNCTION_HEARTBEAT; + gpios =3D <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; + linux,default-trigger =3D "heartbeat"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&user_led2>; + }; + }; + + vcc_sys: vcc-sys-regulator { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + }; + + vcc_1v8: vcc-1v8-regulator { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + vin-supply =3D <&vcc_1v8_p>; + }; + + vcc_3v3: vcc-3v3-regulator { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_3v3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&vcc3v3_sys>; + }; + + vcca_1v8: vcca-1v8-regulator { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcca_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + vin-supply =3D <&vcc_1v8_p>; + }; + + vcca1v8_image: vcca1v8-image-regulator { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcca1v8_image"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + vin-supply =3D <&vcc_1v8_p>; + }; +}; + +&combphy1 { + status =3D "okay"; +}; + +&cpu0 { + cpu-supply =3D <&vdd_cpu>; +}; + +&cpu1 { + cpu-supply =3D <&vdd_cpu>; +}; + +&cpu2 { + cpu-supply =3D <&vdd_cpu>; +}; + +&cpu3 { + cpu-supply =3D <&vdd_cpu>; +}; + +&gpu { + mali-supply =3D <&vdd_gpu_npu>; + status =3D "okay"; +}; + +&hdmi { + avdd-0v9-supply =3D <&vdda_0v9>; + avdd-1v8-supply =3D <&vcca1v8_image>; + status =3D "okay"; +}; + +&hdmi_in { + hdmi_in_vp0: endpoint { + remote-endpoint =3D <&vp0_out_hdmi>; + }; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint =3D <&hdmi_con_in>; + }; +}; + +&hdmi_sound { + status =3D "okay"; +}; + +&i2c0 { + status =3D "okay"; + + rk817: pmic@20 { + compatible =3D "rockchip,rk817"; + reg =3D <0x20>; + #clock-cells =3D <1>; + clock-output-names =3D "rk817-clkout1", "rk817-clkout2"; + interrupt-parent =3D <&gpio0>; + interrupts =3D ; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pmic_int_l>; + system-power-controller; + wakeup-source; + + vcc1-supply =3D <&vcc_sys>; + vcc2-supply =3D <&vcc_sys>; + vcc3-supply =3D <&vcc_sys>; + vcc4-supply =3D <&vcc_sys>; + vcc5-supply =3D <&vcc_sys>; + vcc6-supply =3D <&vcc_sys>; + vcc7-supply =3D <&vcc_sys>; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-name =3D "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode =3D <0x2>; + regulator-min-microvolt =3D <500000>; + regulator-max-microvolt =3D <1350000>; + regulator-ramp-delay =3D <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt =3D <900000>; + }; + }; + + vdd_gpu_npu: DCDC_REG2 { + regulator-name =3D "vdd_gpu_npu"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode =3D <0x2>; + regulator-min-microvolt =3D <500000>; + regulator-max-microvolt =3D <1350000>; + regulator-ramp-delay =3D <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name =3D "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode =3D <0x2>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc3v3_sys: DCDC_REG4 { + regulator-name =3D "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode =3D <0x2>; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <3300000>; + }; + }; + + vcca1v8_pmu: LDO_REG1 { + regulator-name =3D "vcca1v8_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <1800000>; + }; + }; + + vdda_0v9: LDO_REG2 { + regulator-name =3D "vdda_0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-name =3D "vdda0v9_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <900000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <900000>; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-name =3D "vccio_acodec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-name =3D "vccio_sd"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-name =3D "vcc3v3_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <3300000>; + }; + }; + + vcc_1v8_p: LDO_REG7 { + regulator-name =3D "vcc_1v8_p"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc1v8_dvp: LDO_REG8 { + regulator-name =3D "vcc1v8_dvp"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc2v8_dvp: LDO_REG9 { + regulator-name =3D "vcc2v8_dvp"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; + + vdd_cpu: regulator@40 { + compatible =3D "silergy,syr827"; + reg =3D <0x40>; + fcs,suspend-voltage-selector =3D <1>; + regulator-name =3D "vdd_cpu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <712500>; + regulator-max-microvolt =3D <1390000>; + regulator-ramp-delay =3D <2300>; + vin-supply =3D <&vcc_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2s0_8ch { + status =3D "okay"; +}; + +&pinctrl { + leds { + user_led2: user-led2 { + rockchip,pins =3D <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins =3D <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +}; + +&pmu_io_domains { + pmuio1-supply =3D <&vcc3v3_pmu>; + pmuio2-supply =3D <&vcca1v8_pmu>; + vccio1-supply =3D <&vccio_acodec>; + vccio2-supply =3D <&vcc_1v8>; + vccio3-supply =3D <&vccio_sd>; + vccio4-supply =3D <&vcc_1v8>; + vccio5-supply =3D <&vcc_3v3>; + vccio6-supply =3D <&vcc_3v3>; + vccio7-supply =3D <&vcc_3v3>; + status =3D "okay"; +}; + +&saradc { + vref-supply =3D <&vcca_1v8>; + status =3D "okay"; +}; + +&sdmmc0 { + bus-width =3D <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; + vmmc-supply =3D <&vcc3v3_sys>; + vqmmc-supply =3D <&vccio_sd>; + status =3D "okay"; +}; + +&tsadc { + rockchip,hw-tshut-mode =3D <1>; + rockchip,hw-tshut-polarity =3D <0>; + status =3D "okay"; +}; + +&uart2 { + status =3D "okay"; +}; + +&usb2phy0 { + status =3D "okay"; +}; + +&usb2phy0_host { + status =3D "okay"; +}; + +&usb2phy0_otg { + status =3D "okay"; +}; + +&usb_host0_xhci { + dr_mode =3D "peripheral"; + status =3D "okay"; +}; + +&usb_host1_xhci { + status =3D "okay"; +}; + +&vop { + assigned-clocks =3D <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; + assigned-clock-parents =3D <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; + status =3D "okay"; +}; + +&vop_mmu { + status =3D "okay"; +}; + +&vp0 { + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg =3D ; + remote-endpoint =3D <&hdmi_in_vp0>; + }; +}; --=20 2.43.2