From nobody Fri Sep 20 01:36:24 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 548F61BF3F; Sun, 14 Apr 2024 06:08:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713074885; cv=none; b=fNRZFTrzEUvKvTLe7bIdQJZw8azVQRi0RQCQm80cMlgIsYHcu2xVBiiFIiCFDNX8RZCHv/vwrhaFm/ORS/BYoUjY6S5Fqwm1uShYomRG1dZlTPUUPZIH2WlyhIp6MOw4KkPBdhIVghDqM1D5N651LnFPwMB1/35r6zo5Ro/8iC8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713074885; c=relaxed/simple; bh=3CGbKm3wLsuS8GTsDospuYJBy6mOwEyYgj08AowXFJY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Go91m559zpfjX6zBaDMOLxoFK4UYfp17NDExYwUYBwSoOdA8PbZbi2g5asxuCI7lOD0zEHWYcdj1hSrmVKNwe8siquw5vp3vWZi3QEG26zaNkE+FkzVCXv/+3FzdUl3pchOXtPpdJv4dCjFs4hPkX415AW5mStQJw7RPIKYTdJI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=n9c12esV; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="n9c12esV" Received: by smtp.kernel.org (Postfix) with ESMTPS id D2B81C2BD10; Sun, 14 Apr 2024 06:08:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1713074884; bh=3CGbKm3wLsuS8GTsDospuYJBy6mOwEyYgj08AowXFJY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=n9c12esVWhQWw4tZ2XC5mWhXfgDHRiwJ5T8XHHySG6o8dbf4Oqv3R2OmxsG9cl6NT rRy0RB9F0SyE8fmj6+7nqmy5UnzNqerg3YDpiwoG5yRfF1NkDqSKCIPctSjIJMIwIB a/cb2L/ETjdjLZbMYO1DNJxFQPSmz8VxF4nn0q9UEzqzuzIQuveY/SQsY6QYr3MkuN dCKN9o5mXIUX7cwoZ5YFhoczOd3watdYucSg9wp7NJOfTmNowe2tBY5RlIAOQjGiuG 8UQb1LG1w0k9C4tX7/ftPqtwnD1ZPP1najQYk7G/n9Xyxa6LtIuV1XKwkesAjBFyy0 OY1HBzzJJVoog== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id BDE86C04FFF; Sun, 14 Apr 2024 06:08:04 +0000 (UTC) From: =?utf-8?q?Ar=C4=B1n=C3=A7_=C3=9CNAL_via_B4_Relay?= Date: Sun, 14 Apr 2024 09:07:42 +0300 Subject: [PATCH net-next v2 2/2] net: dsa: mt7530: simplify core operations Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240414-b4-for-netnext-mt7530-phy-addr-from-dt-and-simplify-core-ops-v2-2-1a7649c4d3b6@arinc9.com> References: <20240414-b4-for-netnext-mt7530-phy-addr-from-dt-and-simplify-core-ops-v2-0-1a7649c4d3b6@arinc9.com> In-Reply-To: <20240414-b4-for-netnext-mt7530-phy-addr-from-dt-and-simplify-core-ops-v2-0-1a7649c4d3b6@arinc9.com> To: Daniel Golle , DENG Qingfang , Sean Wang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno Cc: Bartel Eerdekens , mithat.guner@xeront.com, erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, =?utf-8?q?Ar=C4=B1n=C3=A7_=C3=9CNAL?= X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1713074874; l=5238; i=arinc.unal@arinc9.com; s=arinc9-patatt; h=from:subject:message-id; bh=MN/y6Syx7BQudCat3jVuTgtlGZvuyR9wy1cv/kTixQo=; b=yZml79ewmSDr1F1tJP+dZjXpKov/rHFKteTyG1sPQL1UgI+5dKQzLKLtv7vD6UAjVTZqK9N48 cUl6IBBsYw0BT9KgWD4zOAxxSIa/Kqy9p/FsTkq+kJ0iV3BWYUQwdLH X-Developer-Key: i=arinc.unal@arinc9.com; a=ed25519; pk=VmvgMWwm73yVIrlyJYvGtnXkQJy9CvbaeEqPQO9Z4kA= X-Endpoint-Received: by B4 Relay for arinc.unal@arinc9.com/arinc9-patatt with auth_id=115 X-Original-From: =?utf-8?q?Ar=C4=B1n=C3=A7_=C3=9CNAL?= Reply-To: arinc.unal@arinc9.com From: Ar=C4=B1n=C3=A7 =C3=9CNAL The core_rmw() function calls core_read_mmd_indirect() to read the requested register, and then calls core_write_mmd_indirect() to write the requested value to the register. Because Clause 22 is used to access Clause 45 registers, some operations on core_write_mmd_indirect() are unnecessarily run. Get rid of core_read_mmd_indirect() and core_write_mmd_indirect(), and run only the necessary operations on core_write() and core_rmw(). Reviewed-by: Daniel Golle Tested-by: Daniel Golle Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL --- drivers/net/dsa/mt7530.c | 108 +++++++++++++++++++------------------------= ---- 1 file changed, 43 insertions(+), 65 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index fefa6dd151fa..2650eacf87a7 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -74,116 +74,94 @@ static const struct mt7530_mib_desc mt7530_mib[] =3D { MIB_DESC(1, 0xb8, "RxArlDrop"), }; =20 -/* Since phy_device has not yet been created and - * phy_{read,write}_mmd_indirect is not available, we provide our own - * core_{read,write}_mmd_indirect with core_{clear,write,set} wrappers - * to complete this function. - */ -static int -core_read_mmd_indirect(struct mt7530_priv *priv, int prtad, int devad) +static void +mt7530_mutex_lock(struct mt7530_priv *priv) +{ + if (priv->bus) + mutex_lock_nested(&priv->bus->mdio_lock, MDIO_MUTEX_NESTED); +} + +static void +mt7530_mutex_unlock(struct mt7530_priv *priv) +{ + if (priv->bus) + mutex_unlock(&priv->bus->mdio_lock); +} + +static void +core_write(struct mt7530_priv *priv, u32 reg, u32 val) { struct mii_bus *bus =3D priv->bus; - int value, ret; + int ret; + + mt7530_mutex_lock(priv); =20 /* Write the desired MMD Devad */ ret =3D bus->write(bus, MT753X_CTRL_PHY_ADDR(priv->phy_addr), - MII_MMD_CTRL, devad); + MII_MMD_CTRL, MDIO_MMD_VEND2); if (ret < 0) goto err; =20 /* Write the desired MMD register address */ ret =3D bus->write(bus, MT753X_CTRL_PHY_ADDR(priv->phy_addr), - MII_MMD_DATA, prtad); + MII_MMD_DATA, reg); if (ret < 0) goto err; =20 /* Select the Function : DATA with no post increment */ ret =3D bus->write(bus, MT753X_CTRL_PHY_ADDR(priv->phy_addr), - MII_MMD_CTRL, devad | MII_MMD_CTRL_NOINCR); + MII_MMD_CTRL, MDIO_MMD_VEND2 | MII_MMD_CTRL_NOINCR); if (ret < 0) goto err; =20 - /* Read the content of the MMD's selected register */ - value =3D bus->read(bus, MT753X_CTRL_PHY_ADDR(priv->phy_addr), - MII_MMD_DATA); - - return value; + /* Write the data into MMD's selected register */ + ret =3D bus->write(bus, MT753X_CTRL_PHY_ADDR(priv->phy_addr), + MII_MMD_DATA, val); err: - dev_err(&bus->dev, "failed to read mmd register\n"); + if (ret < 0) + dev_err(&bus->dev, "failed to write mmd register\n"); =20 - return ret; + mt7530_mutex_unlock(priv); } =20 -static int -core_write_mmd_indirect(struct mt7530_priv *priv, int prtad, - int devad, u32 data) +static void +core_rmw(struct mt7530_priv *priv, u32 reg, u32 mask, u32 set) { struct mii_bus *bus =3D priv->bus; + u32 val; int ret; =20 + mt7530_mutex_lock(priv); + /* Write the desired MMD Devad */ ret =3D bus->write(bus, MT753X_CTRL_PHY_ADDR(priv->phy_addr), - MII_MMD_CTRL, devad); + MII_MMD_CTRL, MDIO_MMD_VEND2); if (ret < 0) goto err; =20 /* Write the desired MMD register address */ ret =3D bus->write(bus, MT753X_CTRL_PHY_ADDR(priv->phy_addr), - MII_MMD_DATA, prtad); + MII_MMD_DATA, reg); if (ret < 0) goto err; =20 /* Select the Function : DATA with no post increment */ ret =3D bus->write(bus, MT753X_CTRL_PHY_ADDR(priv->phy_addr), - MII_MMD_CTRL, devad | MII_MMD_CTRL_NOINCR); + MII_MMD_CTRL, MDIO_MMD_VEND2 | MII_MMD_CTRL_NOINCR); if (ret < 0) goto err; =20 + /* Read the content of the MMD's selected register */ + val =3D bus->read(bus, MT753X_CTRL_PHY_ADDR(priv->phy_addr), + MII_MMD_DATA); + val &=3D ~mask; + val |=3D set; /* Write the data into MMD's selected register */ ret =3D bus->write(bus, MT753X_CTRL_PHY_ADDR(priv->phy_addr), - MII_MMD_DATA, data); + MII_MMD_DATA, val); err: if (ret < 0) - dev_err(&bus->dev, - "failed to write mmd register\n"); - return ret; -} - -static void -mt7530_mutex_lock(struct mt7530_priv *priv) -{ - if (priv->bus) - mutex_lock_nested(&priv->bus->mdio_lock, MDIO_MUTEX_NESTED); -} - -static void -mt7530_mutex_unlock(struct mt7530_priv *priv) -{ - if (priv->bus) - mutex_unlock(&priv->bus->mdio_lock); -} - -static void -core_write(struct mt7530_priv *priv, u32 reg, u32 val) -{ - mt7530_mutex_lock(priv); - - core_write_mmd_indirect(priv, reg, MDIO_MMD_VEND2, val); - - mt7530_mutex_unlock(priv); -} - -static void -core_rmw(struct mt7530_priv *priv, u32 reg, u32 mask, u32 set) -{ - u32 val; - - mt7530_mutex_lock(priv); - - val =3D core_read_mmd_indirect(priv, reg, MDIO_MMD_VEND2); - val &=3D ~mask; - val |=3D set; - core_write_mmd_indirect(priv, reg, MDIO_MMD_VEND2, val); + dev_err(&bus->dev, "failed to write mmd register\n"); =20 mt7530_mutex_unlock(priv); } --=20 2.40.1