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Fri, 12 Apr 2024 06:05:59 -0700 From: Sumit Gupta To: , , , , , , CC: , , , , , Subject: [Patch v3 2/2] memory: tegra: make sid and broadcast regions optional Date: Fri, 12 Apr 2024 18:35:40 +0530 Message-ID: <20240412130540.28447-3-sumitg@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240412130540.28447-1-sumitg@nvidia.com> References: <20240412130540.28447-1-sumitg@nvidia.com> X-NVConfidentiality: public Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD81:EE_|CY5PR12MB6480:EE_ X-MS-Office365-Filtering-Correlation-Id: 49dadcf5-ffff-44c4-9795-08dc5af15665 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: ycNzGaB5lvO0HeMKtyuigNihSRgK4vA6Nsk6OLv+W01WqljXnkf5vGVqXLYSbkdZxQxVevp7wPY66y9s+LmvZJOpuB22BbjMkILm3uuytyL0gi1+U+s8Az78OK3JIRYL1F0h/uRfwZkLPou6a5O6CLuROfW9S2vqIMx/O5BckjD+rwEOay6jN54hGY9cgFEI56X3GW+k2Ot+ZIAV8FNRUoe7Q9XmQbFEVXt8RLG7frnffU3xrOuRnu30S7MzsjoOGh4IX5qWkeVTDonpN8Kt2S9owhLZIO/9+thYuSqzxPMbJjQT2B/hOB8Z89xBAiLDZsGbc2q+599zkh0cX1yjnt3FRrwPHkH0voDnIq/ADy1K2RtsGqCSpGujrwnMi7Gnc6RhG7A4Zw/Ui09RGRWlZolI5Cs0jKHrfNwcEZylSN7rsLbOgZ4l25kR13VBJ6W5faod+wkwkdFqjqlctUc1kCa7rPOUHXAU5wkmTiRH+13yPv3AeUI3dd9pkORA9Nn/GyXqJY8yP7l3dRka3/U0Ep2PZ14obArd9Mf3CrXhcoC/jRwvIB2vNKP7iVqBVIjR9jKv3dqfY4bw682OpHeJZTnYlf7VV6v3xMJC0OSPyFsOL1YHnD0tzZ8KCxSgfxyCKOPTUSrPJGLsQJCwqA6J0rX9at6Ls9mLAZr0dr+eO5+1Z8BNFVsU7s+sIlzwxgOCKl7TAIl0i+2Bg7ip6g9Lswlga0ymZ1vsGU1cU4GBwh6zcTiFgs1x2ZveVYNYqeIe X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230031)(36860700004)(82310400014)(1800799015)(376005);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Apr 2024 13:06:16.1322 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 49dadcf5-ffff-44c4-9795-08dc5af15665 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD81.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6480 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" MC SID and Broadbast channel register access is restricted for Guest VM. In Tegra MC driver, consider both the regions as optional and skip access to restricted registers from Guest if a region is not present in Guest DT. Signed-off-by: Sumit Gupta --- drivers/memory/tegra/mc.c | 9 ++++++++- drivers/memory/tegra/mc.h | 22 ++++++++++++---------- drivers/memory/tegra/tegra186.c | 25 +++++++++++++------------ 3 files changed, 33 insertions(+), 23 deletions(-) diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c index 224b488794e5..d819dab1b223 100644 --- a/drivers/memory/tegra/mc.c +++ b/drivers/memory/tegra/mc.c @@ -899,6 +899,7 @@ static void tegra_mc_num_channel_enabled(struct tegra_m= c *mc) =20 static int tegra_mc_probe(struct platform_device *pdev) { + struct resource *res; struct tegra_mc *mc; u64 mask; int err; @@ -923,7 +924,13 @@ static int tegra_mc_probe(struct platform_device *pdev) /* length of MC tick in nanoseconds */ mc->tick =3D 30; =20 - mc->regs =3D devm_platform_ioremap_resource(pdev, 0); + if (mc->soc->num_channels) { + res =3D platform_get_resource_byname(pdev, IORESOURCE_MEM, "sid"); + if (res) + mc->regs =3D devm_ioremap_resource(&pdev->dev, res); + } else { + mc->regs =3D devm_platform_ioremap_resource(pdev, 0); + } if (IS_ERR(mc->regs)) return PTR_ERR(mc->regs); =20 diff --git a/drivers/memory/tegra/mc.h b/drivers/memory/tegra/mc.h index c3f6655bec60..7e7bd3e09cdc 100644 --- a/drivers/memory/tegra/mc.h +++ b/drivers/memory/tegra/mc.h @@ -112,25 +112,27 @@ icc_provider_to_tegra_mc(struct icc_provider *provide= r) static inline u32 mc_ch_readl(const struct tegra_mc *mc, int ch, unsigned long offset) { - if (!mc->bcast_ch_regs) - return 0; - - if (ch =3D=3D MC_BROADCAST_CHANNEL) + if (ch =3D=3D MC_BROADCAST_CHANNEL) { + if (!mc->bcast_ch_regs) + return 0; return readl_relaxed(mc->bcast_ch_regs + offset); + } else if (mc->ch_regs) { + return readl_relaxed(mc->ch_regs[ch] + offset); + } =20 - return readl_relaxed(mc->ch_regs[ch] + offset); + return 0; } =20 static inline void mc_ch_writel(const struct tegra_mc *mc, int ch, u32 value, unsigned long offset) { - if (!mc->bcast_ch_regs) - return; - - if (ch =3D=3D MC_BROADCAST_CHANNEL) + if (ch =3D=3D MC_BROADCAST_CHANNEL) { + if (!mc->bcast_ch_regs) + return; writel_relaxed(value, mc->bcast_ch_regs + offset); - else + } else if (mc->ch_regs) { writel_relaxed(value, mc->ch_regs[ch] + offset); + } } =20 static inline u32 mc_readl(const struct tegra_mc *mc, unsigned long offset) diff --git a/drivers/memory/tegra/tegra186.c b/drivers/memory/tegra/tegra18= 6.c index 1b3183951bfe..716582255eeb 100644 --- a/drivers/memory/tegra/tegra186.c +++ b/drivers/memory/tegra/tegra186.c @@ -26,20 +26,16 @@ static int tegra186_mc_probe(struct tegra_mc *mc) { struct platform_device *pdev =3D to_platform_device(mc->dev); + struct resource *res; unsigned int i; - char name[8]; + char name[14]; int err; =20 - mc->bcast_ch_regs =3D devm_platform_ioremap_resource_byname(pdev, "broadc= ast"); - if (IS_ERR(mc->bcast_ch_regs)) { - if (PTR_ERR(mc->bcast_ch_regs) =3D=3D -EINVAL) { - dev_warn(&pdev->dev, - "Broadcast channel is missing, please update your device-tree\n"); - mc->bcast_ch_regs =3D NULL; - goto populate; - } - - return PTR_ERR(mc->bcast_ch_regs); + res =3D platform_get_resource_byname(pdev, IORESOURCE_MEM, "broadcast"); + if (res) { + mc->bcast_ch_regs =3D devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(mc->bcast_ch_regs)) + return PTR_ERR(mc->bcast_ch_regs); } =20 mc->ch_regs =3D devm_kcalloc(mc->dev, mc->soc->num_channels, sizeof(*mc->= ch_regs), @@ -55,7 +51,6 @@ static int tegra186_mc_probe(struct tegra_mc *mc) return PTR_ERR(mc->ch_regs[i]); } =20 -populate: err =3D of_platform_populate(mc->dev->of_node, NULL, NULL, mc->dev); if (err < 0) return err; @@ -121,6 +116,9 @@ static int tegra186_mc_probe_device(struct tegra_mc *mc= , struct device *dev) if (!tegra_dev_iommu_get_stream_id(dev, &sid)) return 0; =20 + if (!mc->regs) + return 0; + while (!of_parse_phandle_with_args(dev->of_node, "interconnects", "#inter= connect-cells", index, &args)) { if (args.np =3D=3D mc->dev->of_node && args.args_count !=3D 0) { @@ -146,6 +144,9 @@ static int tegra186_mc_resume(struct tegra_mc *mc) #if IS_ENABLED(CONFIG_IOMMU_API) unsigned int i; =20 + if (!mc->regs) + return 0; + for (i =3D 0; i < mc->soc->num_clients; i++) { const struct tegra_mc_client *client =3D &mc->soc->clients[i]; =20 --=20 2.17.1