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Signed-off-by: David Yang --- drivers/clk/hisilicon/clk-hi3559a.c | 230 +++++----------------------- 1 file changed, 37 insertions(+), 193 deletions(-) diff --git a/drivers/clk/hisilicon/clk-hi3559a.c b/drivers/clk/hisilicon/cl= k-hi3559a.c index c79a94f6d9d2..1902d943fe34 100644 --- a/drivers/clk/hisilicon/clk-hi3559a.c +++ b/drivers/clk/hisilicon/clk-hi3559a.c @@ -11,7 +11,6 @@ #include #include #include -#include =20 #include =20 @@ -452,9 +451,11 @@ static const struct clk_ops hisi_clk_pll_ops =3D { .recalc_rate =3D clk_pll_recalc_rate, }; =20 -static void hisi_clk_register_pll(struct hi3559av100_pll_clock *clks, - int nums, struct hisi_clock_data *data, struct device *dev) +static int +hisi_clk_register_pll(struct device *dev, const void *clocks, + size_t num, struct hisi_clock_data *data) { + const struct hi3559av100_pll_clock *clks =3D clocks; void __iomem *base =3D data->base; struct hi3559av100_clk_pll *p_clk =3D NULL; struct clk *clk =3D NULL; @@ -462,10 +463,11 @@ static void hisi_clk_register_pll(struct hi3559av100_= pll_clock *clks, int i; =20 p_clk =3D devm_kcalloc(dev, nums, sizeof(*p_clk), GFP_KERNEL); + if (!p_clk) - return; + return -ENOMEM; =20 - for (i =3D 0; i < nums; i++) { + for (i =3D 0; i < num; i++) { init.name =3D clks[i].name; init.flags =3D 0; init.parent_names =3D @@ -492,78 +494,27 @@ static void hisi_clk_register_pll(struct hi3559av100_= pll_clock *clks, if (IS_ERR(clk)) { dev_err(dev, "%s: failed to register clock %s\n", __func__, clks[i].name); - continue; + return PTR_ERR(clk); } =20 data->clk_data.clks[clks[i].id] =3D clk; p_clk++; } -} - -static struct hisi_clock_data *hi3559av100_clk_register( - struct platform_device *pdev) -{ - struct hisi_clock_data *clk_data; - int ret; - - clk_data =3D hisi_clk_alloc(pdev, HI3559AV100_CRG_NR_CLKS); - if (!clk_data) - return ERR_PTR(-ENOMEM); - - ret =3D hisi_clk_register_fixed_rate(hi3559av100_fixed_rate_clks_crg, - ARRAY_SIZE(hi3559av100_fixed_rate_clks_crg), clk_data); - if (ret) - return ERR_PTR(ret); - - hisi_clk_register_pll(hi3559av100_pll_clks, - ARRAY_SIZE(hi3559av100_pll_clks), clk_data, &pdev->dev); - - ret =3D hisi_clk_register_mux(hi3559av100_mux_clks_crg, - ARRAY_SIZE(hi3559av100_mux_clks_crg), clk_data); - if (ret) - goto unregister_fixed_rate; - - ret =3D hisi_clk_register_gate(hi3559av100_gate_clks, - ARRAY_SIZE(hi3559av100_gate_clks), clk_data); - if (ret) - goto unregister_mux; - - ret =3D of_clk_add_provider(pdev->dev.of_node, - of_clk_src_onecell_get, &clk_data->clk_data); - if (ret) - goto unregister_gate; - - return clk_data; - -unregister_gate: - hisi_clk_unregister_gate(hi3559av100_gate_clks, - ARRAY_SIZE(hi3559av100_gate_clks), clk_data); -unregister_mux: - hisi_clk_unregister_mux(hi3559av100_mux_clks_crg, - ARRAY_SIZE(hi3559av100_mux_clks_crg), clk_data); -unregister_fixed_rate: - hisi_clk_unregister_fixed_rate(hi3559av100_fixed_rate_clks_crg, - ARRAY_SIZE(hi3559av100_fixed_rate_clks_crg), clk_data); - return ERR_PTR(ret); -} - -static void hi3559av100_clk_unregister(struct platform_device *pdev) -{ - struct hisi_crg_dev *crg =3D platform_get_drvdata(pdev); =20 - of_clk_del_provider(pdev->dev.of_node); - - hisi_clk_unregister_gate(hi3559av100_gate_clks, - ARRAY_SIZE(hi3559av100_gate_clks), crg->clk_data); - hisi_clk_unregister_mux(hi3559av100_mux_clks_crg, - ARRAY_SIZE(hi3559av100_mux_clks_crg), crg->clk_data); - hisi_clk_unregister_fixed_rate(hi3559av100_fixed_rate_clks_crg, - ARRAY_SIZE(hi3559av100_fixed_rate_clks_crg), crg->clk_data); + return 0; } =20 -static const struct hisi_crg_funcs hi3559av100_crg_funcs =3D { - .register_clks =3D hi3559av100_clk_register, - .unregister_clks =3D hi3559av100_clk_unregister, +static const struct hisi_clocks hi3559av100_clks =3D { + .nr =3D HI3559AV100_CRG_NR_CLKS, + .fixed_rate_clks =3D hi3559av100_fixed_rate_clks_crg, + .fixed_rate_clks_num =3D ARRAY_SIZE(hi3559av100_fixed_rate_clks_crg), + .mux_clks =3D hi3559av100_mux_clks_crg, + .mux_clks_num =3D ARRAY_SIZE(hi3559av100_mux_clks_crg), + .gate_clks =3D hi3559av100_gate_clks, + .gate_clks_num =3D ARRAY_SIZE(hi3559av100_gate_clks), + .customized_clks =3D hi3559av100_pll_clks, + .customized_clks_num =3D ARRAY_SIZE(hi3559av100_pll_clks), + .clk_register_customized =3D hisi_clk_register_pll, }; =20 static struct hisi_fixed_rate_clock hi3559av100_shub_fixed_rate_clks[] =3D= { @@ -671,7 +622,7 @@ static struct hisi_gate_clock hi3559av100_shub_gate_clk= s[] =3D { }, }; =20 -static int hi3559av100_shub_default_clk_set(void) +static int hi3559av100_shub_default_clk_set(struct device *dev, struct his= i_clock_data *data) { void __iomem *crg_base; unsigned int val; @@ -694,148 +645,41 @@ static int hi3559av100_shub_default_clk_set(void) return 0; } =20 -static struct hisi_clock_data *hi3559av100_shub_clk_register( - struct platform_device *pdev) -{ - struct hisi_clock_data *clk_data =3D NULL; - int ret; - - hi3559av100_shub_default_clk_set(); - - clk_data =3D hisi_clk_alloc(pdev, HI3559AV100_SHUB_NR_CLKS); - if (!clk_data) - return ERR_PTR(-ENOMEM); - - ret =3D hisi_clk_register_fixed_rate(hi3559av100_shub_fixed_rate_clks, - ARRAY_SIZE(hi3559av100_shub_fixed_rate_clks), clk_data); - if (ret) - return ERR_PTR(ret); - - ret =3D hisi_clk_register_mux(hi3559av100_shub_mux_clks, - ARRAY_SIZE(hi3559av100_shub_mux_clks), clk_data); - if (ret) - goto unregister_fixed_rate; - - ret =3D hisi_clk_register_divider(hi3559av100_shub_div_clks, - ARRAY_SIZE(hi3559av100_shub_div_clks), clk_data); - if (ret) - goto unregister_mux; - - ret =3D hisi_clk_register_gate(hi3559av100_shub_gate_clks, - ARRAY_SIZE(hi3559av100_shub_gate_clks), clk_data); - if (ret) - goto unregister_factor; - - ret =3D of_clk_add_provider(pdev->dev.of_node, - of_clk_src_onecell_get, &clk_data->clk_data); - if (ret) - goto unregister_gate; - - return clk_data; - -unregister_gate: - hisi_clk_unregister_gate(hi3559av100_shub_gate_clks, - ARRAY_SIZE(hi3559av100_shub_gate_clks), clk_data); -unregister_factor: - hisi_clk_unregister_divider(hi3559av100_shub_div_clks, - ARRAY_SIZE(hi3559av100_shub_div_clks), clk_data); -unregister_mux: - hisi_clk_unregister_mux(hi3559av100_shub_mux_clks, - ARRAY_SIZE(hi3559av100_shub_mux_clks), clk_data); -unregister_fixed_rate: - hisi_clk_unregister_fixed_rate(hi3559av100_shub_fixed_rate_clks, - ARRAY_SIZE(hi3559av100_shub_fixed_rate_clks), clk_data); - return ERR_PTR(ret); -} - -static void hi3559av100_shub_clk_unregister(struct platform_device *pdev) -{ - struct hisi_crg_dev *crg =3D platform_get_drvdata(pdev); - - of_clk_del_provider(pdev->dev.of_node); - - hisi_clk_unregister_gate(hi3559av100_shub_gate_clks, - ARRAY_SIZE(hi3559av100_shub_gate_clks), crg->clk_data); - hisi_clk_unregister_divider(hi3559av100_shub_div_clks, - ARRAY_SIZE(hi3559av100_shub_div_clks), crg->clk_data); - hisi_clk_unregister_mux(hi3559av100_shub_mux_clks, - ARRAY_SIZE(hi3559av100_shub_mux_clks), crg->clk_data); - hisi_clk_unregister_fixed_rate(hi3559av100_shub_fixed_rate_clks, - ARRAY_SIZE(hi3559av100_shub_fixed_rate_clks), crg->clk_data); -} - -static const struct hisi_crg_funcs hi3559av100_shub_crg_funcs =3D { - .register_clks =3D hi3559av100_shub_clk_register, - .unregister_clks =3D hi3559av100_shub_clk_unregister, +static const struct hisi_clocks hi3559av100_shub_clks =3D { + .nr =3D HI3559AV100_SHUB_NR_CLKS, + .prologue =3D hi3559av100_shub_default_clk_set, + .fixed_rate_clks =3D hi3559av100_shub_fixed_rate_clks, + .fixed_rate_clks_num =3D ARRAY_SIZE(hi3559av100_shub_fixed_rate_clks), + .mux_clks =3D hi3559av100_shub_mux_clks, + .mux_clks_num =3D ARRAY_SIZE(hi3559av100_shub_mux_clks), + .divider_clks =3D hi3559av100_shub_div_clks, + .divider_clks_num =3D ARRAY_SIZE(hi3559av100_shub_div_clks), + .gate_clks =3D hi3559av100_shub_gate_clks, + .gate_clks_num =3D ARRAY_SIZE(hi3559av100_shub_gate_clks), }; =20 static const struct of_device_id hi3559av100_crg_match_table[] =3D { { .compatible =3D "hisilicon,hi3559av100-clock", - .data =3D &hi3559av100_crg_funcs + .data =3D &hi3559av100_clks }, { .compatible =3D "hisilicon,hi3559av100-shub-clock", - .data =3D &hi3559av100_shub_crg_funcs + .data =3D &hi3559av100_shub_clks }, { } }; MODULE_DEVICE_TABLE(of, hi3559av100_crg_match_table); =20 -static int hi3559av100_crg_probe(struct platform_device *pdev) -{ - struct hisi_crg_dev *crg; - - crg =3D devm_kmalloc(&pdev->dev, sizeof(*crg), GFP_KERNEL); - if (!crg) - return -ENOMEM; - - crg->funcs =3D of_device_get_match_data(&pdev->dev); - if (!crg->funcs) - return -ENOENT; - - crg->rstc =3D hisi_reset_init(pdev); - if (!crg->rstc) - return -ENOMEM; - - crg->clk_data =3D crg->funcs->register_clks(pdev); - if (IS_ERR(crg->clk_data)) { - hisi_reset_exit(crg->rstc); - return PTR_ERR(crg->clk_data); - } - - platform_set_drvdata(pdev, crg); - return 0; -} - -static void hi3559av100_crg_remove(struct platform_device *pdev) -{ - struct hisi_crg_dev *crg =3D platform_get_drvdata(pdev); - - hisi_reset_exit(crg->rstc); - crg->funcs->unregister_clks(pdev); -} - static struct platform_driver hi3559av100_crg_driver =3D { - .probe =3D hi3559av100_crg_probe, - .remove_new =3D hi3559av100_crg_remove, + .probe =3D hisi_crg_probe, + .remove_new =3D hisi_crg_remove, .driver =3D { .name =3D "hi3559av100-clock", .of_match_table =3D hi3559av100_crg_match_table, }, }; =20 -static int __init hi3559av100_crg_init(void) -{ - return platform_driver_register(&hi3559av100_crg_driver); -} -core_initcall(hi3559av100_crg_init); - -static void __exit hi3559av100_crg_exit(void) -{ - platform_driver_unregister(&hi3559av100_crg_driver); -} -module_exit(hi3559av100_crg_exit); - +module_platform_driver(hi3559av100_crg_driver); =20 MODULE_DESCRIPTION("HiSilicon Hi3559AV100 CRG Driver"); --=20 2.43.0