From nobody Mon Feb 9 21:26:45 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2C8F11CD767; Thu, 11 Apr 2024 16:51:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712854293; cv=none; b=WNB6aCYhcxxakSLzrk/6ICSB3DeXyni/hmGjpVSKrFmeMVDt88y895Fjc3H84NLYRl8nABMF7AfoZrnXIvAj4fecsvn+ffJVSWp1O7EG37lnPd4WS3ro/Mx8FQwGmFVDqSUqxEk+dLKJLW1FqVOxRPBORv4x9S1Is4+1xwSQIRE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712854293; c=relaxed/simple; bh=FYySerEVyxAANRgwbcY5kk9JJxQ+XKSqpf8jmMBQ6fQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Jp3oxeuAAt5JkL6PhGV68/KNiR+Nx4bpyY7/t49jvEvjGO1PibrmjrFGbml4WDbO9OGN62qiXe3uM79w0C9ihjk+cfHaIbIGUWEknjzf99gTd1p6aARVdpMne+GP1ipGatNBc713vIXwpOQUdRRwUsM6jDGgjyh6Db3bNXdMKIw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=SUopm/Xp; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="SUopm/Xp" Received: by smtp.kernel.org (Postfix) with ESMTPS id D26E4C113CD; Thu, 11 Apr 2024 16:51:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1712854292; bh=FYySerEVyxAANRgwbcY5kk9JJxQ+XKSqpf8jmMBQ6fQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=SUopm/XpBbnNFw4DfBIfabmlKLb3QvPx5QIat4nEPnEVdSa9hlqYYrccoccpMZrTT KaXTw1Uvda/t1dIJVH7p44L/wG/nhRsPzE9zEKYW22EAQY1R+9r6D/KERMH2GjSH5q XAPoS+EoeldKla6EAB3hL3DiCLr6BSa0GrpqqC5LL51ullWE2sC2k19I25GtOz4WpT CjKD2VouBMSs14oX8eQPNIgEEieop5c3zDktsGTGzsq4XCf7YzVCks9wgaMWhdwyQj buvvFSY5kHnxa46LAhHOKulagfYgCqyhOybrYg1orZ9zB9SeJjL+uR96prVBPoIEs9 D/rUk3DaW0/Jw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id BF4DFC04FF0; Thu, 11 Apr 2024 16:51:32 +0000 (UTC) From: Alexandru Marc Serdeliuc via B4 Relay Date: Thu, 11 Apr 2024 18:51:30 +0200 Subject: [PATCH v6 1/2] dt-bindings: arm: qcom: Add Samsung Galaxy Z Fold5 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240411-samsung-galaxy-zfold5-q5q-v6-1-8142297515aa@yahoo.com> References: <20240411-samsung-galaxy-zfold5-q5q-v6-0-8142297515aa@yahoo.com> In-Reply-To: <20240411-samsung-galaxy-zfold5-q5q-v6-0-8142297515aa@yahoo.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Alexandru Marc Serdeliuc X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1712854291; l=880; i=serdeliuk@yahoo.com; s=20240326; h=from:subject:message-id; bh=rbDG1dSELlka8CHOFtXAwuR4DJTaBLOcUGeig6bRpXg=; b=uZy1vrriVfkXbit7KGtAKdP07y4/PCTJ4Far8/gTqz02K8SZkn49X7gGbDj63CB6OG83XrmK8 eNOU1PyY9TWCMEF1zg2KAPmNrLZkSrrLsvSQRqoWAly9nAZ+BEvNFGy X-Developer-Key: i=serdeliuk@yahoo.com; a=ed25519; pk=aWyveUE11qfDOOlRIFayXukrNn39BvZ9k9uq94dAsgY= X-Endpoint-Received: by B4 Relay for serdeliuk@yahoo.com/20240326 with auth_id=147 X-Original-From: Alexandru Marc Serdeliuc Reply-To: serdeliuk@yahoo.com From: Alexandru Marc Serdeliuc This documents Samsung Galaxy Z Fold5 (samsung,q5q) which is a foldable phone by Samsung based on the sm8550 SoC. Acked-by: Krzysztof Kozlowski Acked-by: Rob Herring Signed-off-by: Alexandru Marc Serdeliuc --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentatio= n/devicetree/bindings/arm/qcom.yaml index 66beaac60e1d..dea2a23b8fc2 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -1003,6 +1003,7 @@ properties: - qcom,sm8550-hdk - qcom,sm8550-mtp - qcom,sm8550-qrd + - samsung,q5q - const: qcom,sm8550 =20 - items: --=20 2.34.1 From nobody Mon Feb 9 21:26:45 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3F73C1CD76B; Thu, 11 Apr 2024 16:51:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240411-samsung-galaxy-zfold5-q5q-v6-2-8142297515aa@yahoo.com> References: <20240411-samsung-galaxy-zfold5-q5q-v6-0-8142297515aa@yahoo.com> In-Reply-To: <20240411-samsung-galaxy-zfold5-q5q-v6-0-8142297515aa@yahoo.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Alexandru Marc Serdeliuc X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1712854291; l=17073; i=serdeliuk@yahoo.com; s=20240326; h=from:subject:message-id; bh=CZGndGkICFRpWogWNzISn+cAfKht2ANsBsu7/1kY7+8=; b=Q624nuZVItcf1T2i62Sx+wKPrkJDGkLt1Pk2YdIOegK7uUl1i0A9gZo41oydI2RCzWMwPizoU FZPP9oXI1ENAHx1Dz1KhOQA+1+R23KNTUIVv8tm3H10egL9CupYXy0J X-Developer-Key: i=serdeliuk@yahoo.com; a=ed25519; pk=aWyveUE11qfDOOlRIFayXukrNn39BvZ9k9uq94dAsgY= X-Endpoint-Received: by B4 Relay for serdeliuk@yahoo.com/20240326 with auth_id=147 X-Original-From: Alexandru Marc Serdeliuc Reply-To: serdeliuk@yahoo.com From: Alexandru Marc Serdeliuc Add support for Samsung Galaxy Z Fold5 (q5q) foldable phone based on sm8550 Currently working features: - Framebuffer - UFS - i2c - Buttons Signed-off-by: Alexandru Marc Serdeliuc Acked-by: Krzysztof Kozlowski Acked-by: Rob Herring --- arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/sm8550-samsung-q5q.dts | 593 ++++++++++++++++++++= ++++ 2 files changed, 594 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/M= akefile index 7d40ec5e7d21..a7503fd35b6c 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -241,6 +241,7 @@ dtb-$(CONFIG_ARCH_QCOM) +=3D sm8450-sony-xperia-nagara-= pdx224.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sm8550-hdk.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sm8550-mtp.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sm8550-qrd.dtb +dtb-$(CONFIG_ARCH_QCOM) +=3D sm8550-samsung-q5q.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sm8650-mtp.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sm8650-qrd.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D x1e80100-crd.dtb diff --git a/arch/arm64/boot/dts/qcom/sm8550-samsung-q5q.dts b/arch/arm64/b= oot/dts/qcom/sm8550-samsung-q5q.dts new file mode 100644 index 000000000000..4654ae1364ba --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sm8550-samsung-q5q.dts @@ -0,0 +1,593 @@ +// SPDX-License-cdsp_memIdentifier: BSD-3-Clause +/* + * Copyright (c) 2024, Alexandru Marc Serdeliuc + * Copyright (c) 2024, David Wronek + * Copyright (c) 2022, Linaro Limited + */ + +/dts-v1/; + +#include +#include +#include "sm8550.dtsi" +#include "pm8550.dtsi" +#include "pm8550vs.dtsi" +#include "pmk8550.dtsi" + +/delete-node/ &adspslpi_mem; +/delete-node/ &cdsp_mem; +/delete-node/ &mpss_dsm_mem; +/delete-node/ &mpss_mem; +/delete-node/ &rmtfs_mem; + +/ { + model =3D "Samsung Galaxy Z Fold5"; + compatible =3D "samsung,q5q", "qcom,sm8550"; + chassis-type =3D "handset"; + + aliases { + serial0 =3D &uart7; + }; + + chosen { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + framebuffer: framebuffer@b8000000 { + compatible =3D "simple-framebuffer"; + reg =3D <0x0 0xb8000000 0x0 0x2b00000>; + width =3D <2176>; + height =3D <1812>; + stride =3D <(2176 * 4)>; + format =3D "a8r8g8b8"; + }; + }; + + gpio-keys { + compatible =3D "gpio-keys"; + pinctrl-0 =3D <&volume_up_n>; + pinctrl-names =3D "default"; + + key-volume-up { + label =3D "Volume Up"; + linux,code =3D ; + gpios =3D <&pm8550_gpios 6 GPIO_ACTIVE_LOW>; + debounce-interval =3D <15>; + linux,can-disable; + wakeup-source; + }; + }; + + vph_pwr: vph-pwr-regulator { + compatible =3D "regulator-fixed"; + regulator-name =3D "vph_pwr"; + regulator-min-microvolt =3D <3700000>; + regulator-max-microvolt =3D <3700000>; + regulator-always-on; + regulator-boot-on; + }; + + reserved-memory { + adspslpi_mem: adspslpi@9ea00000 { + reg =3D <0x0 0x9ea00000 0x0 0x59b4000>; + no-map; + }; + + cdsp_mem: cdsp-region@9c900000 { + reg =3D <0 0x9c900000 0 0x2000000>; + no-map; + }; + + mpss_dsm_mem: mpss-dsm@d4d00000 { + reg =3D <0x0 0xd4d00000 0x0 0x3300000>; + no-map; + }; + + mpss_mem: mpss@8b400000 { + reg =3D <0x0 0x8b400000 0x0 0xfc00000>; + no-map; + }; + + rmtfs_mem: rmtfs-region@d4a80000 { + reg =3D <0x0 0xd4a80000 0x0 0x280000>; + no-map; + }; + + /* + * The bootloader will only keep display hardware enabled + * if this memory region is named exactly 'splash_region' + */ + splash_region@b8000000 { + reg =3D <0x0 0xb8000000 0x0 0x2b00000>; + no-map; + }; + }; +}; + +&apps_rsc { + regulators-0 { + compatible =3D "qcom,pm8550-rpmh-regulators"; + qcom,pmic-id =3D "b"; + + vreg_bob1: bob1 { + regulator-name =3D "vreg_bob1"; + regulator-min-microvolt =3D <3296000>; + regulator-max-microvolt =3D <3960000>; + regulator-initial-mode =3D ; + }; + + vreg_bob2: bob2 { + regulator-name =3D "vreg_bob2"; + regulator-min-microvolt =3D <2720000>; + regulator-max-microvolt =3D <3960000>; + regulator-initial-mode =3D ; + }; + + vreg_l1b_1p8: ldo1 { + regulator-name =3D "vreg_l1b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l2b_3p0: ldo2 { + regulator-name =3D "vreg_l2b_3p0"; + regulator-min-microvolt =3D <3008000>; + regulator-max-microvolt =3D <3008000>; + regulator-initial-mode =3D ; + }; + + vreg_l5b_3p1: ldo5 { + regulator-name =3D "vreg_l5b_3p1"; + regulator-min-microvolt =3D <3104000>; + regulator-max-microvolt =3D <3104000>; + regulator-initial-mode =3D ; + }; + + vreg_l6b_1p8: ldo6 { + regulator-name =3D "vreg_l6b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3008000>; + regulator-initial-mode =3D ; + }; + + vreg_l7b_1p8: ldo7 { + regulator-name =3D "vreg_l7b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3008000>; + regulator-initial-mode =3D ; + }; + + vreg_l8b_1p8: ldo8 { + regulator-name =3D "vreg_l8b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3008000>; + regulator-initial-mode =3D ; + }; + + vreg_l9b_2p9: ldo9 { + regulator-name =3D "vreg_l9b_2p9"; + regulator-min-microvolt =3D <2960000>; + regulator-max-microvolt =3D <3008000>; + regulator-initial-mode =3D ; + }; + + vreg_l11b_1p2: ldo11 { + regulator-name =3D "vreg_l11b_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1504000>; + regulator-initial-mode =3D ; + }; + + vreg_l12b_1p8: ldo12 { + regulator-name =3D "vreg_l12b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l13b_3p0: ldo13 { + regulator-name =3D "vreg_l13b_3p0"; + regulator-min-microvolt =3D <3000000>; + regulator-max-microvolt =3D <3000000>; + regulator-initial-mode =3D ; + }; + + vreg_l14b_3p2: ldo14 { + regulator-name =3D "vreg_l14b_3p2"; + regulator-min-microvolt =3D <3200000>; + regulator-max-microvolt =3D <3200000>; + regulator-initial-mode =3D ; + }; + + vreg_l15b_1p8: ldo15 { + regulator-name =3D "vreg_l15b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + regulator-always-on; + }; + + vreg_l16b_2p8: ldo16 { + regulator-name =3D "vreg_l16b_2p8"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + regulator-initial-mode =3D ; + }; + + vreg_l17b_2p5: ldo17 { + regulator-name =3D "vreg_l17b_2p5"; + regulator-min-microvolt =3D <2504000>; + regulator-max-microvolt =3D <2504000>; + regulator-initial-mode =3D ; + }; + }; + + regulators-1 { + compatible =3D "qcom,pm8550vs-rpmh-regulators"; + qcom,pmic-id =3D "c"; + + vreg_l3c_0p91: ldo3 { + regulator-name =3D "vreg_l3c_0p9"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <912000>; + regulator-initial-mode =3D ; + }; + }; + + regulators-2 { + compatible =3D "qcom,pm8550vs-rpmh-regulators"; + qcom,pmic-id =3D "d"; + + vreg_l1d_0p88: ldo1 { + regulator-name =3D "vreg_l1d_0p88"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + }; + + regulators-3 { + compatible =3D "qcom,pm8550vs-rpmh-regulators"; + qcom,pmic-id =3D "e"; + + vreg_s4e_0p9: smps4 { + regulator-name =3D "vreg_s4e_0p9"; + regulator-min-microvolt =3D <904000>; + regulator-max-microvolt =3D <984000>; + regulator-initial-mode =3D ; + }; + + vreg_s5e_1p1: smps5 { + regulator-name =3D "vreg_s5e_1p1"; + regulator-min-microvolt =3D <1080000>; + regulator-max-microvolt =3D <1120000>; + regulator-initial-mode =3D ; + }; + + vreg_l1e_0p88: ldo1 { + regulator-name =3D "vreg_l1e_0p88"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <880000>; + regulator-initial-mode =3D ; + }; + + vreg_l2e_0p9: ldo2 { + regulator-name =3D "vreg_l2e_0p9"; + regulator-min-microvolt =3D <904000>; + regulator-max-microvolt =3D <970000>; + regulator-initial-mode =3D ; + }; + + vreg_l3e_1p2: ldo3 { + regulator-name =3D "vreg_l3e_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + }; + + regulators-4 { + compatible =3D "qcom,pm8550ve-rpmh-regulators"; + qcom,pmic-id =3D "f"; + + vreg_s4f_0p5: smps4 { + regulator-name =3D "vreg_s4f_0p5"; + regulator-min-microvolt =3D <500000>; + regulator-max-microvolt =3D <700000>; + regulator-initial-mode =3D ; + }; + + vreg_l1f_0p9: ldo1 { + regulator-name =3D "vreg_l1f_0p9"; + regulator-min-microvolt =3D <912000>; + regulator-max-microvolt =3D <912000>; + regulator-initial-mode =3D ; + }; + + vreg_l2f_0p88: ldo2 { + regulator-name =3D "vreg_l2f_0p88"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <912000>; + regulator-initial-mode =3D ; + }; + + vreg_l3f_0p91: ldo3 { + regulator-name =3D "vreg_l3f_0p91"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <912000>; + regulator-initial-mode =3D ; + }; + }; + + regulators-5 { + compatible =3D "qcom,pm8550vs-rpmh-regulators"; + qcom,pmic-id =3D "g"; + + vreg_s1g_1p2: smps1 { + regulator-name =3D "vreg_s1g_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1300000>; + regulator-initial-mode =3D ; + }; + + vreg_s2g_0p8: smps2 { + regulator-name =3D "vreg_s2g_0p8"; + regulator-min-microvolt =3D <800000>; + regulator-max-microvolt =3D <1000000>; + regulator-initial-mode =3D ; + }; + + vreg_s3g_0p7: smps3 { + regulator-name =3D "vreg_s3g_0p7"; + regulator-min-microvolt =3D <300000>; + regulator-max-microvolt =3D <1004000>; + regulator-initial-mode =3D ; + }; + + vreg_s4g_1p3: smps4 { + regulator-name =3D "vreg_s4g_1p3"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1352000>; + regulator-initial-mode =3D ; + }; + + vreg_s5g_0p8: smps5 { + regulator-name =3D "vreg_s5g_0p8"; + regulator-min-microvolt =3D <500000>; + regulator-max-microvolt =3D <1004000>; + regulator-initial-mode =3D ; + }; + + vreg_s6g_1p8: smps6 { + regulator-name =3D "vreg_s6g_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <2000000>; + regulator-initial-mode =3D ; + }; + + vreg_l1g_1p2: ldo1 { + regulator-name =3D "vreg_l1g_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + + vreg_l2g_1p2: ldo2 { + regulator-name =3D "vreg_l2g_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + + vreg_l3g_1p2: ldo3 { + regulator-name =3D "vreg_l3g_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + }; + + regulators-6 { + compatible =3D "qcom,pm8010-rpmh-regulators"; + qcom,pmic-id =3D "m"; + + vreg_l1m_1p056: ldo1 { + regulator-name =3D "vreg_l1m_1p056"; + regulator-min-microvolt =3D <1056000>; + regulator-max-microvolt =3D <1056000>; + regulator-initial-mode =3D ; + }; + + vreg_l2m_1p056: ldo2 { + regulator-name =3D "vreg_l2m_1p056"; + regulator-min-microvolt =3D <1056000>; + regulator-max-microvolt =3D <1056000>; + regulator-initial-mode =3D ; + }; + + vreg_l3m_2p8: ldo3 { + regulator-name =3D "vreg_l3m_2p8"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + regulator-initial-mode =3D ; + }; + + vreg_l4m_2p8: ldo4 { + regulator-name =3D "vreg_l4m_2p8"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + regulator-initial-mode =3D ; + }; + + vreg_l5m_1p8: ldo5 { + regulator-name =3D "vreg_l5m_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l6m_1p8: ldo6 { + regulator-name =3D "vreg_l6m_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l7m_2p9: ldo7 { + regulator-name =3D "vreg_l7m_2p9"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2904000>; + regulator-initial-mode =3D ; + }; + }; + + regulators-7 { + compatible =3D "qcom,pm8010-rpmh-regulators"; + qcom,pmic-id =3D "n"; + + vreg_l1n_1p1: ldo1 { + regulator-name =3D "vreg_l1n_1p1"; + regulator-min-microvolt =3D <1104000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + + vreg_l2n_1p1: ldo2 { + regulator-name =3D "vreg_l2n_1p1"; + regulator-min-microvolt =3D <1104000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + + vreg_l3n_2p8: ldo3 { + regulator-name =3D "vreg_l3n_2p8"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <3000000>; + regulator-initial-mode =3D ; + }; + + vreg_l4n_2p8: ldo4 { + regulator-name =3D "vreg_l4n_2p8"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <3300000>; + regulator-initial-mode =3D ; + }; + + vreg_l5n_1p8: ldo5 { + regulator-name =3D "vreg_l5n_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l6n_3p3: ldo6 { + regulator-name =3D "vreg_l6n_3p3"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <3304000>; + regulator-initial-mode =3D ; + }; + + vreg_l7n_2p96: ldo7 { + regulator-name =3D "vreg_l7n_2p96"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2960000>; + regulator-initial-mode =3D ; + }; + }; +}; + +&dispcc { + status =3D "disabled"; +}; + +&i2c_master_hub_0 { + status =3D "okay"; +}; + +&pcie0 { + wake-gpios =3D <&tlmm 96 GPIO_ACTIVE_HIGH>; + perst-gpios =3D <&tlmm 94 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&pcie0_default_state>; + pinctrl-names =3D "default"; + status =3D "okay"; +}; + +&pcie0_phy { + vdda-phy-supply =3D <&vreg_l1e_0p88>; + vdda-pll-supply =3D <&vreg_l3e_1p2>; + status =3D "okay"; +}; + +&pm8550_gpios { + volume_up_n: volume-up-n-state { + pins =3D "gpio6"; + function =3D "normal"; + power-source =3D <1>; + bias-pull-up; + input-enable; + }; +}; + +&pon_pwrkey { + status =3D "okay"; +}; + +&pon_resin { + status =3D "okay"; + linux,code =3D ; +}; + +&qupv3_id_0 { + status =3D "okay"; +}; + +&remoteproc_adsp { + firmware-name =3D "qcom/sm8550/adsp.mdt", + "qcom/sm8550/adsp_dtb.mdt"; + status =3D "okay"; +}; + +&remoteproc_cdsp { + firmware-name =3D "qcom/sm8550/cdsp.mdt", + "qcom/sm8550/cdsp_dtb.mdt"; + status =3D "okay"; +}; + +&remoteproc_mpss { + firmware-name =3D "qcom/sm8550/modem.mdt", + "qcom/sm8550/modem_dtb.mdt"; + status =3D "okay"; +}; + +&sleep_clk { + clock-frequency =3D <32000>; +}; + +&tlmm { + gpio-reserved-ranges =3D <36 4>, <50 2>; +}; + +&ufs_mem_hc { + reset-gpios =3D <&tlmm 210 GPIO_ACTIVE_LOW>; + vcc-supply =3D <&vreg_l17b_2p5>; + vcc-max-microamp =3D <1300000>; + vccq-supply =3D <&vreg_l1g_1p2>; + vccq-max-microamp =3D <1200000>; + vdd-hba-supply =3D <&vreg_l3g_1p2>; + status =3D "okay"; +}; + +&ufs_mem_phy { + vdda-phy-supply =3D <&vreg_l1d_0p88>; + vdda-pll-supply =3D <&vreg_l3e_1p2>; + status =3D "okay"; +}; + +&xo_board { + clock-frequency =3D <76800000>; +}; --=20 2.34.1