From nobody Tue Feb 10 12:42:53 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A5FA6158A0E; Wed, 10 Apr 2024 13:20:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712755231; cv=none; b=slzXO5fOXOss3BJHRoDtNLJ32BG7Ws56ehgMWHmEukI+AMjfPuSlzcKUKNH7Im74CXC1dXGbSFmmLBXIifqPCvHLsDAZQcTzl74/CHdWqzxB6dqpWQ7PhJetexUqef2t4A9K8GH0f7vLx/vGgFX9rMcAIY4MqSirA6dj20BXBZg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712755231; c=relaxed/simple; bh=frXcCQMlx8RE8Bbo8U+apyurjJdqHMgkpVKzPCvQcCg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ZEYVVI9j64iotDLPyAmnBJ61X0nWuNkvlBpBosXxho6eO5KTayGy0Lp15ZIKBP5PsN0AGOC6AOs+UgiUtUhDDtPpJHqTxc4O2s8NhmXxv76DAasqwIhYsku/tB+mL0OvwDHvxikchy/UrJDoD0KGLuIdolLf7/GBCuerKF9c4eE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6961AC433F1; Wed, 10 Apr 2024 13:20:28 +0000 (UTC) From: Huacai Chen To: Huacai Chen Cc: loongarch@lists.linux.dev, Xuefeng Li , Guo Ren , Xuerui Wang , Jiaxun Yang , linux-kernel@vger.kernel.org, loongson-kernel@lists.loongnix.cn, Huacai Chen Subject: [PATCH 3/4] LoongArch: Update dts for Loongson-2K2000 to support PCI-MSI Date: Wed, 10 Apr 2024 21:18:03 +0800 Message-ID: <20240410131804.2165848-4-chenhuacai@loongson.cn> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240410131804.2165848-1-chenhuacai@loongson.cn> References: <20240410131804.2165848-1-chenhuacai@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Current dts file for Loongson-2K2000 misses the interrupt-controller & interrupt-cells descriptions in the msi-controller node, and misses the msi-parent link in the pci root node. Add them to support PCI-MSI. Signed-off-by: Huacai Chen --- arch/loongarch/boot/dts/loongson-2k2000.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/loongarch/boot/dts/loongson-2k2000.dtsi b/arch/loongarch/= boot/dts/loongson-2k2000.dtsi index dcee9f3783fd..481c6c869a8b 100644 --- a/arch/loongarch/boot/dts/loongson-2k2000.dtsi +++ b/arch/loongarch/boot/dts/loongson-2k2000.dtsi @@ -116,6 +116,8 @@ pic: interrupt-controller@10000000 { msi: msi-controller@1fe01140 { compatible =3D "loongson,pch-msi-1.0"; reg =3D <0x0 0x1fe01140 0x0 0x8>; + interrupt-controller; + #interrupt-cells =3D <1>; msi-controller; loongson,msi-base-vec =3D <64>; loongson,msi-num-vecs =3D <192>; @@ -147,6 +149,7 @@ pcie@1a000000 { #address-cells =3D <3>; #size-cells =3D <2>; device_type =3D "pci"; + msi-parent =3D <&msi>; bus-range =3D <0x0 0xff>; ranges =3D <0x01000000 0x0 0x00008000 0x0 0x18408000 0x0 0x00008000>, <0x02000000 0x0 0x60000000 0x0 0x60000000 0x0 0x20000000>; --=20 2.43.0