From nobody Sun Feb 8 11:45:42 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 93EA42AD21 for ; Wed, 10 Apr 2024 02:10:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.20 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712715037; cv=none; b=ntV8AInqrAlNhOBBpZrEFnUjd6h8LA1SpXqyK6RbC50GppI2wmXRsLyQWWk3nqfmIc79KNPGYZZoTZJ3g0RL6c9NlTKQT6NzGtB0oJeFPmrcnTXD8XDlfaz9k+XiKJZhtgoYDBomWSEUXiV7zxfNTV7axzPf0xQ+2aM3rXg74xM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712715037; c=relaxed/simple; bh=PpWRvG0ufJ/UB2ZXJs4tHv+Cjj7GBTUSH9Rn4/Owdn8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=iT5x32AIa0IRKTc3vtNSA6Wo9bNpuXn0A2WqTUAMUU8WkA1bb7ssZqnDnCRZEWEX2dhmO21fXnnfN1UAY2hHYz2Qe0QY184vKVigfjDu7LOLeaq9gJ7KrQ+5JbFCe4J3c9zhfCgEfseGHx+ceH4zMUJKNW4KOAHb4X6UROv96hw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Ad3W7ixm; arc=none smtp.client-ip=198.175.65.20 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Ad3W7ixm" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1712715036; x=1744251036; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=PpWRvG0ufJ/UB2ZXJs4tHv+Cjj7GBTUSH9Rn4/Owdn8=; b=Ad3W7ixmNqlTtN1mvAV99l98YNuOSVQAa0zgrzH58fzzayeMdirTP5I/ ZSre/D2E3aK6FaxEJXeg1oq/wVLkiVvJyovROnZ3y4Cn/I7FOqYrI4aZb 6gzrf8jFiVEbir0KCa9g1A39zwiFv8MTiTeveqH2e7rcmpSLa30isfsHO GILKKGt7oUalXlMWcHjaTW/N6GTwBuONicv8Hc03VkoF9xn5aK1PFgX2c lHZxQVEiBGcrKds1VSPRSxaJgGzMViZhwJKZSxW5OIZT6CGMp7nqTZnC4 69/RWmz/eZzuL1cBQ9C02Oo2FXJWaDxel/grYy3JkPR/SEYYi3R57qMKw Q==; X-CSE-ConnectionGUID: RWWgyIHRSeeNpdFNdbTImg== X-CSE-MsgGUID: 8YD8piPXT16XniRKaMwv5g== X-IronPort-AV: E=McAfee;i="6600,9927,11039"; a="7918636" X-IronPort-AV: E=Sophos;i="6.07,190,1708416000"; d="scan'208";a="7918636" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Apr 2024 19:10:36 -0700 X-CSE-ConnectionGUID: AfN4VIDxSJKd7mqzZ36GHQ== X-CSE-MsgGUID: 0blSaMAKT5mLW20WbhnUbw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,190,1708416000"; d="scan'208";a="20478947" Received: from unknown (HELO allen-box.sh.intel.com) ([10.239.159.127]) by fmviesa007.fm.intel.com with ESMTP; 09 Apr 2024 19:10:32 -0700 From: Lu Baolu To: Joerg Roedel , Will Deacon , Robin Murphy , Kevin Tian , Jason Gunthorpe Cc: Tina Zhang , Yi Liu , iommu@lists.linux.dev, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH v2 12/12] iommu/vt-d: Retire struct intel_svm Date: Wed, 10 Apr 2024 10:08:44 +0800 Message-Id: <20240410020844.253535-13-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240410020844.253535-1-baolu.lu@linux.intel.com> References: <20240410020844.253535-1-baolu.lu@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The struct intel_svm was used for keeping attached devices info for sva domain. Since sva domain is a kind of iommu_domain, the struct dmar_domain should centralize all info of a sva domain, including the info of attached devices. Therefore, retire struct intel_svm to clean up the code. Besides, allocate sva domain in domain_alloc_sva() callback which allows the memory management notifier lifetime to follow the lifetime of the iommu_domain. Co-developed-by: Tina Zhang Signed-off-by: Tina Zhang Signed-off-by: Lu Baolu --- drivers/iommu/intel/iommu.h | 26 ++++------ drivers/iommu/intel/iommu.c | 9 +--- drivers/iommu/intel/svm.c | 94 +++++++++---------------------------- 3 files changed, 32 insertions(+), 97 deletions(-) diff --git a/drivers/iommu/intel/iommu.h b/drivers/iommu/intel/iommu.h index 90611ec08a7c..0951be947ff9 100644 --- a/drivers/iommu/intel/iommu.h +++ b/drivers/iommu/intel/iommu.h @@ -649,8 +649,12 @@ struct dmar_domain { /* link to parent domain siblings */ struct list_head s2_link; }; + + /* SVA domain */ + struct { + struct mmu_notifier notifier; + }; }; - struct intel_svm *svm; =20 struct iommu_domain domain; /* generic domain data structure for iommu core */ @@ -1144,26 +1148,16 @@ int intel_svm_enable_prq(struct intel_iommu *iommu); int intel_svm_finish_prq(struct intel_iommu *iommu); void intel_svm_page_response(struct device *dev, struct iopf_fault *evt, struct iommu_page_response *msg); -struct iommu_domain *intel_svm_domain_alloc(void); -void intel_svm_remove_dev_pasid(struct iommu_domain *domain); +struct iommu_domain *intel_svm_domain_alloc(struct device *dev, + struct mm_struct *mm); void intel_drain_pasid_prq(struct device *dev, u32 pasid); - -struct intel_svm { - struct mmu_notifier notifier; - struct mm_struct *mm; - u32 pasid; - struct dmar_domain *domain; -}; #else static inline void intel_svm_check(struct intel_iommu *iommu) {} static inline void intel_drain_pasid_prq(struct device *dev, u32 pasid) {} -static inline struct iommu_domain *intel_svm_domain_alloc(void) -{ - return NULL; -} - -static inline void intel_svm_remove_dev_pasid(struct iommu_domain *domain) +static inline struct iommu_domain *intel_svm_domain_alloc(struct device *d= ev, + struct mm_struct *mm) { + return ERR_PTR(-ENODEV); } #endif =20 diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index d7f205cd0aac..b8a0f759a24f 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -3680,8 +3680,6 @@ static struct iommu_domain *intel_iommu_domain_alloc(= unsigned type) return domain; case IOMMU_DOMAIN_IDENTITY: return &si_domain->domain; - case IOMMU_DOMAIN_SVA: - return intel_svm_domain_alloc(); default: return NULL; } @@ -4388,14 +4386,8 @@ static void intel_iommu_remove_dev_pasid(struct devi= ce *dev, ioasid_t pasid) WARN_ON_ONCE(!dev_pasid); spin_unlock_irqrestore(&dmar_domain->lock, flags); =20 - /* - * The SVA implementation needs to handle its own stuffs like the mm - * notification. Before consolidating that code into iommu core, let - * the intel sva code handle it. - */ if (domain->type =3D=3D IOMMU_DOMAIN_SVA) { cache_tag_unassign_domain(dmar_domain, FLPT_DEFAULT_DID, dev, pasid); - intel_svm_remove_dev_pasid(domain); } else { did =3D domain_id_iommu(dmar_domain, iommu); cache_tag_unassign_domain(dmar_domain, did, dev, pasid); @@ -4624,6 +4616,7 @@ const struct iommu_ops intel_iommu_ops =3D { .hw_info =3D intel_iommu_hw_info, .domain_alloc =3D intel_iommu_domain_alloc, .domain_alloc_user =3D intel_iommu_domain_alloc_user, + .domain_alloc_sva =3D intel_svm_domain_alloc, .probe_device =3D intel_iommu_probe_device, .probe_finalize =3D intel_iommu_probe_finalize, .release_device =3D intel_iommu_release_device, diff --git a/drivers/iommu/intel/svm.c b/drivers/iommu/intel/svm.c index 0b767d16fb71..47e475f67046 100644 --- a/drivers/iommu/intel/svm.c +++ b/drivers/iommu/intel/svm.c @@ -26,23 +26,6 @@ =20 static irqreturn_t prq_event_thread(int irq, void *d); =20 -static DEFINE_XARRAY_ALLOC(pasid_private_array); -static int pasid_private_add(ioasid_t pasid, void *priv) -{ - return xa_alloc(&pasid_private_array, &pasid, priv, - XA_LIMIT(pasid, pasid), GFP_ATOMIC); -} - -static void pasid_private_remove(ioasid_t pasid) -{ - xa_erase(&pasid_private_array, pasid); -} - -static void *pasid_private_find(ioasid_t pasid) -{ - return xa_load(&pasid_private_array, pasid); -} - int intel_svm_enable_prq(struct intel_iommu *iommu) { struct iopf_queue *iopfq; @@ -156,8 +139,7 @@ static void intel_arch_invalidate_secondary_tlbs(struct= mmu_notifier *mn, struct mm_struct *mm, unsigned long start, unsigned long end) { - struct intel_svm *svm =3D container_of(mn, struct intel_svm, notifier); - struct dmar_domain *domain =3D svm->domain; + struct dmar_domain *domain =3D container_of(mn, struct dmar_domain, notif= ier); =20 if (start =3D=3D 0 && end =3D=3D -1UL) { cache_tag_flush_all(domain); @@ -169,8 +151,7 @@ static void intel_arch_invalidate_secondary_tlbs(struct= mmu_notifier *mn, =20 static void intel_mm_release(struct mmu_notifier *mn, struct mm_struct *mm) { - struct intel_svm *svm =3D container_of(mn, struct intel_svm, notifier); - struct dmar_domain *domain =3D svm->domain; + struct dmar_domain *domain =3D container_of(mn, struct dmar_domain, notif= ier); struct dev_pasid_info *dev_pasid; struct device_domain_info *info; unsigned long flags; @@ -210,41 +191,13 @@ static int intel_svm_set_dev_pasid(struct iommu_domai= n *domain, struct intel_iommu *iommu =3D info->iommu; struct mm_struct *mm =3D domain->mm; struct dev_pasid_info *dev_pasid; - struct intel_svm *svm; unsigned long sflags; unsigned long flags; int ret =3D 0; =20 - svm =3D pasid_private_find(pasid); - if (!svm) { - svm =3D kzalloc(sizeof(*svm), GFP_KERNEL); - if (!svm) - return -ENOMEM; - - svm->pasid =3D pasid; - svm->mm =3D mm; - - svm->notifier.ops =3D &intel_mmuops; - svm->domain =3D to_dmar_domain(domain); - ret =3D mmu_notifier_register(&svm->notifier, mm); - if (ret) { - kfree(svm); - return ret; - } - - ret =3D pasid_private_add(svm->pasid, svm); - if (ret) { - mmu_notifier_unregister(&svm->notifier, mm); - kfree(svm); - return ret; - } - } - - dmar_domain->svm =3D svm; - dev_pasid =3D kzalloc(sizeof(*dev_pasid), GFP_KERNEL); if (!dev_pasid) - goto free_svm; + return -ENOMEM; =20 dev_pasid->dev =3D dev; dev_pasid->pasid =3D pasid; @@ -272,30 +225,10 @@ static int intel_svm_set_dev_pasid(struct iommu_domai= n *domain, FLPT_DEFAULT_DID, dev, pasid); free_dev_pasid: kfree(dev_pasid); -free_svm: - if (list_empty(&dmar_domain->dev_pasids)) { - mmu_notifier_unregister(&svm->notifier, mm); - pasid_private_remove(pasid); - kfree(svm); - } =20 return ret; } =20 -void intel_svm_remove_dev_pasid(struct iommu_domain *domain) -{ - struct dmar_domain *dmar_domain =3D to_dmar_domain(domain); - struct intel_svm *svm =3D dmar_domain->svm; - struct mm_struct *mm =3D domain->mm; - - if (list_empty(&dmar_domain->dev_pasids)) { - if (svm->notifier.ops) - mmu_notifier_unregister(&svm->notifier, mm); - pasid_private_remove(svm->pasid); - kfree(svm); - } -} - /* Page request queue descriptor */ struct page_req_dsc { union { @@ -663,7 +596,12 @@ void intel_svm_page_response(struct device *dev, struc= t iopf_fault *evt, =20 static void intel_svm_domain_free(struct iommu_domain *domain) { - kfree(to_dmar_domain(domain)); + struct dmar_domain *dmar_domain =3D to_dmar_domain(domain); + + if (dmar_domain->notifier.ops) + mmu_notifier_unregister(&dmar_domain->notifier, domain->mm); + + kfree(dmar_domain); } =20 static const struct iommu_domain_ops intel_svm_domain_ops =3D { @@ -671,13 +609,16 @@ static const struct iommu_domain_ops intel_svm_domain= _ops =3D { .free =3D intel_svm_domain_free }; =20 -struct iommu_domain *intel_svm_domain_alloc(void) +struct iommu_domain *intel_svm_domain_alloc(struct device *dev, + struct mm_struct *mm) { struct dmar_domain *domain; + int ret; =20 domain =3D kzalloc(sizeof(*domain), GFP_KERNEL); if (!domain) - return NULL; + return ERR_PTR(-ENOMEM); + domain->domain.ops =3D &intel_svm_domain_ops; domain->use_first_level =3D true; INIT_LIST_HEAD(&domain->dev_pasids); @@ -685,5 +626,12 @@ struct iommu_domain *intel_svm_domain_alloc(void) spin_lock_init(&domain->cache_lock); spin_lock_init(&domain->lock); =20 + domain->notifier.ops =3D &intel_mmuops; + ret =3D mmu_notifier_register(&domain->notifier, mm); + if (ret) { + kfree(domain); + return ERR_PTR(ret); + } + return &domain->domain; } --=20 2.34.1