From nobody Wed Feb 11 03:07:55 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 447F412DDA2; Mon, 8 Apr 2024 13:30:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712583042; cv=none; b=H7J5dqT3YadDSqmYwOS0+g8cbYpuxDgrz5IeT/ICDpezYoQ2pgI4Rbc0WXnHtIak87x7/jsSrbb3YKd6/0tUxLDsYp+as0aHOSXds3gIkhYokS3Q5Z8KnsmbQfbBY9L+4wwy2Vr4FR4URQ0zQIDvzSZD73pZiC0NLs3ROVK/2f0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712583042; c=relaxed/simple; bh=ZSDvGlTYxkKevkDkn5Z97Ng0EKeJvDIdNRcWa558Hi8=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=B5CxrnsuWfmss5mBGZpUvXZ7/wZQGqINH0K2g0fW11WzI3ySk0og6Pd4GzHdIZEgjUup5Wl9twZGfgnxN7BZ0zZ0brSj7Vw/2qHhCn1BFhyQ7m9RwDjN3i8Oz/gc2GuM9ysOYW5B/U8Hx+o5WX5J2xAKksHYIGn8HkPGNSuM3GU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=jxrqMeyG; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="jxrqMeyG" Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 438Bi5La005631; Mon, 8 Apr 2024 13:30:35 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= qcppdkim1; bh=fKNyg1fb52c492bqSBVRoiI1D3/Zu8qRsrt5JaBCZNM=; b=jx rqMeyG8HpgH2RfXNre/x6bu+ESJvAk/rd1Bi4aM+WPiOB6ip9ADZl8Wc+rVi65fm dnpHyVfc13CTg+xjzckltus5Q5LQRYHXjhb2CtIFGD4olEONAdrjwjG2RC+ouz/4 /UAfwHZLLSI5R78vSBtSc4hnqvnxl7dkQvXbucBOgRCK3PLFZ5YHr7STM9H2QqKm o11CxIF4/Qjp/SRhrE78IiXfqrJsqtbyJtSK6DGwQUNXs87rJQQx4gR9Ss6AaMeI ouVR8n1UT9w4/6woRpcjLAvpy7BfGCvGGiRlIde+F1ET9ctRLmxPgA3B7oFTw65t FZ0fXWt9fLdjiZRHvMWA== Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3xcbfygw2a-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 08 Apr 2024 13:30:34 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 438DUX3r026835 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 8 Apr 2024 13:30:33 GMT Received: from hu-kriskura-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Mon, 8 Apr 2024 06:30:28 -0700 From: Krishna Kurapati To: Krzysztof Kozlowski , Rob Herring , Bjorn Andersson , Wesley Cheng , Konrad Dybcio , "Greg Kroah-Hartman" , Conor Dooley , Thinh Nguyen , Felipe Balbi , Johan Hovold CC: , , , , , , Krishna Kurapati , Johan Hovold Subject: [PATCH v20 8/9] usb: dwc3: qcom: Enable wakeup for applicable ports of multiport Date: Mon, 8 Apr 2024 18:59:24 +0530 Message-ID: <20240408132925.1880571-9-quic_kriskura@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408132925.1880571-1-quic_kriskura@quicinc.com> References: <20240408132925.1880571-1-quic_kriskura@quicinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: ehVvFwkF8k5-pMJkCWZkU3t0JBbzDrBz X-Proofpoint-GUID: ehVvFwkF8k5-pMJkCWZkU3t0JBbzDrBz X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-04-08_11,2024-04-05_02,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 mlxscore=0 lowpriorityscore=0 impostorscore=0 spamscore=0 phishscore=0 clxscore=1015 mlxlogscore=964 malwarescore=0 priorityscore=1501 suspectscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2404010003 definitions=main-2404080104 Content-Type: text/plain; charset="utf-8" DWC3 Qcom wrapper currently supports only wakeup configuration for single port controllers. Read speed of each port connected to the controller and enable wakeup for each of them accordingly. Signed-off-by: Krishna Kurapati Reviewed-by: Johan Hovold Acked-by: Thinh Nguyen --- drivers/usb/dwc3/dwc3-qcom.c | 71 +++++++++++++++++++++--------------- 1 file changed, 41 insertions(+), 30 deletions(-) diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c index 35eb338514bc..12182e0f8f45 100644 --- a/drivers/usb/dwc3/dwc3-qcom.c +++ b/drivers/usb/dwc3/dwc3-qcom.c @@ -57,6 +57,7 @@ struct dwc3_qcom_port { int dp_hs_phy_irq; int dm_hs_phy_irq; int ss_phy_irq; + enum usb_device_speed usb2_speed; }; =20 struct dwc3_qcom { @@ -68,7 +69,6 @@ struct dwc3_qcom { struct reset_control *resets; struct dwc3_qcom_port ports[DWC3_MAX_PORTS]; u8 num_ports; - enum usb_device_speed usb2_speed; =20 struct extcon_dev *edev; struct extcon_dev *host_edev; @@ -307,7 +307,7 @@ static bool dwc3_qcom_is_host(struct dwc3_qcom *qcom) return dwc->xhci; } =20 -static enum usb_device_speed dwc3_qcom_read_usb2_speed(struct dwc3_qcom *q= com) +static enum usb_device_speed dwc3_qcom_read_usb2_speed(struct dwc3_qcom *q= com, int port_index) { struct dwc3 *dwc =3D platform_get_drvdata(qcom->dwc3); struct usb_device *udev; @@ -318,14 +318,8 @@ static enum usb_device_speed dwc3_qcom_read_usb2_speed= (struct dwc3_qcom *qcom) */ hcd =3D platform_get_drvdata(dwc->xhci); =20 - /* - * It is possible to query the speed of all children of - * USB2.0 root hub via usb_hub_for_each_child(). DWC3 code - * currently supports only 1 port per controller. So - * this is sufficient. - */ #ifdef CONFIG_USB - udev =3D usb_hub_find_child(hcd->self.root_hub, 1); + udev =3D usb_hub_find_child(hcd->self.root_hub, port_index + 1); #else udev =3D NULL; #endif @@ -356,26 +350,26 @@ static void dwc3_qcom_disable_wakeup_irq(int irq) disable_irq_nosync(irq); } =20 -static void dwc3_qcom_disable_interrupts(struct dwc3_qcom *qcom) +static void dwc3_qcom_disable_port_interrupts(struct dwc3_qcom_port *port) { - dwc3_qcom_disable_wakeup_irq(qcom->ports[0].qusb2_phy_irq); + dwc3_qcom_disable_wakeup_irq(port->qusb2_phy_irq); =20 - if (qcom->usb2_speed =3D=3D USB_SPEED_LOW) { - dwc3_qcom_disable_wakeup_irq(qcom->ports[0].dm_hs_phy_irq); - } else if ((qcom->usb2_speed =3D=3D USB_SPEED_HIGH) || - (qcom->usb2_speed =3D=3D USB_SPEED_FULL)) { - dwc3_qcom_disable_wakeup_irq(qcom->ports[0].dp_hs_phy_irq); + if (port->usb2_speed =3D=3D USB_SPEED_LOW) { + dwc3_qcom_disable_wakeup_irq(port->dm_hs_phy_irq); + } else if ((port->usb2_speed =3D=3D USB_SPEED_HIGH) || + (port->usb2_speed =3D=3D USB_SPEED_FULL)) { + dwc3_qcom_disable_wakeup_irq(port->dp_hs_phy_irq); } else { - dwc3_qcom_disable_wakeup_irq(qcom->ports[0].dp_hs_phy_irq); - dwc3_qcom_disable_wakeup_irq(qcom->ports[0].dm_hs_phy_irq); + dwc3_qcom_disable_wakeup_irq(port->dp_hs_phy_irq); + dwc3_qcom_disable_wakeup_irq(port->dm_hs_phy_irq); } =20 - dwc3_qcom_disable_wakeup_irq(qcom->ports[0].ss_phy_irq); + dwc3_qcom_disable_wakeup_irq(port->ss_phy_irq); } =20 -static void dwc3_qcom_enable_interrupts(struct dwc3_qcom *qcom) +static void dwc3_qcom_enable_port_interrupts(struct dwc3_qcom_port *port) { - dwc3_qcom_enable_wakeup_irq(qcom->ports[0].qusb2_phy_irq, 0); + dwc3_qcom_enable_wakeup_irq(port->qusb2_phy_irq, 0); =20 /* * Configure DP/DM line interrupts based on the USB2 device attached to @@ -386,21 +380,37 @@ static void dwc3_qcom_enable_interrupts(struct dwc3_q= com *qcom) * DP and DM lines as rising edge to detect HS/HS/LS device connect scena= rio. */ =20 - if (qcom->usb2_speed =3D=3D USB_SPEED_LOW) { - dwc3_qcom_enable_wakeup_irq(qcom->ports[0].dm_hs_phy_irq, + if (port->usb2_speed =3D=3D USB_SPEED_LOW) { + dwc3_qcom_enable_wakeup_irq(port->dm_hs_phy_irq, IRQ_TYPE_EDGE_FALLING); - } else if ((qcom->usb2_speed =3D=3D USB_SPEED_HIGH) || - (qcom->usb2_speed =3D=3D USB_SPEED_FULL)) { - dwc3_qcom_enable_wakeup_irq(qcom->ports[0].dp_hs_phy_irq, + } else if ((port->usb2_speed =3D=3D USB_SPEED_HIGH) || + (port->usb2_speed =3D=3D USB_SPEED_FULL)) { + dwc3_qcom_enable_wakeup_irq(port->dp_hs_phy_irq, IRQ_TYPE_EDGE_FALLING); } else { - dwc3_qcom_enable_wakeup_irq(qcom->ports[0].dp_hs_phy_irq, + dwc3_qcom_enable_wakeup_irq(port->dp_hs_phy_irq, IRQ_TYPE_EDGE_RISING); - dwc3_qcom_enable_wakeup_irq(qcom->ports[0].dm_hs_phy_irq, + dwc3_qcom_enable_wakeup_irq(port->dm_hs_phy_irq, IRQ_TYPE_EDGE_RISING); } =20 - dwc3_qcom_enable_wakeup_irq(qcom->ports[0].ss_phy_irq, 0); + dwc3_qcom_enable_wakeup_irq(port->ss_phy_irq, 0); +} + +static void dwc3_qcom_disable_interrupts(struct dwc3_qcom *qcom) +{ + int i; + + for (i =3D 0; i < qcom->num_ports; i++) + dwc3_qcom_disable_port_interrupts(&qcom->ports[i]); +} + +static void dwc3_qcom_enable_interrupts(struct dwc3_qcom *qcom) +{ + int i; + + for (i =3D 0; i < qcom->num_ports; i++) + dwc3_qcom_enable_port_interrupts(&qcom->ports[i]); } =20 static int dwc3_qcom_suspend(struct dwc3_qcom *qcom, bool wakeup) @@ -427,7 +437,8 @@ static int dwc3_qcom_suspend(struct dwc3_qcom *qcom, bo= ol wakeup) * freezable workqueue. */ if (dwc3_qcom_is_host(qcom) && wakeup) { - qcom->usb2_speed =3D dwc3_qcom_read_usb2_speed(qcom); + for (i =3D 0; i < qcom->num_ports; i++) + qcom->ports[i].usb2_speed =3D dwc3_qcom_read_usb2_speed(qcom, i); dwc3_qcom_enable_interrupts(qcom); } =20 --=20 2.34.1