From nobody Sat Feb 7 18:15:59 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E5B062CCA0 for ; Sat, 6 Apr 2024 11:31:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712403081; cv=none; b=N4m8ymYpPfI6KMrYVKoa53xjH5tgIKcPZnb6MwcreameH/YoAx01RmOdD2+hQL9/6XV8P8joqQOCVqMqmERmk6BjQeK7jPJpP1p/nfbONiKSD+y6t+enWo/4w1lqWo1sJblBbntyZky1Hj8I1urLjMOtP3MqYYXSKq5ojcON2vg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712403081; c=relaxed/simple; bh=kxw8lEOeXnx/duF9z7ST9TT/zC6EoGrvtJe8oJFI1B0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Dqowo22PocrAb6Jrr4hypscv6ZYG13lnYedtfZ6RjUjQscdW4P2+8OzwvfnpZZOsQKGumnOQerFTmO3wwIrNeKmVLx1J3YB/OVjyXDOXaayrOX2GO/TkFp4UbkIm8XWIyVkZrSYt6Ya9Isuu93z1Yt+Aewij/t81enR33OHUB50= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=kD+KtTXj; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="kD+KtTXj" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D00C9C43390; Sat, 6 Apr 2024 11:31:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1712403080; bh=kxw8lEOeXnx/duF9z7ST9TT/zC6EoGrvtJe8oJFI1B0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kD+KtTXj/GBjQUtr6D1v/myTGzsq973TWGwuzcxWDl6/CjFmbP50gM/JVNX58qrgd EUcASu06PHK5jfQ3QNBfcSNrsLpU7hjW9xVTzsUQ8BCdx59mBulPvueYfkwwhZh1D3 Ro4Cs/FOBTRN2zGolCo9LGk43zQhmZC/ZB4Rs4/PXyJS0X35Gg8HyttKhBQHaT3erO PhwZfs16AI77tZ+6Py0jXcj9ZcBwMwW/U+hAbUGaslrA9P4Owjs/jFxLQmXH62SGvh DOVmIxFb0qf+tnmLIuXObaJkPONg1btiKj9dDq/7L+WYYej7XRoQ4vdH8MUDWbgsXP +8m3vR/9SczOQ== From: Jisheng Zhang To: Daniel Lezcano , Thomas Gleixner , Paul Walmsley , Palmer Dabbelt , Albert Ou , Samuel Holland Cc: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH v2 1/3] clocksource/drivers/timer-riscv: Add set_state_oneshot_stopped Date: Sat, 6 Apr 2024 19:17:55 +0800 Message-ID: <20240406111757.1597-2-jszhang@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240406111757.1597-1-jszhang@kernel.org> References: <20240406111757.1597-1-jszhang@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" To avoid spurious timer interrupts when KTIME_MAX is used, we need to configure set_state_oneshot_stopped(). Although implementing this is optional, it still affects things like power management for the extra timer interrupt. Check commit 8fff52fd5093 ("clockevents: Introduce CLOCK_EVT_STATE_ONESHOT_STOPPED state") for more information. Signed-off-by: Jisheng Zhang --- drivers/clocksource/timer-riscv.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-= riscv.c index 48ce50c5f5e6..e661fc037337 100644 --- a/drivers/clocksource/timer-riscv.c +++ b/drivers/clocksource/timer-riscv.c @@ -69,11 +69,12 @@ static int riscv_clock_shutdown(struct clock_event_devi= ce *evt) =20 static unsigned int riscv_clock_event_irq; static DEFINE_PER_CPU(struct clock_event_device, riscv_clock_event) =3D { - .name =3D "riscv_timer_clockevent", - .features =3D CLOCK_EVT_FEAT_ONESHOT, - .rating =3D 100, - .set_next_event =3D riscv_clock_next_event, - .set_state_shutdown =3D riscv_clock_shutdown, + .name =3D "riscv_timer_clockevent", + .features =3D CLOCK_EVT_FEAT_ONESHOT, + .rating =3D 100, + .set_next_event =3D riscv_clock_next_event, + .set_state_shutdown =3D riscv_clock_shutdown, + .set_state_oneshot_stopped =3D riscv_clock_shutdown, }; =20 /* --=20 2.43.0 From nobody Sat Feb 7 18:15:59 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A762732C96 for ; Sat, 6 Apr 2024 11:31:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712403082; cv=none; b=DO0BPjcDaMb2oN61tCC5WqJQLDmv7iWnvIz4kLgplMx4W2S+d0SzNVShBasrCfPAIl1urKgc4seRrGotdvcb+pqKX+Pexl45aIiL7/rzpRI4x4T+q4EIaa2JApCApJJlCVSHM30OFUXXikxIIrcLzCadsqHSS/6luHO0Bn5rJNA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712403082; c=relaxed/simple; bh=66gmc8NYeVWAyoDrDcv4Y+x0uF90S93OHXhD2YCJ+6Y=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=RqHtA0BPHFGREYj1LXe1SADsveePxRE8Fd+wSu5FJ8L0nioeyH++kuFQshR3w1CoeXwa80+H1Cp6xh/wXUqpkdtze/Jnf22+6Yq1QoRkw+wro183IzGSIIn4cUzQRR1hliOMEdAn0GsKRJMsNC1crTVx1oF8+zsQaDdDOvBgbaI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ORp0hN7U; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ORp0hN7U" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D956BC43141; Sat, 6 Apr 2024 11:31:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1712403082; bh=66gmc8NYeVWAyoDrDcv4Y+x0uF90S93OHXhD2YCJ+6Y=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ORp0hN7UO4eAFVjTVf+j76i3KDprQYwqJpkNxvDrt+iPdVVS6f0JuqH2XGji5lexO VMgDm9Bm7R1z1XzoynU/F8vM/ab82da/na0x9fdYRATW5wtdBxEgqs2ueta2Wn1r6Y kenWH0Xtfzq4OppuuLViU5DSllzVe1rMeN332aV+AcqgyZ/tyNr0UyN222Nz8VlgGi xCVAAraEpdqZc/56/nku3IRctwH2c9uid1h4GtwLQ+5tSFSsD0/HrGGssaMTeb6LL4 hCqSEkaNErssRXqLItMqPpvkhkj/w7jRvglqDVMz818h7r4fNWOH4zZ3RZrUQqmjV1 skUKAikVI+gVg== From: Jisheng Zhang To: Daniel Lezcano , Thomas Gleixner , Paul Walmsley , Palmer Dabbelt , Albert Ou , Samuel Holland Cc: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH v2 2/3] clocksource/drivers/timer-clint: Add set_state_shutdown Date: Sat, 6 Apr 2024 19:17:56 +0800 Message-ID: <20240406111757.1597-3-jszhang@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240406111757.1597-1-jszhang@kernel.org> References: <20240406111757.1597-1-jszhang@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add clocksource detach/shutdown callback to disable RISC-V timer interrupt = when switching out clockevent from clint timer to another timer. Signed-off-by: Jisheng Zhang --- drivers/clocksource/timer-clint.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/drivers/clocksource/timer-clint.c b/drivers/clocksource/timer-= clint.c index 09fd292eb83d..1c17eff9861e 100644 --- a/drivers/clocksource/timer-clint.c +++ b/drivers/clocksource/timer-clint.c @@ -119,11 +119,21 @@ static int clint_clock_next_event(unsigned long delta, return 0; } =20 +static int clint_clock_shutdown(struct clock_event_device *evt) +{ + void __iomem *r =3D clint_timer_cmp + + cpuid_to_hartid_map(smp_processor_id()); + + writeq_relaxed(U64_MAX, r); + return 0; +} + static DEFINE_PER_CPU(struct clock_event_device, clint_clock_event) =3D { - .name =3D "clint_clockevent", - .features =3D CLOCK_EVT_FEAT_ONESHOT, - .rating =3D 100, - .set_next_event =3D clint_clock_next_event, + .name =3D "clint_clockevent", + .features =3D CLOCK_EVT_FEAT_ONESHOT, + .rating =3D 100, + .set_next_event =3D clint_clock_next_event, + .set_state_shutdown =3D clint_clock_shutdown, }; =20 static int clint_timer_starting_cpu(unsigned int cpu) --=20 2.43.0 From nobody Sat Feb 7 18:15:59 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B44DF374D3 for ; Sat, 6 Apr 2024 11:31:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712403084; cv=none; b=FTuv0SqoxV3O42XNAXF3Ep+Ht7LoibgbbKJ/tpqUf5UBb9D23fSgCjppQELbrXGux3XjtP6oE6DjVscxmIFKJ/Z8dsSIlwTpqHe/JTyPp804a7c+nBp9Fg6jRU1wavtnshFmNt3YiwCZuPymg9bcicp23Aq6Vgpyri/1ZOJumDc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712403084; c=relaxed/simple; bh=QNz4CJCFePste/7DhKkLbFCEPMnrk6GSUJBGB1Aj74U=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=INQ5VOPHpG21O7q2f/meBV0KqYAVtiW61xNSY3K3YFPwhqLV1s9+KVN4lwYbNFjYiP8FKEq4tus0BLIX8DXwI7++DtSw/4uiwao97fIBW47hAQpMT7qrNELwNf7aEC4ZN9D0Y7ey6g7VpWvKCIapcxRgo5vql2Ao3vsBpb99Kdc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=A8XjQBe/; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="A8XjQBe/" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E4331C433F1; Sat, 6 Apr 2024 11:31:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1712403084; bh=QNz4CJCFePste/7DhKkLbFCEPMnrk6GSUJBGB1Aj74U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=A8XjQBe/E5HTHforMou7F0rT2W0G3OjrHdYJ6K+oat6W4FF6vVUP9NIUAIqT9EJUR uqenOb2f/JATM2VxEjKOCIq8oMSyy1DPKELKFX5K1256zGXVDsS7f6K/qDevPWKkSl 7WivOFgVG7kANEROaGzXdC7LTSYVQ6TqzqyHHwsSr1Kirr/Vs5s0ObmhnhS+EKwuVR bd2GGlIvffrXvgNc33owMD0XRJ6F6Y1lohtulMHUIG0PRuAq5pbKNCeDJHiDO+XY4+ xPgDLTi21AlyVDJbdJw3XmX4cYBBD/Qndb5zMUqu+n3H1GYqblgHIG97b0S4QaQdGP N3cZKEBv//cLA== From: Jisheng Zhang To: Daniel Lezcano , Thomas Gleixner , Paul Walmsley , Palmer Dabbelt , Albert Ou , Samuel Holland Cc: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH v2 3/3] clocksource/drivers/timer-clint: Add set_state_oneshot_stopped Date: Sat, 6 Apr 2024 19:17:57 +0800 Message-ID: <20240406111757.1597-4-jszhang@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240406111757.1597-1-jszhang@kernel.org> References: <20240406111757.1597-1-jszhang@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" To avoid spurious timer interrupts when KTIME_MAX is used, we need to configure set_state_oneshot_stopped(). Although implementing this is optional, it still affects things like power management for the extra timer interrupt. Check commit 8fff52fd5093 ("clockevents: Introduce CLOCK_EVT_STATE_ONESHOT_STOPPED state") for more information. Signed-off-by: Jisheng Zhang --- drivers/clocksource/timer-clint.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clocksource/timer-clint.c b/drivers/clocksource/timer-= clint.c index 1c17eff9861e..f468fa8bf5f0 100644 --- a/drivers/clocksource/timer-clint.c +++ b/drivers/clocksource/timer-clint.c @@ -134,6 +134,7 @@ static DEFINE_PER_CPU(struct clock_event_device, clint_= clock_event) =3D { .rating =3D 100, .set_next_event =3D clint_clock_next_event, .set_state_shutdown =3D clint_clock_shutdown, + .set_state_oneshot_stopped =3D clint_clock_shutdown, }; =20 static int clint_timer_starting_cpu(unsigned int cpu) --=20 2.43.0