From nobody Tue Feb 10 06:08:12 2026 Received: from box.trvn.ru (box.trvn.ru [194.87.146.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 96C9716E894; Fri, 5 Apr 2024 14:06:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=194.87.146.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712326020; cv=none; b=DKjdZvh12svD6qe8DvYVGM+UwRF/iseD7gwZkt5LYdwnU35oATbnUP2s3lflsI74l4nsn9MSBJBUfxJ6/swaCjccbnMSJImlk3LW/gtyXhViPDJOttqnv5UCIoiNfr5KpEvFT6o0iz967NkUc/TV6Wm54WIUhxV9tsm1STv9xec= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712326020; c=relaxed/simple; bh=myeprIocEwJnt1Y+8P46ayf0z1f5oJlFug4gelU9BI4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=pW0uBXUZHE6Ipm0umMOavCDaLKo9xcW9/XspNYLSmAcxdtg9oRhqNbDIQQ9jaoPr45TYBiV8Xldr/Bbzq7Bzb6lFMVDxT65UJrGwh9kPj95rfi3Pyhoaqsjbz50oKe0xKtyvgZ0LvmaMyzQVuz5PrAnj0PH9Ve/cSdT3vPES2Uo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=trvn.ru; spf=pass smtp.mailfrom=trvn.ru; dkim=pass (2048-bit key) header.d=trvn.ru header.i=@trvn.ru header.b=IvlCUuGe; arc=none smtp.client-ip=194.87.146.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=trvn.ru Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=trvn.ru Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=trvn.ru header.i=@trvn.ru header.b="IvlCUuGe" Received: from authenticated-user (box.trvn.ru [194.87.146.52]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by box.trvn.ru (Postfix) with ESMTPSA id 4EA5041A4D; Fri, 5 Apr 2024 19:06:48 +0500 (+05) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=trvn.ru; s=mail; t=1712326008; bh=myeprIocEwJnt1Y+8P46ayf0z1f5oJlFug4gelU9BI4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=IvlCUuGeadufUJ/6DeuxtziKSg1G7Tu+etneMxNP9zky33OBTZmlvt0ecFSwVLFPl AIOKUrB56mKXBtmPFrFJmDHVsAcIsg78dpuZKFtB3bf28Y/ZehNjHf7DGh9LfTj5jg 6p0/C2oR2/zw9cSUJbNwYXXyr9YEWRCN0JsS2QDQjDx1HWWrCHD+i+lFPy87Bu8bPo LdCiVeLjzvYynehg/ituTJfGs7rVAiGKbdEfyzCCE4Z2JCvlBKbqDeIavNYgXgzgyM xyVmyIuC/urCN4w1lG9yN7CNq7L3IeLnksA80Um2GzeZ7u7/lxvDFt+MGwkyLKt+nH l3vDqaONVvHCA== From: Nikita Travkin Date: Fri, 05 Apr 2024 19:06:12 +0500 Subject: [PATCH 3/4] arm64: dts: qcom: Add Motorola Moto E 2015 LTE (surnia) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240405-msm8916-moto-init-v1-3-502b58176d34@trvn.ru> References: <20240405-msm8916-moto-init-v1-0-502b58176d34@trvn.ru> In-Reply-To: <20240405-msm8916-moto-init-v1-0-502b58176d34@trvn.ru> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Nikita Travkin , =?utf-8?q?Wiktor_Strz=C4=99ba=C5=82a?= , =?utf-8?q?Val=C3=A9rie_Roux?= , Stephan Gerhold X-Developer-Signature: v=1; a=openpgp-sha256; l=3297; i=nikita@trvn.ru; h=from:subject:message-id; bh=O5advYnXYUZahl22INbfyk1zYJZUHbTDIKFIs+rPPD0=; b=owEBbQKS/ZANAwAIAUMc7O4oGb91AcsmYgBmEAVzceLAvKWU7a4AXv6PDEP2i/1IEMHfsmVMY eqQqt/0Q1iJAjMEAAEIAB0WIQTAhK9UUj+qg34uxUdDHOzuKBm/dQUCZhAFcwAKCRBDHOzuKBm/ dYimD/4sexl4vL8UfjfkYIb9EpVT8ucsqlYhxhUadY7X75hyH8YH4vweiOa2J3UvtoWql5cEKnG 7f0qqi+adEJX5Vd/SfrdMe4PwjSssGMuSkwBo6Dx+Hu0sadfARJ//p2gMV+CXibERnS5yQaAuOy a0YlhwU7uvBuWw56c57P0M6g02sXc+vV8jeNKmzOwUPbtpgsAIfUppRGuoqKTkkSJD99zGfYGle X+QgJbYFL726KnmGI8XO+6tiN6C6oSjHegX+vVDhdHb/i5Wz+01jjhAi2j4k1LlfbO3pixLiNUb 8FHwfWuI9Vlp63tnK9X5TKpfELoiBdE3FYbVjoaLZvGkQvOH8G10U03odnujYE44ujGSeBqsK1x CDkn3JmA6xQvk3/KvzWGo72h+AfWoEnCTZd8n8Kvnbp/+j6AdLIEDsMvtKx32FixZr//csQABJe jgXUwVLQqUz6lS170c+FBKmd7IMK2UmEB0/BqjFx04qRgj9/DozUuxc/fHu76EuNhpmFpS5s1Oj UAAz2Kp6Uz7cb8DodSYa7Y0y9g5HGq3cEl6HT0tK5x/0qI9CIyEEhQBWiFOed8eLJ7TjwXDR0qt gcXsEWajKA6tSo/KFcwzw1PQobkrpyEDfxsRL+QXwxd5pnpHzALgmQ8c0kY1OfVtIGdlSFfFaqx f111eMc5WRrIr1A== X-Developer-Key: i=nikita@trvn.ru; a=openpgp; fpr=C084AF54523FAA837E2EC547431CECEE2819BF75 From: Wiktor Strz=C4=99ba=C5=82a Motorola Moto E 2015 LTE is an msm8916 based smartphone. Supported features: - eMMC and SD; - Buttons; - Touchscreen; - USB; - Fuel Gauge; - Sound. Signed-off-by: Wiktor Strz=C4=99ba=C5=82a [Val=C3=A9rie: Sound and modem] Co-developed-by: Val=C3=A9rie Roux Signed-off-by: Val=C3=A9rie Roux Signed-off-by: Stephan Gerhold [Nikita: Use common dtsi] Signed-off-by: Nikita Travkin Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/Makefile | 1 + .../boot/dts/qcom/msm8916-motorola-surnia.dts | 83 ++++++++++++++++++= ++++ 2 files changed, 84 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/M= akefile index 8d3fc7cb7a4d..acf3ee316fba 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -32,6 +32,7 @@ dtb-$(CONFIG_ARCH_QCOM) +=3D msm8916-huawei-g7.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D msm8916-longcheer-l8150.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D msm8916-longcheer-l8910.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D msm8916-motorola-harpia.dtb +dtb-$(CONFIG_ARCH_QCOM) +=3D msm8916-motorola-surnia.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D msm8916-mtp.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D msm8916-samsung-a3u-eur.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D msm8916-samsung-a5u-eur.dtb diff --git a/arch/arm64/boot/dts/qcom/msm8916-motorola-surnia.dts b/arch/ar= m64/boot/dts/qcom/msm8916-motorola-surnia.dts new file mode 100644 index 000000000000..eecf78ba45bb --- /dev/null +++ b/arch/arm64/boot/dts/qcom/msm8916-motorola-surnia.dts @@ -0,0 +1,83 @@ +// SPDX-License-Identifier: GPL-2.0-only + +/dts-v1/; + +#include "msm8916-motorola-common.dtsi" + +/ { + model =3D "Motorola Moto E 2015 LTE"; + compatible =3D "motorola,surnia", "qcom,msm8916"; + chassis-type =3D "handset"; +}; + +&blsp_i2c4 { + status =3D "okay"; + + battery@36 { + compatible =3D "maxim,max17050"; + reg =3D <0x36>; + + interrupts-extended =3D <&tlmm 12 IRQ_TYPE_EDGE_FALLING>; + + pinctrl-0 =3D <&battery_alert_default>; + pinctrl-names =3D "default"; + + maxim,rsns-microohm =3D <10000>; + maxim,over-heat-temp =3D <600>; + maxim,cold-temp =3D <(-200)>; + maxim,dead-volt =3D <3200>; + maxim,over-volt =3D <4500>; + + }; +}; + +&pm8916_codec { + qcom,micbias1-ext-cap; + qcom,micbias2-ext-cap; +}; + +&sdhc_2 { + pinctrl-0 =3D <&sdc2_default &sdc2_cd_default>; + pinctrl-1 =3D <&sdc2_sleep &sdc2_cd_default>; + pinctrl-names =3D "default", "sleep"; + + cd-gpios =3D <&tlmm 25 GPIO_ACTIVE_LOW>; +}; + +&sound { + audio-routing =3D + "AMIC1", "MIC BIAS External1", + "AMIC3", "MIC BIAS External1"; +}; + +&touchscreen { + interrupts-extended =3D <&tlmm 21 IRQ_TYPE_EDGE_FALLING>; + + vdd-supply =3D <&pm8916_l16>; + + pinctrl-0 =3D <&ts_int_default>; + pinctrl-names =3D "default"; +}; + +&tlmm { + battery_alert_default: battery-alert-default-state { + pins =3D "gpio12"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + + sdc2_cd_default: sdc2-cd-default-state { + pins =3D "gpio25"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + ts_int_default: ts-int-default-state { + pins =3D "gpio21"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; +}; --=20 2.44.0