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Tue, 2 Apr 2024 06:26:43 -0700 From: Sumit Gupta To: , , , , , , CC: , , , , , Subject: [Patch v2 2/2] memory: tegra: make sid and broadcast regions optional Date: Tue, 2 Apr 2024 18:56:26 +0530 Message-ID: <20240402132626.24693-3-sumitg@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240402132626.24693-1-sumitg@nvidia.com> References: <20240402132626.24693-1-sumitg@nvidia.com> X-NVConfidentiality: public Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000ECD8:EE_|CY5PR12MB9053:EE_ X-MS-Office365-Filtering-Correlation-Id: 94cf5edb-b154-445d-bb22-08dc53189a96 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: zonN2XtXM7mgrDW41lWzu/5g2uGGib1vVAsbHnr7KlLByvzKqMuILfuotVaVpStwuZ/evnVmTOuD0Ve+xDbvmpV3oCOuezhhvQtNsv5NpbqwN0dP0VZsqHqTxzK2BMDH0J3RErkuIx3vIfYJAfvS8oP9jURO/+TsGNwthGGsvI/rpC99+c05rDcT8tIAXEcmv07RrVnd2r7MyLWTqGNM8mh4UzDiA7Dr2zTjL87wNRWW0fPH2GVXaiEs7QFpniiL+JTQacHs+SWHAIplYTXOjF1exj83zjcUSQ9JeIK2p7zC9s0yD0kvVvrBTt/f0S/EsbYZs+dOBO0l+i7kuIt/hiJK1UDX5TviXLwNwMbInRJ4RfStujngN1sxJ+koH31sZlJ0NgTlkI+pHq0Tdp7GHILi+bPPKsUCIcdNclHTcw38Q/UcqWXUE77x8PP7hc7aOPh2kowkuZwXMbvOHqpKf6OGQ7xF/yn/TNaGM9NVAg7A0VfsuL77ODqFRHmqI+V5Ev6Sc3c1ps8AHQtekWI48h2PTUWl4KpJvag5wTbguwzpxYTRCAZ7HzRoSaeUQXIvrwdW4imjPy3THVwmR2wAwZ4HmhB/nCAJ5ALwuvVuKXEwPdXwFeB64mJf9UQNCCYJeud8hr6W2WXqxyXUt7m8gMUTqPWCnYDlqGpU+TBeSQo9aU5QMMd4aDm26/sj3uHadJN7BzE9W/72QOMydjuuHD8DL7hBcbm4kVfGzwNAxe56CsY4666z0wjqinIvc6mT X-Forefront-Antispam-Report: CIP:216.228.118.233;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge2.nvidia.com;CAT:NONE;SFS:(13230031)(36860700004)(1800799015)(376005)(82310400014);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Apr 2024 13:27:11.5626 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 94cf5edb-b154-445d-bb22-08dc53189a96 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000ECD8.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB9053 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" MC SID and Broadbast channel register access is restricted for Guest VM. In Tegra MC driver, consider both the regions as optional and skip access to restricted registers from Guest if a region is not present in Guest DT. Signed-off-by: Sumit Gupta --- drivers/memory/tegra/mc.c | 9 ++++++++- drivers/memory/tegra/mc.h | 18 +++++++++--------- drivers/memory/tegra/tegra186.c | 22 ++++++++++++---------- 3 files changed, 29 insertions(+), 20 deletions(-) diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c index 224b488794e5..d819dab1b223 100644 --- a/drivers/memory/tegra/mc.c +++ b/drivers/memory/tegra/mc.c @@ -899,6 +899,7 @@ static void tegra_mc_num_channel_enabled(struct tegra_m= c *mc) =20 static int tegra_mc_probe(struct platform_device *pdev) { + struct resource *res; struct tegra_mc *mc; u64 mask; int err; @@ -923,7 +924,13 @@ static int tegra_mc_probe(struct platform_device *pdev) /* length of MC tick in nanoseconds */ mc->tick =3D 30; =20 - mc->regs =3D devm_platform_ioremap_resource(pdev, 0); + if (mc->soc->num_channels) { + res =3D platform_get_resource_byname(pdev, IORESOURCE_MEM, "sid"); + if (res) + mc->regs =3D devm_ioremap_resource(&pdev->dev, res); + } else { + mc->regs =3D devm_platform_ioremap_resource(pdev, 0); + } if (IS_ERR(mc->regs)) return PTR_ERR(mc->regs); =20 diff --git a/drivers/memory/tegra/mc.h b/drivers/memory/tegra/mc.h index c3f6655bec60..5cdb9451f364 100644 --- a/drivers/memory/tegra/mc.h +++ b/drivers/memory/tegra/mc.h @@ -112,11 +112,11 @@ icc_provider_to_tegra_mc(struct icc_provider *provide= r) static inline u32 mc_ch_readl(const struct tegra_mc *mc, int ch, unsigned long offset) { - if (!mc->bcast_ch_regs) - return 0; - - if (ch =3D=3D MC_BROADCAST_CHANNEL) + if (ch =3D=3D MC_BROADCAST_CHANNEL) { + if (!mc->bcast_ch_regs) + return 0; return readl_relaxed(mc->bcast_ch_regs + offset); + } =20 return readl_relaxed(mc->ch_regs[ch] + offset); } @@ -124,13 +124,13 @@ static inline u32 mc_ch_readl(const struct tegra_mc *= mc, int ch, static inline void mc_ch_writel(const struct tegra_mc *mc, int ch, u32 value, unsigned long offset) { - if (!mc->bcast_ch_regs) - return; - - if (ch =3D=3D MC_BROADCAST_CHANNEL) + if (ch =3D=3D MC_BROADCAST_CHANNEL) { + if (!mc->bcast_ch_regs) + return; writel_relaxed(value, mc->bcast_ch_regs + offset); - else + } else { writel_relaxed(value, mc->ch_regs[ch] + offset); + } } =20 static inline u32 mc_readl(const struct tegra_mc *mc, unsigned long offset) diff --git a/drivers/memory/tegra/tegra186.c b/drivers/memory/tegra/tegra18= 6.c index 1b3183951bfe..7b5e9bd13ffd 100644 --- a/drivers/memory/tegra/tegra186.c +++ b/drivers/memory/tegra/tegra186.c @@ -26,20 +26,16 @@ static int tegra186_mc_probe(struct tegra_mc *mc) { struct platform_device *pdev =3D to_platform_device(mc->dev); + struct resource *res; unsigned int i; char name[8]; int err; =20 - mc->bcast_ch_regs =3D devm_platform_ioremap_resource_byname(pdev, "broadc= ast"); - if (IS_ERR(mc->bcast_ch_regs)) { - if (PTR_ERR(mc->bcast_ch_regs) =3D=3D -EINVAL) { - dev_warn(&pdev->dev, - "Broadcast channel is missing, please update your device-tree\n"); - mc->bcast_ch_regs =3D NULL; - goto populate; - } - - return PTR_ERR(mc->bcast_ch_regs); + res =3D platform_get_resource_byname(pdev, IORESOURCE_MEM, "broadcast"); + if (res) { + mc->bcast_ch_regs =3D devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(mc->bcast_ch_regs)) + return PTR_ERR(mc->bcast_ch_regs); } =20 mc->ch_regs =3D devm_kcalloc(mc->dev, mc->soc->num_channels, sizeof(*mc->= ch_regs), @@ -121,6 +117,9 @@ static int tegra186_mc_probe_device(struct tegra_mc *mc= , struct device *dev) if (!tegra_dev_iommu_get_stream_id(dev, &sid)) return 0; =20 + if (!mc->regs) + return 0; + while (!of_parse_phandle_with_args(dev->of_node, "interconnects", "#inter= connect-cells", index, &args)) { if (args.np =3D=3D mc->dev->of_node && args.args_count !=3D 0) { @@ -146,6 +145,9 @@ static int tegra186_mc_resume(struct tegra_mc *mc) #if IS_ENABLED(CONFIG_IOMMU_API) unsigned int i; =20 + if (!mc->regs) + return 0; + for (i =3D 0; i < mc->soc->num_clients; i++) { const struct tegra_mc_client *client =3D &mc->soc->clients[i]; =20 --=20 2.17.1