From nobody Thu Feb 12 04:37:44 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7455A55E4F for ; Mon, 1 Apr 2024 21:39:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712007595; cv=none; b=JPIDxQbB9wF1YoQsfnsCY2vAZIVk3laPvUYllXZaXAPfZiCYCJWaRMFC5XSsnWxh+UVPnDoiIggvQDlx2QsfWKiPWznA/86pt2qgA3TypEP8GCOQButLQFmjg2TqIctW8jDkNVmSFMD7QEvIuWzWLqcKNZF9rmjEXzHUHRpN0yI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712007595; c=relaxed/simple; bh=V+BpmS0L5AY0NVsYdTSBQxe6rtRi97k3MCIt6y0ESdA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=FLSLU5iWZRGga4pBtPVpYME9Synqan9D2iL4G1GNolx7JvzujSbsBQl/6gMZd9EO+erbImA0dbj9RJtlGPebT6UXB+2ctcNyAVcYBhQAeSIaIgcVhZwF4vK8iqkZONIIaXAezLCVo4rrKFcjsHUZ7HWdwoyP+xv1ganvyjOkAO8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=t6SR+duR; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="t6SR+duR" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1EE32C43394; Mon, 1 Apr 2024 21:39:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1712007595; bh=V+BpmS0L5AY0NVsYdTSBQxe6rtRi97k3MCIt6y0ESdA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=t6SR+duRyz91MSUJd6aDkPfhqtTUYz+BtdhwHcEwrjvBL3wMl3HTDfuq2dc5KxMs9 VbR0s4/x47BOzkstNFYga3IECVzsunTnepncGio7T7V5OQvbxe3y0O6Xu0PCcrGim4 xpM/LUutYwScLWvyOogZlV1s33uThDYjSz0nTsA76EG3QmRAVJXpVPhpWLkriWfrxf 9AE7YODRHtPCaVjNm2kjP3rWTjKCd9gdyAJbYSqMO+FybJLaCoxTshEq0U260FZFmJ uJ2D9qIfonNIAfSanKTkTyz8TSsf+ihOmImDZyIkJ7rWxapRNK22bfPuP1v1Bd5lyI NYNdUxyKkdA/w== Received: by paulmck-ThinkPad-P17-Gen-1.home (Postfix, from userid 1000) id C0299CE074C; Mon, 1 Apr 2024 14:39:54 -0700 (PDT) From: "Paul E. McKenney" To: linux-kernel@vger.kernel.org Cc: kernel-team@meta.com, "Paul E. McKenney" , Vineet Gupta , Andi Shyti , Andrzej Hajda , Arnd Bergmann , Palmer Dabbelt , linux-snps-arc@lists.infradead.org Subject: [PATCH RFC cmpxchg 3/8] ARC: Emulate one-byte and two-byte cmpxchg Date: Mon, 1 Apr 2024 14:39:45 -0700 Message-Id: <20240401213950.3910531-3-paulmck@kernel.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <31c82dcc-e203-48a9-aadd-f2fcd57d94c1@paulmck-laptop> References: <31c82dcc-e203-48a9-aadd-f2fcd57d94c1@paulmck-laptop> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use the new cmpxchg_emu_u8() and cmpxchg_emu_u16() to emulate one-byte and two-byte cmpxchg() on arc. Signed-off-by: Paul E. McKenney Cc: Vineet Gupta Cc: Andi Shyti Cc: Andrzej Hajda Cc: Arnd Bergmann Cc: Palmer Dabbelt Cc: --- arch/arc/Kconfig | 1 + arch/arc/include/asm/cmpxchg.h | 38 ++++++++++++++++++++++++++-------- 2 files changed, 30 insertions(+), 9 deletions(-) diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig index 99d2845f3feb9..0b40039f38eb2 100644 --- a/arch/arc/Kconfig +++ b/arch/arc/Kconfig @@ -14,6 +14,7 @@ config ARC select ARCH_HAS_SETUP_DMA_OPS select ARCH_HAS_SYNC_DMA_FOR_CPU select ARCH_HAS_SYNC_DMA_FOR_DEVICE + select ARCH_NEED_CMPXCHG_1_2_EMU select ARCH_SUPPORTS_ATOMIC_RMW if ARC_HAS_LLSC select ARCH_32BIT_OFF_T select BUILDTIME_TABLE_SORT diff --git a/arch/arc/include/asm/cmpxchg.h b/arch/arc/include/asm/cmpxchg.h index e138fde067dea..1e3e23adaca13 100644 --- a/arch/arc/include/asm/cmpxchg.h +++ b/arch/arc/include/asm/cmpxchg.h @@ -46,6 +46,12 @@ __typeof__(*(ptr)) _prev_; \ \ switch(sizeof((_p_))) { \ + case 1: \ + _prev_ =3D cmpxchg_emu_u8((volatile u8 *)_p_, _o_, _n_); \ + break; \ + case 2: \ + _prev_ =3D cmpxchg_emu_u16((volatile u16 *)_p_, _o_, _n_); \ + break; \ case 4: \ _prev_ =3D __cmpxchg(_p_, _o_, _n_); \ break; \ @@ -65,16 +71,30 @@ __typeof__(*(ptr)) _prev_; \ unsigned long __flags; \ \ - BUILD_BUG_ON(sizeof(_p_) !=3D 4); \ + switch(sizeof((_p_))) { \ + case 1: \ + __flags =3D cmpxchg_emu_u8((volatile u8 *)_p_, _o_, _n_); \ + _prev_ =3D (__typeof__(*(ptr)))__flags; \ + break; \ + case 2: \ + __flags =3D cmpxchg_emu_u16((volatile u16 *)_p_, _o_, _n_); \ + _prev_ =3D (__typeof__(*(ptr)))__flags; \ + break; \ + case 4: \ + /* \ + * spin lock/unlock provide the needed smp_mb() \ + * before/after \ + */ \ + atomic_ops_lock(__flags); \ + _prev_ =3D *_p_; \ + if (_prev_ =3D=3D _o_) \ + *_p_ =3D _n_; \ + atomic_ops_unlock(__flags); \ + break; \ + default: \ + BUILD_BUG(); \ + } \ \ - /* \ - * spin lock/unlock provide the needed smp_mb() before/after \ - */ \ - atomic_ops_lock(__flags); \ - _prev_ =3D *_p_; \ - if (_prev_ =3D=3D _o_) \ - *_p_ =3D _n_; \ - atomic_ops_unlock(__flags); \ _prev_; \ }) =20 --=20 2.40.1