From nobody Mon Feb 9 21:18:44 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BA6A1C148; Sun, 31 Mar 2024 04:18:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711858730; cv=none; b=b7EN8IsNmCwRWo5pWSYtVW8vjf9NTn0smoMMW7UuLlXDOWlG+EPgxjbQ7hafOPmQHOlaSp8ZbMGPsEOg93l9f3zOiDgUHDPdleQnUdA0So1HZeej60/3vmyKfxu4dB5iXFTN1Br9QwvaQ4gFsdJxRYuOFrPEUZsDOtZ9FNzsAvY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711858730; c=relaxed/simple; bh=xYmgREzCBywKoxooAo66NI+2rXvFajDOQHS3LMXIdnQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Xke3/Lje6t6GnFbn2GN+9PfRkg+q699MPWmxSGUs6CAG6hF8VFd3KLJ3RdStIr2Z1v9Dp1Dazd/3yVKQPLEr0qLY1EcbHrKVM9V8IDC0pwmWYD7+irN6F7zNQT/lHjYBjcnCsVTFBjEf0gGPF1TKfu3gUIqUut5HbT9JP3hwTKo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=cnEdt35r; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="cnEdt35r" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 211F7C43390; Sun, 31 Mar 2024 04:18:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1711858730; bh=xYmgREzCBywKoxooAo66NI+2rXvFajDOQHS3LMXIdnQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cnEdt35rOq+GQr4S+dw/OQkEWHJa2472sZr61tQ0/YSr3wGqPfY+lwu9W5i9DxFcW zRS2A4QtMnFc7wQpFJ4kIv2A8Qpua6gJSCi9vgE+RaYxyBuUghqZtm+ZKd57jgLSZG 91NMWjWmZeS/H/YCVlpD3RKgNhqS+uDl1BXUYC5hkSy2L6gD4CjGWi8W664nH7kSqV AavBe+DbUc1j5McH7kKzSUQiHjxCCwPXFddDXmvW7qn/fBsQuTDO+eqJRSp2z5otXd 3/jbDpIm42UZxgX8bTHfgoVA6gUOIDxJZDvufJfEu1Q7urHo84GTI9iP396CDMo5BT Cm2sVZuTngMeA== From: Andrii Nakryiko To: x86@kernel.org, peterz@infradead.org, mingo@redhat.com, tglx@linutronix.de Cc: bpf@vger.kernel.org, linux-kernel@vger.kernel.org, jolsa@kernel.org, song@kernel.org, kernel-team@meta.com, Andrii Nakryiko , Sandipan Das Subject: [PATCH v4 4/4] perf/x86/amd: don't reject non-sampling events with configured LBR Date: Sat, 30 Mar 2024 21:18:30 -0700 Message-ID: <20240331041830.2806741-5-andrii@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240331041830.2806741-1-andrii@kernel.org> References: <20240331041830.2806741-1-andrii@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Now that it's possible to capture LBR on AMD CPU from BPF at arbitrary point, there is no reason to artificially limit this feature to just sampling events. So corresponding check is removed. AFAIU, there is no correctness implications of doing this (and it was possible to bypass this check by just setting perf_event's sample_period to 1 anyways, so it doesn't guard all that much). Reviewed-by: Sandipan Das Signed-off-by: Andrii Nakryiko --- arch/x86/events/amd/lbr.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/arch/x86/events/amd/lbr.c b/arch/x86/events/amd/lbr.c index 0e4de028590d..75920f895d67 100644 --- a/arch/x86/events/amd/lbr.c +++ b/arch/x86/events/amd/lbr.c @@ -310,10 +310,6 @@ int amd_pmu_lbr_hw_config(struct perf_event *event) { int ret =3D 0; =20 - /* LBR is not recommended in counting mode */ - if (!is_sampling_event(event)) - return -EINVAL; - ret =3D amd_pmu_lbr_setup_filter(event); if (!ret) event->attach_state |=3D PERF_ATTACH_SCHED_CB; --=20 2.43.0