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a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A From: Sumit Semwal LG SW43408 is 1080x2160, 4-lane MIPI-DSI panel present on Google Pixel 3 phones. Signed-off-by: Vinod Koul Signed-off-by: Sumit Semwal [caleb: convert to yaml] Signed-off-by: Caleb Connolly Signed-off-by: Dmitry Baryshkov --- .../bindings/display/panel/lg,sw43408.yaml | 37 ++++++++++++++++++= ++++ 1 file changed, 37 insertions(+) diff --git a/Documentation/devicetree/bindings/display/panel/lg,sw43408.yam= l b/Documentation/devicetree/bindings/display/panel/lg,sw43408.yaml new file mode 100644 index 000000000000..f3c9c9343c4f --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/lg,sw43408.yaml @@ -0,0 +1,37 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/lg,sw43408.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LG SW43408 1080x2160 DSI panel + +maintainers: + - Caleb Connolly + +description: | + This panel is used on the Pixel 3, it is a 60hz OLED panel which + required DSC (Display Stream Compression) and has rounded corners. + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + items: + - const: lg,sw43408 + + reg: true + port: true + vddi-supply: true + vpnl-supply: true + reset-gpios: true + +additionalProperties: false + +required: + - compatible + - vddi-supply + - vpnl-supply + - reset-gpios +... --=20 2.39.2 From nobody Mon Feb 9 10:11:39 2026 Received: from mail-lf1-f54.google.com (mail-lf1-f54.google.com [209.85.167.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8801B79FE for ; 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Fri, 29 Mar 2024 20:59:31 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id br2-20020a056512400200b00515d1393f3csm423957lfb.104.2024.03.29.20.59.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Mar 2024 20:59:31 -0700 (PDT) From: Dmitry Baryshkov Date: Sat, 30 Mar 2024 05:59:29 +0200 Subject: [PATCH 2/3] drm/mipi-dsi: add mipi_dsi_compression_mode_raw() Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240330-lg-sw43408-panel-v1-2-f5580fc9f2da@linaro.org> References: <20240330-lg-sw43408-panel-v1-0-f5580fc9f2da@linaro.org> In-Reply-To: <20240330-lg-sw43408-panel-v1-0-f5580fc9f2da@linaro.org> To: Sumit Semwal , Caleb Connolly , Neil Armstrong , Jessica Zhang , Sam Ravnborg , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3402; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=1dHUwNPq/ZE2lZqujLo0paqKG5T8bLmbO34BUbpj00o=; b=owGbwMvMwMXYbdNlx6SpcZXxtFoSQxp7n2LDer59c2eE62z6cLjhcvt1pn18ebOVrm3jbOacZ XOrNXp6J6MxCwMjF4OsmCKLT0HL1JhNyWEfdkythxnEygQyhYGLUwAm8oeJ/a9MuG3iCbHu+3Y/ ivvue7oeWlJ+I/HySrsnf+J/5AcJvXoqIOivkp8c9urdu3iRhXyT/P4uO82181qg+b32U591bby N1dZJcProb4/sUuk2Td1+RCC9Ymt/G1PW6yxNdzGLkEOyTNFX1JXnVPpfjzu/uF3xtmvKpYdXis ybTuUWZy9Sr0uvnV7z8li88pZdcxLfOTmXLpfRfNjTM1N18bmazvhn10xCXTwm6QbP9+yavOn03 ObZutxeF46d9eXUvapwZAOH4cKulZpWQmmmoaoWv8J4c2Yc99+7+uGrtv47sfzSdf3bzc5HHLlW evmzq6zyvcgQVrOIwD2XIs0bllVu2Zt391DC1/KVE+WNAA== X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The LG SW43408 panel requires sending non-standard data as a part of the MIPI_DSI_COMPRESSION_MODE packet. Rather than hacking existing mipi_dsi_compression_mode() add mipi_dsi_compression_mode_raw(), which accepts raw data buffer and length. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/drm_mipi_dsi.c | 34 ++++++++++++++++++++++++++-------- include/drm/drm_mipi_dsi.h | 1 + 2 files changed, 27 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c index ef6e416522f8..f340d1e0a9a5 100644 --- a/drivers/gpu/drm/drm_mipi_dsi.c +++ b/drivers/gpu/drm/drm_mipi_dsi.c @@ -645,29 +645,47 @@ int mipi_dsi_set_maximum_return_packet_size(struct mi= pi_dsi_device *dsi, EXPORT_SYMBOL(mipi_dsi_set_maximum_return_packet_size); =20 /** - * mipi_dsi_compression_mode() - enable/disable DSC on the peripheral + * mipi_dsi_compression_mode_raw() - control DSC on the peripheral * @dsi: DSI peripheral device - * @enable: Whether to enable or disable the DSC + * @data: data to be sent to the device + * @len: size of the data buffer * - * Enable or disable Display Stream Compression on the peripheral using the + * Control the Display Stream Compression on the peripheral using the * default Picture Parameter Set and VESA DSC 1.1 algorithm. * * Return: 0 on success or a negative error code on failure. */ -ssize_t mipi_dsi_compression_mode(struct mipi_dsi_device *dsi, bool enable) +ssize_t mipi_dsi_compression_mode_raw(struct mipi_dsi_device *dsi, void *d= ata, size_t len) { - /* Note: Needs updating for non-default PPS or algorithm */ - u8 tx[2] =3D { enable << 0, 0 }; struct mipi_dsi_msg msg =3D { .channel =3D dsi->channel, .type =3D MIPI_DSI_COMPRESSION_MODE, - .tx_len =3D sizeof(tx), - .tx_buf =3D tx, + .tx_len =3D len, + .tx_buf =3D data, }; int ret =3D mipi_dsi_device_transfer(dsi, &msg); =20 return (ret < 0) ? ret : 0; } +EXPORT_SYMBOL(mipi_dsi_compression_mode_raw); + +/** + * mipi_dsi_compression_mode() - enable/disable DSC on the peripheral + * @dsi: DSI peripheral device + * @enable: Whether to enable or disable the DSC + * + * Enable or disable Display Stream Compression on the peripheral using the + * default Picture Parameter Set and VESA DSC 1.1 algorithm. + * + * Return: 0 on success or a negative error code on failure. + */ +ssize_t mipi_dsi_compression_mode(struct mipi_dsi_device *dsi, bool enable) +{ + /* Note: Needs updating for non-default PPS or algorithm */ + u8 tx[2] =3D { enable << 0, 0 }; + + return mipi_dsi_compression_mode_raw(dsi, tx, sizeof(tx)); +} EXPORT_SYMBOL(mipi_dsi_compression_mode); =20 /** diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h index c0aec0d4d664..321d2b019687 100644 --- a/include/drm/drm_mipi_dsi.h +++ b/include/drm/drm_mipi_dsi.h @@ -242,6 +242,7 @@ int mipi_dsi_turn_on_peripheral(struct mipi_dsi_device = *dsi); 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Fri, 29 Mar 2024 20:59:31 -0700 (PDT) From: Dmitry Baryshkov Date: Sat, 30 Mar 2024 05:59:30 +0200 Subject: [PATCH 3/3] drm: panel: Add LG sw43408 panel driver Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240330-lg-sw43408-panel-v1-3-f5580fc9f2da@linaro.org> References: <20240330-lg-sw43408-panel-v1-0-f5580fc9f2da@linaro.org> In-Reply-To: <20240330-lg-sw43408-panel-v1-0-f5580fc9f2da@linaro.org> To: Sumit Semwal , Caleb Connolly , Neil Armstrong , Jessica Zhang , Sam Ravnborg , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Vinod Koul , Caleb Connolly X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=12464; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=YF+FNs4wpu9U2rfxEq/PVlcJ4tLwN+tWipMzmBnmhFI=; b=owGbwMvMwMXYbdNlx6SpcZXxtFoSQxp7n+K+iexlj0y5mdXnTGmYIqmQobNV6/IT+8wTu7kDz 818cW1WJ6MxCwMjF4OsmCKLT0HL1JhNyWEfdkythxnEygQyhYGLUwAmkjKd/Z+ho+12o/rVeQ/8 dDICi017bv+ZFLjO0f62olecq9L+3WuL3SbkeHQ+La0K7S851b7r2MJt4s/8A/Wbkg/0b7lTo+e x5dx3mWtViml+x547JRsoyR/qeOusbHtlSaNH3hoRFo49LvxXLnUH9mRs3suvPavp1nuJfb/Vs7 dbXDBp+Dz/29yiKnPjB1n7v+s4vs9Oy+II8jwU/fyqSdG/VzVutTlO6wK2Tgt80NP9vchw/m27N 4lJ03v4f8jteB7ifr7AhfXRTANJ76qXmX8YdKssjBRjr2eluUTZ+8Up9iWEbdRXOZbAL1xq7XDr 7rOfSRLsd7b9epqYYcfD/2bBpoqbvRWNxw/PUzBiqa0GAA== X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A From: Sumit Semwal LG SW43408 is 1080x2160, 4-lane MIPI-DSI panel, used in some Pixel3 phones. Whatever init sequence we have for this panel isn't capable of initialising it completely, toggling the reset gpio ever causes the panel to die. Until this is resolved we avoid resetting the panel. The disable/unprepare functions only put the panel to sleep mode and disable the backlight. Signed-off-by: Sumit Semwal [vinod: Add DSC support] Signed-off-by: Vinod Koul [caleb: cleanup and support turning off the panel] Signed-off-by: Caleb Connolly [DB: partially rewrote the driver and fixed DSC programming] Signed-off-by: Dmitry Baryshkov --- MAINTAINERS | 8 + drivers/gpu/drm/panel/Kconfig | 11 ++ drivers/gpu/drm/panel/Makefile | 1 + drivers/gpu/drm/panel/panel-lg-sw43408.c | 322 +++++++++++++++++++++++++++= ++++ 4 files changed, 342 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 4b511a55101c..f4cf7ee97376 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6755,6 +6755,14 @@ S: Maintained F: Documentation/devicetree/bindings/display/panel/jadard,jd9365da-h3.yaml F: drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c =20 +DRM DRIVER FOR LG SW43408 PANELS +M: Sumit Semwal +M: Caleb Connolly +S: Maintained +T: git git://anongit.freedesktop.org/drm/drm-misc +F: Documentation/devicetree/bindings/display/panel/lg,sw43408.yaml +F: drivers/gpu/drm/panel/panel-lg-sw43408.c + DRM DRIVER FOR LOGICVC DISPLAY CONTROLLER M: Paul Kocialkowski S: Supported diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig index d037b3b8b999..f94c702735cb 100644 --- a/drivers/gpu/drm/panel/Kconfig +++ b/drivers/gpu/drm/panel/Kconfig @@ -335,6 +335,17 @@ config DRM_PANEL_LG_LG4573 Say Y here if you want to enable support for LG4573 RGB panel. To compile this driver as a module, choose M here. =20 +config DRM_PANEL_LG_SW43408 + tristate "LG SW43408 panel" + depends on OF + depends on DRM_MIPI_DSI + depends on BACKLIGHT_CLASS_DEVICE + help + Say Y here if you want to enable support for LG sw43408 panel. + The panel has a 1080x2160 resolution and uses + 24 bit RGB per pixel. It provides a MIPI DSI interface to + the host and has a built-in LED backlight. + config DRM_PANEL_MAGNACHIP_D53E6EA8966 tristate "Magnachip D53E6EA8966 DSI panel" depends on OF && SPI diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile index f156d7fa0bcc..a75687d13caf 100644 --- a/drivers/gpu/drm/panel/Makefile +++ b/drivers/gpu/drm/panel/Makefile @@ -34,6 +34,7 @@ obj-$(CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W) +=3D panel-l= eadtek-ltk050h3146w.o obj-$(CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829) +=3D panel-leadtek-ltk500hd18= 29.o obj-$(CONFIG_DRM_PANEL_LG_LB035Q02) +=3D panel-lg-lb035q02.o obj-$(CONFIG_DRM_PANEL_LG_LG4573) +=3D panel-lg-lg4573.o +obj-$(CONFIG_DRM_PANEL_LG_SW43408) +=3D panel-lg-sw43408.o obj-$(CONFIG_DRM_PANEL_MAGNACHIP_D53E6EA8966) +=3D panel-magnachip-d53e6ea= 8966.o obj-$(CONFIG_DRM_PANEL_NEC_NL8048HL11) +=3D panel-nec-nl8048hl11.o obj-$(CONFIG_DRM_PANEL_NEWVISION_NV3051D) +=3D panel-newvision-nv3051d.o diff --git a/drivers/gpu/drm/panel/panel-lg-sw43408.c b/drivers/gpu/drm/pan= el/panel-lg-sw43408.c new file mode 100644 index 000000000000..365d25e14d54 --- /dev/null +++ b/drivers/gpu/drm/panel/panel-lg-sw43408.c @@ -0,0 +1,322 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019-2024 Linaro Ltd + * Author: Sumit Semwal + * Dmitry Baryshkov + */ + +#include +#include +#include +#include +#include +#include + +#include