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[62.178.148.172]) by smtp.gmail.com with ESMTPSA id g16-20020a170906539000b00a46dd1f7dc1sm1869942ejo.92.2024.03.29.05.14.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Mar 2024 05:14:20 -0700 (PDT) From: =?UTF-8?q?Christoph=20M=C3=BCllner?= To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Palmer Dabbelt , Paul Walmsley , Albert Ou , Philipp Tomsich , =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= , Daniel Henrique Barboza , Heiko Stuebner , Cooper Qu , Zhiwei Liu , Huang Tao , Alistair Francis , Andrew Jones , Conor Dooley , Qingfang Deng , Alexandre Ghiti Cc: =?UTF-8?q?Christoph=20M=C3=BCllner?= Subject: [PATCH v2 2/2] riscv: T-Head: Test availability bit before enabling MAEE errata Date: Fri, 29 Mar 2024 13:14:14 +0100 Message-ID: <20240329121414.688391-3-christoph.muellner@vrull.eu> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240329121414.688391-1-christoph.muellner@vrull.eu> References: <20240329121414.688391-1-christoph.muellner@vrull.eu> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable T-Head's MAEE mechanism (non-compatible equivalent of RVI's Svpbmt) is currently assumed for all T-Head harts. However, QEMU recently decided to drop acceptance of guests that write reserved bits in PTEs. As MAEE uses reserved bits in PTEs and Linux applies the MAEE errata for all T-Head harts, this broke the Linux startup on QEMU emulations of the C906 emulation. This patch attempts to address this issue by testing the MAEE bit in the th.sxstatus CSR. This CSR is available in HW and can be emulated in QEMU. This patch also makes the MAEE probing mechanism reliable, because a test for the right combination of mvendorid, marchid, and mimpid is not sufficient to enable MAEE. Signed-off-by: Christoph M=C3=BCllner Reviewed-by: Conor Dooley --- arch/riscv/errata/thead/errata.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/arch/riscv/errata/thead/errata.c b/arch/riscv/errata/thead/err= ata.c index 8c8a8a4b0421..dfa007039208 100644 --- a/arch/riscv/errata/thead/errata.c +++ b/arch/riscv/errata/thead/errata.c @@ -19,6 +19,9 @@ #include #include =20 +#define CSR_TH_SXSTATUS 0x5c0 +#define SXSTATUS_MAEE _AC(0x200000, UL) + static bool errata_probe_maee(unsigned int stage, unsigned long arch_id, unsigned long impid) { @@ -28,11 +31,14 @@ static bool errata_probe_maee(unsigned int stage, if (arch_id !=3D 0 || impid !=3D 0) return false; =20 - if (stage =3D=3D RISCV_ALTERNATIVES_EARLY_BOOT || - stage =3D=3D RISCV_ALTERNATIVES_MODULE) - return true; + if (stage !=3D RISCV_ALTERNATIVES_EARLY_BOOT && + stage !=3D RISCV_ALTERNATIVES_MODULE) + return false; =20 - return false; + if (!(csr_read(CSR_TH_SXSTATUS) & SXSTATUS_MAEE)) + return false; + + return true; } =20 /* --=20 2.44.0