From nobody Sun Feb 8 03:58:02 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ED02217265B; Wed, 27 Mar 2024 12:21:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711542120; cv=none; b=FP6PefrOnvFStsf9gTegY3AcYO9eKfuagZhl6Gw7D8mK8XQQQnTUimXguT+f7CtBI1p0hZ3/T4ycPLc4wtyMJD/fpuSW2Ul9GFUPeC8os19kV3lWdCTc2I0xoT/0Onm+KnS+njf3mWykS0n8XZkqtHgp6+k9fWG6ZEBCozbIAZ0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711542120; c=relaxed/simple; bh=WpHpcwGsUDD9B18SKvg6W1MaOAgENhiiCvaK0G8vO+o=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=YgeOiUNC6BSyl4XsStHaqrHHcn6eZkstjz8mnobDuJm1Z23EciN5cG6qX/Cn36KYd+9N4vWUVxah4bEsdXQ6TeM9jZTyvrJ8WkdvKe2zKonz4Xb8iWVbEDND0iY+y3ujTqaOpvmFjDWbl/+P7AkLRizxFB4eh5cF5qT8yD7yTis= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=KNF5g7SH; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="KNF5g7SH" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5C160C433C7; Wed, 27 Mar 2024 12:21:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1711542119; bh=WpHpcwGsUDD9B18SKvg6W1MaOAgENhiiCvaK0G8vO+o=; h=From:To:Cc:Subject:Date:From; b=KNF5g7SH3ffjeI+T+RwK7uUc6Qobgv6e03aaSgOWLsQglcJXs4Cq3qtaovnX3L8qk qcMJz0T+iBmcoVJ3shxgTGAWSxJdfjdsjnUzj9T24lHO2D2vBiRCz+vT+E1bgvyyyD Qx6A2EaA97of9Hwrn0ISLz4d9Fj7K4QLweEg9XaDW5KXa3EjXK7UjLBFivU4EzilJS CFJqTG6FFKRGa0zOAoohqKVOBo+V1fzcIIUacZHUUDtKS5TT8LmuuW10ZAxHbpXmbY D8XchKmFc3gsT9W9q19gh2/FIzY9sT0U3URx9ezhr31+s99aK8vLmbiU++oNFUN9K2 AoyIXTHffdKMg== From: Sasha Levin To: stable@vger.kernel.org, wenjing.liu@amd.com Cc: Mario Limonciello , Alex Deucher , Chaitanya Dhere , Martin Leung , Wayne Lin , Daniel Wheeler , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: FAILED: Patch "drm/amd/display: Revert Remove pixle rate limit for subvp" failed to apply to 5.4-stable tree Date: Wed, 27 Mar 2024 08:21:57 -0400 Message-ID: <20240327122157.2837294-1-sashal@kernel.org> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Hint: ignore X-stable: review Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The patch below does not apply to the 5.4-stable tree. If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to . Thanks, Sasha Acked-by: Wayne Lin Reviewed-by: Chaitanya Dhere Reviewed-by: Martin Leung Tested-by: Daniel Wheeler ------------------ original commit in Linus's tree ------------------ From cf8c498694a443e28dc1222f3ab94677114a4724 Mon Sep 17 00:00:00 2001 From: Wenjing Liu Date: Mon, 4 Mar 2024 11:20:27 -0500 Subject: [PATCH] drm/amd/display: Revert Remove pixle rate limit for subvp This reverts commit 340383c734f8 ("drm/amd/display: Remove pixle rate limit for subvp") [why] The original commit causes a regression when subvp is applied on ODM required 8k60hz timing. The display shows black screen on boot. The issue can be recovered with hotplug. It also causes MPO to fail. We will temprarily revert this commit and investigate the root cause further. Cc: Mario Limonciello Cc: Alex Deucher Cc: stable@vger.kernel.org Reviewed-by: Chaitanya Dhere Reviewed-by: Martin Leung Acked-by: Wayne Lin Signed-off-by: Wenjing Liu Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c b/drivers= /gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c index b49e1dc9d8ba5..a0a65e0991041 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c @@ -623,6 +623,7 @@ static bool dcn32_assign_subvp_pipe(struct dc *dc, * - Not TMZ surface */ if (pipe->plane_state && !pipe->top_pipe && !dcn32_is_center_timing(pipe= ) && + !(pipe->stream->timing.pix_clk_100hz / 10000 > DCN3_2_MAX_SUBVP_PIXEL_= RATE_MHZ) && (!dcn32_is_psr_capable(pipe) || (context->stream_count =3D=3D 1 && dc-= >caps.dmub_caps.subvp_psr)) && dc_state_get_pipe_subvp_type(context, pipe) =3D=3D SUBVP_NONE && (refresh_rate < 120 || dcn32_allow_subvp_high_refresh_rate(dc, context= , pipe)) && --=20 2.43.0