From nobody Mon May 13 03:10:12 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4546012F588; Wed, 27 Mar 2024 12:16:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711541804; cv=none; b=Kom3u36+hIWqFcJZvjekT7CyD0ucC8wjnIAxojQDQXKV2WYBoqMsbBC90BRFctlcAkiINhi3Pkd4Qps84RSUnFSIJbmKJqNSfd6KaIKo+njyVhI4BcXd9IMTsdQ73bITQCRuZKSWM6UD6SPtxo29Q4LyGNHMdpdZrJYWO0P8b40= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711541804; c=relaxed/simple; bh=aoKhjrCE68hmcXBd1i/RSLAq1MJA/bqT0OrmVP43DfU=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=MoQunqjb458PsGy6FRvwr6+gkNieNL8j9lio3fKwjPJ9gy3JcOLDm15wzb985o0c7HQzFIgdrqsYcmGFFzUudDD/eyWBOPBZ4Ysk2ZCSGX2V+6z7cNgQJPZqvUkyudjaRdHnd6pqPzd0wj2lmDLuSzG6oWKBr8egR9RB5GV6J5o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=UY+tvFri; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="UY+tvFri" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9F97BC433F1; Wed, 27 Mar 2024 12:16:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1711541803; bh=aoKhjrCE68hmcXBd1i/RSLAq1MJA/bqT0OrmVP43DfU=; h=From:To:Cc:Subject:Date:From; b=UY+tvFrizDJrndk/dPo7Hr2t4McOwjDKaCsFO5frWIrL/Lywl1no6NrtvzwPeeJg4 vgJ/QCxqjU+VduEalDy1khqv4H3+wYi1Ucdhyafg4nFkDTf6gacgMXwxzVr+V7KnXH e/aBl27CgwYppvziULcg5pjYu8JT/WEPLusehzD+GZsckm0VzM1yo2tdJyzff37jVY CWjDeqbe/QosccDSEsCOKmi4Kxtil3K1lwmpI0O96i4sPuGXfOH5gyugrtKnq+wz/6 u2KbKn/f+Cs8xBv/NTLCfB+zjE34BGp5w826Kxd5ThB1xfKifavVsFlbMFYSegNtpU P8kHbOZCCKbzw== From: Sasha Levin To: stable@vger.kernel.org, swapnil.patel@amd.com Cc: Mario Limonciello , Alex Deucher , Chaitanya Dhere , Alex Hung , Daniel Wheeler , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: FAILED: Patch "drm/amd/display: Change default size for dummy plane in DML2" failed to apply to 5.15-stable tree Date: Wed, 27 Mar 2024 08:16:41 -0400 Message-ID: <20240327121641.2832915-1-sashal@kernel.org> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Hint: ignore X-stable: review Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The patch below does not apply to the 5.15-stable tree. If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to . Thanks, Sasha Acked-by: Alex Hung Reviewed-by: Chaitanya Dhere Tested-by: Daniel Wheeler ------------------ original commit in Linus's tree ------------------ From 75eb8f7df65c5e6eb22a5aff8deb60ce0b65de1a Mon Sep 17 00:00:00 2001 From: Swapnil Patel Date: Tue, 13 Feb 2024 08:09:48 -0500 Subject: [PATCH] drm/amd/display: Change default size for dummy plane in DM= L2 [WHY & HOW] Currently, to map dc states into dml_display_cfg, We create a dummy plane if the stream doesn't have any planes attached to it. This dummy plane uses max addersable width height. This results in certain mode validations failing when they shouldn't. Cc: Mario Limonciello Cc: Alex Deucher Cc: stable@vger.kernel.org Reviewed-by: Chaitanya Dhere Acked-by: Alex Hung Signed-off-by: Swapnil Patel Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher --- .../display/dc/dml2/dml2_translation_helper.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c = b/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c index 1ba6933d2b361..17a58f41fc6a8 100644 --- a/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c +++ b/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c @@ -824,13 +824,25 @@ static struct scaler_data get_scaler_data_for_plane(c= onst struct dc_plane_state =20 static void populate_dummy_dml_plane_cfg(struct dml_plane_cfg_st *out, uns= igned int location, const struct dc_stream_state *in) { + dml_uint_t width, height; + + if (in->timing.h_addressable > 3840) + width =3D 3840; + else + width =3D in->timing.h_addressable; // 4K max + + if (in->timing.v_addressable > 2160) + height =3D 2160; + else + height =3D in->timing.v_addressable; // 4K max + out->CursorBPP[location] =3D dml_cur_32bit; out->CursorWidth[location] =3D 256; =20 out->GPUVMMinPageSizeKBytes[location] =3D 256; =20 - out->ViewportWidth[location] =3D in->timing.h_addressable; - out->ViewportHeight[location] =3D in->timing.v_addressable; + out->ViewportWidth[location] =3D width; + out->ViewportHeight[location] =3D height; out->ViewportStationary[location] =3D false; out->ViewportWidthChroma[location] =3D 0; out->ViewportHeightChroma[location] =3D 0; @@ -849,7 +861,7 @@ static void populate_dummy_dml_plane_cfg(struct dml_pla= ne_cfg_st *out, unsigned out->HTapsChroma[location] =3D 0; out->VTapsChroma[location] =3D 0; out->SourceScan[location] =3D dml_rotation_0; - out->ScalerRecoutWidth[location] =3D in->timing.h_addressable; + out->ScalerRecoutWidth[location] =3D width; =20 out->LBBitPerPixel[location] =3D 57; =20 --=20 2.43.0