From nobody Sat Feb 7 21:24:15 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 83DDE134CD3; Wed, 27 Mar 2024 12:08:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711541280; cv=none; b=Pg6n7N4eo1DmruySAY+xHGpw5tiL7cjD0f/oU5pPbiReK7px3pMW0cFHrLdznDaF2ZOftoN8mDmanBejOb+PYLl9F49sTk4KcM+8F5g3UIc0V/1skqU/izMwAU5e19vQbwlWx6ImhWBhkXI6m0EQj0Vlrsj/BlslgEQJ1eyw91U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711541280; c=relaxed/simple; bh=4qFhr1I6nsrTVTR45fEiijDXQsLNyF63gQIWgwVY7Y4=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=QhJohjmRB0BOkK+Y1cPB6Z9t/MZiPmCZhnslEPCtN0ryTPyEJ1qbZR0PS7SspaBBQ0oYm2vP0+Ob/HzNupBxF9J9wDAV8wKfgKRUAE/cdO3ZWjIbNIfpgcsOHJqMdrBeX/jTUjlTgpuVm9tcaace60QrDBkJXhl8sjPp4qjOhjU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=g0G43IGT; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="g0G43IGT" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 39C89C43399; Wed, 27 Mar 2024 12:07:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1711541280; bh=4qFhr1I6nsrTVTR45fEiijDXQsLNyF63gQIWgwVY7Y4=; h=From:To:Cc:Subject:Date:From; b=g0G43IGT7RrP7uteZZOScyPGstqI5Rp3zHma+QakcrwfAjSWIt5wrzcN7GvbVwM5E h2uOyrm4h/91zdPb/mUJOoEijaYk8fsw89cxRMzNY4cV3IDXs4t/tizzCCMLzodR72 YVGKysmYrn1TMZdqqJ7D1GSb24B8FtadomSkX/PwHvg151Mh7f6ydHpX9aWcivK0pk CypoS0e0YsPpUjWxYItko9M+KfUve/N0Xi7dwUwRvtdNW69DFmJIl2df9l2GKoz7Rn roaFZM2RHf/WWVNiNLhh281vTqzggd7fw9vGK49r/Z8V/ulsO8aYB86DFQlIW24hcc BzNq5oOWNWEiQ== From: Sasha Levin To: stable@vger.kernel.org, lewis.huang@amd.com Cc: Mario Limonciello , Anthony Koo , Rodrigo Siqueira , Daniel Wheeler , Alex Deucher , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: FAILED: Patch "drm/amd/display: Only allow dig mapping to pwrseq in new asic" failed to apply to 6.8-stable tree Date: Wed, 27 Mar 2024 08:07:57 -0400 Message-ID: <20240327120758.2825841-1-sashal@kernel.org> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Hint: ignore X-stable: review Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The patch below does not apply to the 6.8-stable tree. If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to . Thanks, Sasha Acked-by: Rodrigo Siqueira Reviewed-by: Anthony Koo Tested-by: Daniel Wheeler ------------------ original commit in Linus's tree ------------------ From 4af4d2c275aeb667bc2bca0d2135b825e931a55a Mon Sep 17 00:00:00 2001 From: Lewis Huang Date: Wed, 31 Jan 2024 17:20:17 +0800 Subject: [PATCH] drm/amd/display: Only allow dig mapping to pwrseq in new a= sic [Why] The old asic only have 1 pwrseq hw. We don't need to map the diginst to pwrseq inst in old asic. [How] 1. Only mapping dig to pwrseq for new asic. 2. Move mapping function into dcn specific panel control component Cc: Stable # v6.6+ Cc: Mario Limonciello Link: https://gitlab.freedesktop.org/drm/amd/-/issues/3122 Reviewed-by: Anthony Koo Acked-by: Rodrigo Siqueira Tested-by: Daniel Wheeler Signed-off-by: Lewis Huang Signed-off-by: Alex Deucher --- .../drm/amd/display/dc/dce/dce_panel_cntl.c | 1 + .../amd/display/dc/dcn301/dcn301_panel_cntl.c | 1 + .../amd/display/dc/dcn31/dcn31_panel_cntl.c | 18 ++++++++++++- .../drm/amd/display/dc/inc/hw/panel_cntl.h | 2 +- .../drm/amd/display/dc/link/link_factory.c | 26 +------------------ 5 files changed, 21 insertions(+), 27 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.c b/drivers/= gpu/drm/amd/display/dc/dce/dce_panel_cntl.c index e8570060d007b..5bca67407c5b1 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.c +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.c @@ -290,4 +290,5 @@ void dce_panel_cntl_construct( dce_panel_cntl->base.funcs =3D &dce_link_panel_cntl_funcs; dce_panel_cntl->base.ctx =3D init_data->ctx; dce_panel_cntl->base.inst =3D init_data->inst; + dce_panel_cntl->base.pwrseq_inst =3D 0; } diff --git a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_panel_cntl.c b/dr= ivers/gpu/drm/amd/display/dc/dcn301/dcn301_panel_cntl.c index ad0df1a72a90a..9e96a3ace2077 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_panel_cntl.c +++ b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_panel_cntl.c @@ -215,4 +215,5 @@ void dcn301_panel_cntl_construct( dcn301_panel_cntl->base.funcs =3D &dcn301_link_panel_cntl_funcs; dcn301_panel_cntl->base.ctx =3D init_data->ctx; dcn301_panel_cntl->base.inst =3D init_data->inst; + dcn301_panel_cntl->base.pwrseq_inst =3D 0; } diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_panel_cntl.c b/driv= ers/gpu/drm/amd/display/dc/dcn31/dcn31_panel_cntl.c index 03248422d6ffd..281be20b1a107 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_panel_cntl.c +++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_panel_cntl.c @@ -154,8 +154,24 @@ void dcn31_panel_cntl_construct( struct dcn31_panel_cntl *dcn31_panel_cntl, const struct panel_cntl_init_data *init_data) { + uint8_t pwrseq_inst =3D 0xF; + dcn31_panel_cntl->base.funcs =3D &dcn31_link_panel_cntl_funcs; dcn31_panel_cntl->base.ctx =3D init_data->ctx; dcn31_panel_cntl->base.inst =3D init_data->inst; - dcn31_panel_cntl->base.pwrseq_inst =3D init_data->pwrseq_inst; + + switch (init_data->eng_id) { + case ENGINE_ID_DIGA: + pwrseq_inst =3D 0; + break; + case ENGINE_ID_DIGB: + pwrseq_inst =3D 1; + break; + default: + DC_LOG_WARNING("Unsupported pwrseq engine id: %d!\n", init_data->eng_id); + ASSERT(false); + break; + } + + dcn31_panel_cntl->base.pwrseq_inst =3D pwrseq_inst; } diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/panel_cntl.h b/drivers/g= pu/drm/amd/display/dc/inc/hw/panel_cntl.h index 5dcbaa2db964a..e97d964a1791c 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/hw/panel_cntl.h +++ b/drivers/gpu/drm/amd/display/dc/inc/hw/panel_cntl.h @@ -57,7 +57,7 @@ struct panel_cntl_funcs { struct panel_cntl_init_data { struct dc_context *ctx; uint32_t inst; - uint32_t pwrseq_inst; + uint32_t eng_id; }; =20 struct panel_cntl { diff --git a/drivers/gpu/drm/amd/display/dc/link/link_factory.c b/drivers/g= pu/drm/amd/display/dc/link/link_factory.c index 37d3027c32dcb..cf22b8f28ba6c 100644 --- a/drivers/gpu/drm/amd/display/dc/link/link_factory.c +++ b/drivers/gpu/drm/amd/display/dc/link/link_factory.c @@ -370,30 +370,6 @@ static enum transmitter translate_encoder_to_transmitt= er( } } =20 -static uint8_t translate_dig_inst_to_pwrseq_inst(struct dc_link *link) -{ - uint8_t pwrseq_inst =3D 0xF; - struct dc_context *dc_ctx =3D link->dc->ctx; - - DC_LOGGER_INIT(dc_ctx->logger); - - switch (link->eng_id) { - case ENGINE_ID_DIGA: - pwrseq_inst =3D 0; - break; - case ENGINE_ID_DIGB: - pwrseq_inst =3D 1; - break; - default: - DC_LOG_WARNING("Unsupported pwrseq engine id: %d!\n", link->eng_id); - ASSERT(false); - break; - } - - return pwrseq_inst; -} - - static void link_destruct(struct dc_link *link) { int i; @@ -657,7 +633,7 @@ static bool construct_phy(struct dc_link *link, link->link_id.id =3D=3D CONNECTOR_ID_LVDS)) { panel_cntl_init_data.ctx =3D dc_ctx; panel_cntl_init_data.inst =3D panel_cntl_init_data.ctx->dc_edp_id_count; - panel_cntl_init_data.pwrseq_inst =3D translate_dig_inst_to_pwrseq_inst(l= ink); + panel_cntl_init_data.eng_id =3D link->eng_id; link->panel_cntl =3D link->dc->res_pool->funcs->panel_cntl_create( &panel_cntl_init_data); --=20 2.43.0