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[34.79.100.158]) by smtp.gmail.com with ESMTPSA id bn22-20020a056000061600b00341d2604a35sm3337954wrb.98.2024.03.26.03.36.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Mar 2024 03:36:23 -0700 (PDT) From: Tudor Ambarus To: peter.griffin@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Cc: alim.akhtar@samsung.com, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, andre.draszik@linaro.org, willmcvicker@google.com, kernel-team@android.com, Tudor Ambarus Subject: [PATCH v2 1/4] arm64: dts: exynos: gs101: move serial_0 pinctrl-0/names to dtsi Date: Tue, 26 Mar 2024 10:36:17 +0000 Message-ID: <20240326103620.298298-2-tudor.ambarus@linaro.org> X-Mailer: git-send-email 2.44.0.396.g6e790dbe36-goog In-Reply-To: <20240326103620.298298-1-tudor.ambarus@linaro.org> References: <20240326103620.298298-1-tudor.ambarus@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The pinctrl nodes are coming from the shared gs101-pinctrl.dtsi, thus the pinctrl-0/names shall stay in dtsi. Move them. While moving, reverse the pinctrl-* lines, first pinctrl-0 then pinctrl-names. Reviewed-by: Andr=C3=A9 Draszik Signed-off-by: Tudor Ambarus Reviewed-by: Alim Akhtar Reviewed-by: Peter Griffin --- arch/arm64/boot/dts/exynos/google/gs101-oriole.dts | 2 -- arch/arm64/boot/dts/exynos/google/gs101.dtsi | 2 ++ 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts b/arch/arm6= 4/boot/dts/exynos/google/gs101-oriole.dts index 6ccade2c8cb4..9dc0f47ef646 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts +++ b/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts @@ -103,8 +103,6 @@ key_power: key-power-pins { }; =20 &serial_0 { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&uart0_bus>; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot= /dts/exynos/google/gs101.dtsi index 55e6bcb3689e..0b0db735dc8e 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi @@ -424,6 +424,8 @@ serial_0: serial@10a00000 { clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_0>, <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0>; 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[34.79.100.158]) by smtp.gmail.com with ESMTPSA id bn22-20020a056000061600b00341d2604a35sm3337954wrb.98.2024.03.26.03.36.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Mar 2024 03:36:25 -0700 (PDT) From: Tudor Ambarus To: peter.griffin@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Cc: alim.akhtar@samsung.com, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, andre.draszik@linaro.org, willmcvicker@google.com, kernel-team@android.com, Tudor Ambarus Subject: [PATCH v2 2/4] arm64: dts: exynos: gs101: order pinctrl-* props alphabetically Date: Tue, 26 Mar 2024 10:36:18 +0000 Message-ID: <20240326103620.298298-3-tudor.ambarus@linaro.org> X-Mailer: git-send-email 2.44.0.396.g6e790dbe36-goog In-Reply-To: <20240326103620.298298-1-tudor.ambarus@linaro.org> References: <20240326103620.298298-1-tudor.ambarus@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Reverse pinctrl-* lines, first pinctrl-0 then pinctrl-names. Move the pinctrl-* properties after clocks so that we keep alphabetic order and align with the other similar definitions. Signed-off-by: Tudor Ambarus Reviewed-by: Alim Akhtar --- arch/arm64/boot/dts/exynos/google/gs101.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot= /dts/exynos/google/gs101.dtsi index 0b0db735dc8e..cfb3ddc7f885 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi @@ -393,11 +393,11 @@ hsi2c_8: i2c@10970000 { interrupts =3D ; #address-cells =3D <1>; #size-cells =3D <0>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&hsi2c8_bus>; clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7>, <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_7>; clock-names =3D "hsi2c", "hsi2c_pclk"; + pinctrl-0 =3D <&hsi2c8_bus>; + pinctrl-names =3D "default"; status =3D "disabled"; }; }; @@ -473,11 +473,11 @@ hsi2c_12: i2c@10d50000 { interrupts =3D ; #address-cells =3D <1>; #size-cells =3D <0>; - pinctrl-0 =3D <&hsi2c12_bus>; - pinctrl-names =3D "default"; clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5>, <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_5>; 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[34.79.100.158]) by smtp.gmail.com with ESMTPSA id bn22-20020a056000061600b00341d2604a35sm3337954wrb.98.2024.03.26.03.36.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Mar 2024 03:36:26 -0700 (PDT) From: Tudor Ambarus To: peter.griffin@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Cc: alim.akhtar@samsung.com, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, andre.draszik@linaro.org, willmcvicker@google.com, kernel-team@android.com, Tudor Ambarus Subject: [PATCH v2 3/4] arm64: dts: exynos: gs101: join lines close to 80 chars Date: Tue, 26 Mar 2024 10:36:19 +0000 Message-ID: <20240326103620.298298-4-tudor.ambarus@linaro.org> X-Mailer: git-send-email 2.44.0.396.g6e790dbe36-goog In-Reply-To: <20240326103620.298298-1-tudor.ambarus@linaro.org> References: <20240326103620.298298-1-tudor.ambarus@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" These lines fit 81 characters, which is pretty close to 80. Join the lines. Signed-off-by: Tudor Ambarus Reviewed-by: Alim Akhtar Reviewed-by: Peter Griffin --- arch/arm64/boot/dts/exynos/google/gs101.dtsi | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot= /dts/exynos/google/gs101.dtsi index cfb3ddc7f885..690deca37e4f 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi @@ -374,8 +374,7 @@ pinctrl_peric0: pinctrl@10840000 { }; =20 usi8: usi@109700c0 { - compatible =3D "google,gs101-usi", - "samsung,exynos850-usi"; + compatible =3D "google,gs101-usi", "samsung,exynos850-usi"; reg =3D <0x109700c0 0x20>; ranges; #address-cells =3D <1>; @@ -403,8 +402,7 @@ hsi2c_8: i2c@10970000 { }; =20 usi_uart: usi@10a000c0 { - compatible =3D "google,gs101-usi", - "samsung,exynos850-usi"; + compatible =3D "google,gs101-usi", "samsung,exynos850-usi"; reg =3D <0x10a000c0 0x20>; ranges; #address-cells =3D <1>; @@ -419,8 +417,7 @@ usi_uart: usi@10a000c0 { serial_0: serial@10a00000 { compatible =3D "google,gs101-uart"; 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[34.79.100.158]) by smtp.gmail.com with ESMTPSA id bn22-20020a056000061600b00341d2604a35sm3337954wrb.98.2024.03.26.03.36.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Mar 2024 03:36:28 -0700 (PDT) From: Tudor Ambarus To: peter.griffin@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Cc: alim.akhtar@samsung.com, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, andre.draszik@linaro.org, willmcvicker@google.com, kernel-team@android.com, Tudor Ambarus Subject: [PATCH v2 4/4] arm64: dts: exynos: gs101: define all PERIC USI nodes Date: Tue, 26 Mar 2024 10:36:20 +0000 Message-ID: <20240326103620.298298-5-tudor.ambarus@linaro.org> X-Mailer: git-send-email 2.44.0.396.g6e790dbe36-goog In-Reply-To: <20240326103620.298298-1-tudor.ambarus@linaro.org> References: <20240326103620.298298-1-tudor.ambarus@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Universal Serial Interface (USI) supports three types of serial interface such as UART, SPI and I2C. Each protocol works independently. USI can be configured to work as one of these protocols. Define all the USI nodes from the PERIC blocks (USI0-14), in all their possible configurations. These blocks have the TX/RX FIFO depth of 64 bytes. Reviewed-by: Peter Griffin Signed-off-by: Tudor Ambarus Reviewed-by: Alim Akhtar --- arch/arm64/boot/dts/exynos/google/gs101.dtsi | 769 +++++++++++++++++++ 1 file changed, 769 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot= /dts/exynos/google/gs101.dtsi index 690deca37e4f..eddb6b326fde 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi @@ -373,6 +373,391 @@ pinctrl_peric0: pinctrl@10840000 { interrupts =3D ; }; =20 + usi1: usi@109000c0 { + compatible =3D "google,gs101-usi", "samsung,exynos850-usi"; + reg =3D <0x109000c0 0x20>; + ranges; + #address-cells =3D <1>; + #size-cells =3D <1>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_0>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_0>; + clock-names =3D "pclk", "ipclk"; + samsung,sysreg =3D <&sysreg_peric0 0x1000>; + status =3D "disabled"; + + hsi2c_1: i2c@10900000 { + compatible =3D "google,gs101-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x10900000 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_0>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_0>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c1_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + + serial_1: serial@10900000 { + compatible =3D "google,gs101-uart"; + reg =3D <0x10900000 0xc0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_0>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_0>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart1_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; + + spi_1: spi@10900000 { + compatible =3D "google,gs101-spi"; + reg =3D <0x10900000 0x30>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_0>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_0>; + clock-names =3D "spi", "spi_busclk0"; + interrupts =3D ; + pinctrl-0 =3D <&spi1_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + }; + + usi2: usi@109100c0 { + compatible =3D "google,gs101-usi", "samsung,exynos850-usi"; + reg =3D <0x109100c0 0x20>; + ranges; + #address-cells =3D <1>; + #size-cells =3D <1>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_1>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_1>; + clock-names =3D "pclk", "ipclk"; + samsung,sysreg =3D <&sysreg_peric0 0x1004>; + status =3D "disabled"; + + hsi2c_2: i2c@10910000 { + compatible =3D "google,gs101-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x10910000 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_1>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_1>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c2_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + + serial_2: serial@10910000 { + compatible =3D "google,gs101-uart"; + reg =3D <0x10910000 0xc0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_1>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_1>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart2_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; + + spi_2: spi@10910000 { + compatible =3D "google,gs101-spi"; + reg =3D <0x10910000 0x30>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_1>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_1>; + clock-names =3D "spi", "spi_busclk0"; + interrupts =3D ; + pinctrl-0 =3D <&spi2_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + }; + + usi3: usi@109200c0 { + compatible =3D "google,gs101-usi", "samsung,exynos850-usi"; + reg =3D <0x109200c0 0x20>; + ranges; + #address-cells =3D <1>; + #size-cells =3D <1>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_2>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_2>; + clock-names =3D "pclk", "ipclk"; + samsung,sysreg =3D <&sysreg_peric0 0x1008>; + status =3D "disabled"; + + hsi2c_3: i2c@10920000 { + compatible =3D "google,gs101-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x10920000 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_2>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_2>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c3_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + + serial_3: serial@10920000 { + compatible =3D "google,gs101-uart"; + reg =3D <0x10920000 0xc0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_2>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_2>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart3_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; + + spi_3: spi@10920000 { + compatible =3D "google,gs101-spi"; + reg =3D <0x10920000 0x30>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_2>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_2>; + clock-names =3D "spi", "spi_busclk0"; + interrupts =3D ; + pinctrl-0 =3D <&spi3_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + }; + + usi4: usi@109300c0 { + compatible =3D "google,gs101-usi", "samsung,exynos850-usi"; + reg =3D <0x109300c0 0x20>; + ranges; + #address-cells =3D <1>; + #size-cells =3D <1>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_3>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_3>; + clock-names =3D "pclk", "ipclk"; + samsung,sysreg =3D <&sysreg_peric0 0x100c>; + status =3D "disabled"; + + hsi2c_4: i2c@10930000 { + compatible =3D "google,gs101-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x10930000 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_3>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_3>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c4_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + + serial_4: serial@10930000 { + compatible =3D "google,gs101-uart"; + reg =3D <0x10930000 0xc0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_3>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_3>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart4_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; + + spi_4: spi@10930000 { + compatible =3D "google,gs101-spi"; + reg =3D <0x10930000 0x30>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_3>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_3>; + clock-names =3D "spi", "spi_busclk0"; + interrupts =3D ; + pinctrl-0 =3D <&spi4_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + }; + + usi5: usi@109400c0 { + compatible =3D "google,gs101-usi", "samsung,exynos850-usi"; + reg =3D <0x109400c0 0x20>; + ranges; + #address-cells =3D <1>; + #size-cells =3D <1>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_4>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_4>; + clock-names =3D "pclk", "ipclk"; + samsung,sysreg =3D <&sysreg_peric0 0x1010>; + status =3D "disabled"; + + hsi2c_5: i2c@10940000 { + compatible =3D "google,gs101-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x10940000 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_4>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_4>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c5_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + + serial_5: serial@10940000 { + compatible =3D "google,gs101-uart"; + reg =3D <0x10940000 0xc0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_4>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_4>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart5_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; + + spi_5: spi@10940000 { + compatible =3D "google,gs101-spi"; + reg =3D <0x10940000 0x30>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_4>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_4>; + clock-names =3D "spi", "spi_busclk0"; + interrupts =3D ; + pinctrl-0 =3D <&spi5_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + }; + + usi6: usi@109500c0 { + compatible =3D "google,gs101-usi", "samsung,exynos850-usi"; + reg =3D <0x109500c0 0x20>; + ranges; + #address-cells =3D <1>; + #size-cells =3D <1>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_5>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_5>; + clock-names =3D "pclk", "ipclk"; + samsung,sysreg =3D <&sysreg_peric0 0x1014>; + status =3D "disabled"; + + hsi2c_6: i2c@10950000 { + compatible =3D "google,gs101-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x10950000 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_5>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_5>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c6_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + + serial_6: serial@10950000 { + compatible =3D "google,gs101-uart"; + reg =3D <0x10950000 0xc0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_5>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_5>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart6_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; + + spi_6: spi@10950000 { + compatible =3D "google,gs101-spi"; + reg =3D <0x10950000 0x30>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_5>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_5>; + clock-names =3D "spi", "spi_busclk0"; + interrupts =3D ; + pinctrl-0 =3D <&spi6_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + }; + + usi7: usi@109600c0 { + compatible =3D "google,gs101-usi", "samsung,exynos850-usi"; + reg =3D <0x109600c0 0x20>; + ranges; + #address-cells =3D <1>; + #size-cells =3D <1>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_6>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_6>; + clock-names =3D "pclk", "ipclk"; + samsung,sysreg =3D <&sysreg_peric0 0x1018>; + status =3D "disabled"; + + hsi2c_7: i2c@10960000 { + compatible =3D "google,gs101-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x10960000 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_6>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_6>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c7_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + + serial_7: serial@10960000 { + compatible =3D "google,gs101-uart"; + reg =3D <0x10960000 0xc0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_6>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_6>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart7_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; + + spi_7: spi@10960000 { + compatible =3D "google,gs101-spi"; + reg =3D <0x10960000 0x30>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_6>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_6>; + clock-names =3D "spi", "spi_busclk0"; + interrupts =3D ; + pinctrl-0 =3D <&spi7_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + }; + usi8: usi@109700c0 { compatible =3D "google,gs101-usi", "samsung,exynos850-usi"; reg =3D <0x109700c0 0x20>; @@ -399,6 +784,33 @@ hsi2c_8: i2c@10970000 { pinctrl-names =3D "default"; status =3D "disabled"; }; + + serial_8: serial@10970000 { + compatible =3D "google,gs101-uart"; + reg =3D <0x10970000 0xc0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_7>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart8_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; + + spi_8: spi@10970000 { + compatible =3D "google,gs101-spi"; + reg =3D <0x10970000 0x30>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_7>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7>; + clock-names =3D "spi", "spi_busclk0"; + interrupts =3D ; + pinctrl-0 =3D <&spi8_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; }; =20 usi_uart: usi@10a000c0 { @@ -428,6 +840,61 @@ serial_0: serial@10a00000 { }; }; =20 + usi14: usi@10a200c0 { + compatible =3D "google,gs101-usi", "samsung,exynos850-usi"; + reg =3D <0x10a200c0 0x20>; + ranges; + #address-cells =3D <1>; + #size-cells =3D <1>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_2>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_2>; + clock-names =3D "pclk", "ipclk"; + samsung,sysreg =3D <&sysreg_peric0 0x1028>; + status =3D "disabled"; + + hsi2c_14: i2c@10a20000 { + compatible =3D "google,gs101-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x10a20000 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_2>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_2>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c14_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + + serial_14: serial@10a20000 { + compatible =3D "google,gs101-uart"; + reg =3D <0x10a20000 0xc0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_2>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_2>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart14_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; + + spi_14: spi@10a20000 { + compatible =3D "google,gs101-spi"; + reg =3D <0x10a20000 0x30>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_2>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_2>; + clock-names =3D "spi", "spi_busclk0"; + interrupts =3D ; + pinctrl-0 =3D <&spi14_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + }; + cmu_peric1: clock-controller@10c00000 { compatible =3D "google,gs101-cmu-peric1"; reg =3D <0x10c00000 0x4000>; @@ -450,6 +917,226 @@ pinctrl_peric1: pinctrl@10c40000 { interrupts =3D ; }; =20 + usi0: usi@10d100c0 { + compatible =3D "google,gs101-usi", "samsung,exynos850-usi"; + reg =3D <0x10d100c0 0x20>; + ranges; + #address-cells =3D <1>; + #size-cells =3D <1>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_1>, + <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_1>; + clock-names =3D "pclk", "ipclk"; + samsung,sysreg =3D <&sysreg_peric1 0x1000>; + status =3D "disabled"; + + hsi2c_0: i2c@10d10000 { + compatible =3D "google,gs101-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x10d10000 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_1>, + <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_1>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c0_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + + serial_usi0: serial@10d10000 { + compatible =3D "google,gs101-uart"; + reg =3D <0x10d10000 0xc0>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_1>, + <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_1>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart0_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; + + spi_0: spi@10d10000 { + compatible =3D "google,gs101-spi"; + reg =3D <0x10d10000 0x30>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_1>, + <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_1>; + clock-names =3D "spi", "spi_busclk0"; + interrupts =3D ; + pinctrl-0 =3D <&spi0_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + }; + + usi9: usi@10d200c0 { + compatible =3D "google,gs101-usi", "samsung,exynos850-usi"; + reg =3D <0x10d200c0 0x20>; + ranges; + #address-cells =3D <1>; + #size-cells =3D <1>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_2>, + <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_2>; + clock-names =3D "pclk", "ipclk"; + samsung,sysreg =3D <&sysreg_peric1 0x1004>; + status =3D "disabled"; + + hsi2c_9: i2c@10d20000 { + compatible =3D "google,gs101-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x10d20000 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_2>, + <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_2>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c9_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + + serial_9: serial@10d20000 { + compatible =3D "google,gs101-uart"; + reg =3D <0x10d20000 0xc0>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_2>, + <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_2>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart9_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; + + spi_9: spi@10d20000 { + compatible =3D "google,gs101-spi"; + reg =3D <0x10d20000 0x30>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_2>, + <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_2>; + clock-names =3D "spi", "spi_busclk0"; + interrupts =3D ; + pinctrl-0 =3D <&spi9_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + }; + + usi10: usi@10d300c0 { + compatible =3D "google,gs101-usi", "samsung,exynos850-usi"; + reg =3D <0x10d300c0 0x20>; + ranges; + #address-cells =3D <1>; + #size-cells =3D <1>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_3>, + <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_3>; + clock-names =3D "pclk", "ipclk"; + samsung,sysreg =3D <&sysreg_peric1 0x1008>; + status =3D "disabled"; + + hsi2c_10: i2c@10d30000 { + compatible =3D "google,gs101-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x10d30000 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_3>, + <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_3>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c10_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + + serial_10: serial@10d30000 { + compatible =3D "google,gs101-uart"; + reg =3D <0x10d30000 0xc0>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_3>, + <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_3>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart10_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; + + spi_10: spi@10d30000 { + compatible =3D "google,gs101-spi"; + reg =3D <0x10d30000 0x30>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_3>, + <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_3>; + clock-names =3D "spi", "spi_busclk0"; + interrupts =3D ; + pinctrl-0 =3D <&spi10_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + }; + + usi11: usi@10d400c0 { + compatible =3D "google,gs101-usi", "samsung,exynos850-usi"; + reg =3D <0x10d400c0 0x20>; + ranges; + #address-cells =3D <1>; + #size-cells =3D <1>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_4>, + <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_4>; + clock-names =3D "pclk", "ipclk"; + samsung,sysreg =3D <&sysreg_peric1 0x100c>; + status =3D "disabled"; + + hsi2c_11: i2c@10d40000 { + compatible =3D "google,gs101-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x10d40000 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_4>, + <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_4>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c11_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + + serial_11: serial@10d40000 { + compatible =3D "google,gs101-uart"; + reg =3D <0x10d40000 0xc0>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_4>, + <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_4>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart11_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; + + spi_11: spi@10d40000 { + compatible =3D "google,gs101-spi"; + reg =3D <0x10d40000 0x30>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_4>, + <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_4>; + clock-names =3D "spi", "spi_busclk0"; + interrupts =3D ; + pinctrl-0 =3D <&spi11_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + }; + usi12: usi@10d500c0 { compatible =3D "google,gs101-usi", "samsung,exynos850-usi"; reg =3D <0x10d500c0 0x20>; @@ -476,6 +1163,88 @@ hsi2c_12: i2c@10d50000 { pinctrl-names =3D "default"; status =3D "disabled"; }; + + serial_12: serial@10d50000 { + compatible =3D "google,gs101-uart"; + reg =3D <0x10d50000 0xc0>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_5>, + <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart12_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; + + spi_12: spi@10d50000 { + compatible =3D "google,gs101-spi"; + reg =3D <0x10d50000 0x30>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_5>, + <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5>; + clock-names =3D "spi", "spi_busclk0"; + interrupts =3D ; + pinctrl-0 =3D <&spi12_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + }; + + usi13: usi@10d600c0 { + compatible =3D "google,gs101-usi", "samsung,exynos850-usi"; + reg =3D <0x10d600c0 0x20>; + ranges; + #address-cells =3D <1>; + #size-cells =3D <1>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_6>, + <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_6>; + clock-names =3D "pclk", "ipclk"; + samsung,sysreg =3D <&sysreg_peric1 0x1014>; + status =3D "disabled"; + + hsi2c_13: i2c@10d60000 { + compatible =3D "google,gs101-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x10d60000 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_6>, + <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_6>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c13_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + + serial_13: serial@10d60000 { + compatible =3D "google,gs101-uart"; + reg =3D <0x10d60000 0xc0>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_6>, + <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_6>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart13_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; + + spi_13: spi@10d60000 { + compatible =3D "google,gs101-spi"; + reg =3D <0x10d60000 0x30>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_6>, + <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_6>; + clock-names =3D "spi", "spi_busclk0"; + interrupts =3D ; + pinctrl-0 =3D <&spi13_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; }; =20 pinctrl_hsi1: pinctrl@11840000 { --=20 2.44.0.396.g6e790dbe36-goog