From nobody Mon Feb 9 15:29:54 2026 Received: from mail.ispras.ru (mail.ispras.ru [83.149.199.84]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CA9244501F for ; Mon, 25 Mar 2024 20:13:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=83.149.199.84 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711397584; cv=none; b=EzjMcs8HgZUydaO80uDBpokP8ATCna3yw+I9X8pwrOrIWhwJQSOJmBi/wB27kpnvwf5QsKVNq9/0ZGuvCekTg0J1K74d/tfbP/Y2dB4EWZPtv3HlIO7WD+p7WZ/aW4tprqC1maVw4U6J5JSpwRUNRu875Tnp0uQPVZdG0VF20fk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711397584; c=relaxed/simple; bh=v0HPfErSBVJprZR5gRdA6DB5OkU3LBe8NZkysuBx5l0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=mtaQHhJE+y7LDrX06Oub+USFnl+h1yvCCE2KiJNCcmhwqrj2PXic8lDWFRDqBEnur+rvBA1hAYvftw8iRxDBZfA+pfqUF7PXDDdZXHmsfaG47A2+7WcN9FEJRoc7hCEyjvYEGzhozDVNh4nq+jv8JYBGaMMomKXHgM/lQ4jqDLs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ispras.ru; spf=pass smtp.mailfrom=ispras.ru; dkim=pass (1024-bit key) header.d=ispras.ru header.i=@ispras.ru header.b=MwMV+aMl; arc=none smtp.client-ip=83.149.199.84 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ispras.ru Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ispras.ru Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ispras.ru header.i=@ispras.ru header.b="MwMV+aMl" Received: from tundra.lovozera (unknown [31.173.84.243]) by mail.ispras.ru (Postfix) with ESMTPSA id DCBBB40B2784; Mon, 25 Mar 2024 20:12:53 +0000 (UTC) DKIM-Filter: OpenDKIM Filter v2.11.0 mail.ispras.ru DCBBB40B2784 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ispras.ru; s=default; t=1711397574; bh=crTIb98cNl+zIlgW+5vvYUir0L3WIPrXhLOuIX0mPI4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=MwMV+aMl4l33qBNIFmoL0MvQd9pKtZOP4n65eTqFxnWyS4Cppu5cvgqik0FjNumnv S93QePlMOz8pRdRMtUEIpqtIMabtJ9bdHYX5YpbCAO5cU2LOtWYqtMmHUPFjH5t3bV /souhdKdFlFsr9DNvI1AOKSIkn/fBki9RB6ZQy7g= From: Mikhail Kobuk To: Miquel Raynal Cc: Mikhail Kobuk , Vinod Koul , Kishon Vijay Abraham I , =?UTF-8?q?Pali=20Roh=C3=A1r?= , =?UTF-8?q?Marek=20Beh=C3=BAn?= , linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, lvc-project@linuxtesting.org, Alexey Khoroshilov Subject: [PATCH v2 2/2] phy: marvell: a3700-comphy: Fix hardcoded array size Date: Mon, 25 Mar 2024 23:12:50 +0300 Message-ID: <20240325201254.54445-3-m.kobuk@ispras.ru> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240325201254.54445-1-m.kobuk@ispras.ru> References: <20240325201254.54445-1-m.kobuk@ispras.ru> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Replace hardcoded 'gbe_phy_init' array size with defined value. Fixes: 934337080c6c ("phy: marvell: phy-mvebu-a3700-comphy: Add native kern= el implementation") Signed-off-by: Mikhail Kobuk Reviewed-by: Miquel Raynal --- drivers/phy/marvell/phy-mvebu-a3700-comphy.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/phy/marvell/phy-mvebu-a3700-comphy.c b/drivers/phy/mar= vell/phy-mvebu-a3700-comphy.c index 68710ad1ad70..5d6dccfca1fb 100644 --- a/drivers/phy/marvell/phy-mvebu-a3700-comphy.c +++ b/drivers/phy/marvell/phy-mvebu-a3700-comphy.c @@ -43,6 +43,7 @@ #define COMPHY_LANE_REG_DIRECT(reg) (((reg) & 0x7FF) << 1) =20 /* COMPHY registers */ +#define COMPHY_GBE_PHY_MAX_REGS 512 #define COMPHY_POWER_PLL_CTRL 0x01 #define PU_IVREF_BIT BIT(15) #define PU_PLL_BIT BIT(14) @@ -296,7 +297,7 @@ static struct gbe_phy_init_data_fix gbe_phy_init_fix[] = =3D { }; =20 /* 40M1G25 mode init data */ -static u16 gbe_phy_init[512] =3D { +static u16 gbe_phy_init[COMPHY_GBE_PHY_MAX_REGS] =3D { /* 0 1 2 3 4 5 6 7 */ /*-----------------------------------------------------------*/ /* 8 9 A B C D E F */ @@ -603,7 +604,7 @@ static void comphy_gbe_phy_init(struct mvebu_a3700_comp= hy_lane *lane, u16 val; =20 fix_idx =3D 0; - for (addr =3D 0; addr < 512; addr++) { + for (addr =3D 0; addr < COMPHY_GBE_PHY_MAX_REGS; addr++) { /* * All PHY register values are defined in full for 3.125Gbps * SERDES speed. The values required for 1.25 Gbps are almost --=20 2.44.0