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[34.125.73.210]) by smtp.gmail.com with ESMTPSA id e12-20020aa7824c000000b006e5f754646csm4705250pfn.139.2024.03.25.16.42.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Mar 2024 16:42:28 -0700 (PDT) From: Pavan Holla Date: Mon, 25 Mar 2024 23:42:27 +0000 Subject: [PATCH v2 3/3] platform/chrome: cros_ec_ucsi: Implement UCSI PDC driver Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240325-public-ucsi-h-v2-3-a6d716968bb1@chromium.org> References: <20240325-public-ucsi-h-v2-0-a6d716968bb1@chromium.org> In-Reply-To: <20240325-public-ucsi-h-v2-0-a6d716968bb1@chromium.org> To: Greg Kroah-Hartman , Heikki Krogerus , Benson Leung , Tzung-Bi Shih , Guenter Roeck Cc: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, Abhishek Pandit-Subedi , chrome-platform@lists.linux.dev, Pavan Holla X-Mailer: b4 0.12.4 Implementation of transport driver for UCSI. This driver will be used if the ChromeOS EC implements a PPM. Signed-off-by: Pavan Holla --- drivers/platform/chrome/Kconfig | 14 ++ drivers/platform/chrome/Makefile | 1 + drivers/platform/chrome/cros_ec_ucsi.c | 247 +++++++++++++++++++++= ++++ include/linux/platform_data/cros_ec_commands.h | 19 ++ 4 files changed, 281 insertions(+) diff --git a/drivers/platform/chrome/Kconfig b/drivers/platform/chrome/Kcon= fig index 7a83346bfa53..67ab79a6815b 100644 --- a/drivers/platform/chrome/Kconfig +++ b/drivers/platform/chrome/Kconfig @@ -238,6 +238,20 @@ config CROS_EC_TYPEC To compile this driver as a module, choose M here: the module will be called cros-ec-typec. =20 +config CROS_EC_UCSI + tristate "UCSI Driver for ChromeOS EC" + depends on MFD_CROS_EC_DEV + depends on CROS_USBPD_NOTIFY + depends on TYPEC_UCSI + depends on !EXTCON_TCSS_CROS_EC + default MFD_CROS_EC_DEV + help + This driver enables UCSI support for a ChromeOS EC. The EC is + expected to implement a PPM. + + To compile the driver as a module, choose M here: the module + will be called cros_ec_ucsi. + config CROS_HPS_I2C tristate "ChromeOS HPS device" depends on HID && I2C && PM diff --git a/drivers/platform/chrome/Makefile b/drivers/platform/chrome/Mak= efile index 2dcc6ccc2302..85964e165a70 100644 --- a/drivers/platform/chrome/Makefile +++ b/drivers/platform/chrome/Makefile @@ -19,6 +19,7 @@ obj-$(CONFIG_CROS_EC_UART) +=3D cros_ec_uart.o cros_ec_lpcs-objs :=3D cros_ec_lpc.o cros_ec_lpc_mec.o cros-ec-typec-objs :=3D cros_ec_typec.o cros_typec_vdm.o obj-$(CONFIG_CROS_EC_TYPEC) +=3D cros-ec-typec.o +obj-$(CONFIG_CROS_EC_UCSI) +=3D cros_ec_ucsi.o obj-$(CONFIG_CROS_EC_LPC) +=3D cros_ec_lpcs.o obj-$(CONFIG_CROS_EC_PROTO) +=3D cros_ec_proto.o cros_ec_trace.o obj-$(CONFIG_CROS_KBD_LED_BACKLIGHT) +=3D cros_kbd_led_backlight.o diff --git a/drivers/platform/chrome/cros_ec_ucsi.c b/drivers/platform/chro= me/cros_ec_ucsi.c new file mode 100644 index 000000000000..9fee300a3d93 --- /dev/null +++ b/drivers/platform/chrome/cros_ec_ucsi.c @@ -0,0 +1,247 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * UCSI driver for ChromeOS EC + * + * Copyright 2024 Google LLC. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRV_NAME "cros-ec-ucsi" + +#define MAX_EC_DATA_SIZE 256 +#define WRITE_TMO_MS 500 + +#define COMMAND_PENDING 1 +#define ACK_PENDING 2 + +#define UCSI_COMMAND(_cmd_) ((_cmd_) & 0xff) +#define UCSI_ACK_CC_CI 0x04 + +struct cros_ucsi_data { + struct device *dev; + struct ucsi *ucsi; + + struct cros_ec_device *ec; + struct notifier_block nb; + struct work_struct work; + + struct completion complete; + unsigned long flags; +}; + +static int cros_ucsi_read(struct ucsi *ucsi, unsigned int offset, void *va= l, + size_t val_len) +{ + struct cros_ucsi_data *udata =3D ucsi_get_drvdata(ucsi); + struct ec_params_ucsi_ppm_get req =3D { + .offset =3D offset, + .size =3D val_len, + }; + int ret; + + if (val_len > MAX_EC_DATA_SIZE) { + dev_err(udata->dev, "Can't read %zu bytes. Too big.", val_len); + return -EINVAL; + } + + ret =3D cros_ec_cmd(udata->ec, 0, EC_CMD_UCSI_PPM_GET, + &req, sizeof(req), val, val_len); + if (ret < 0) { + dev_warn(udata->dev, "Failed to send EC message UCSI_PPM_GET: error=3D%d= ", ret); + return ret; + } + return 0; +} + +static int cros_ucsi_async_write(struct ucsi *ucsi, unsigned int offset, + const void *val, size_t val_len) +{ + struct cros_ucsi_data *udata =3D ucsi_get_drvdata(ucsi); + uint8_t ec_buffer[MAX_EC_DATA_SIZE + sizeof(struct ec_params_ucsi_ppm_set= )]; + struct ec_params_ucsi_ppm_set *req =3D (struct ec_params_ucsi_ppm_set *)e= c_buffer; + int ret =3D 0; + + if (val_len > MAX_EC_DATA_SIZE) { + dev_err(udata->dev, "Can't write %zu bytes. Too big.", val_len); + return -EINVAL; + } + + memset(req, 0, sizeof(ec_buffer)); + req->offset =3D offset; + memcpy(req->data, val, val_len); + ret =3D cros_ec_cmd(udata->ec, 0, EC_CMD_UCSI_PPM_SET, + req, sizeof(struct ec_params_ucsi_ppm_set) + val_len, NULL, 0); + + if (ret < 0) { + dev_warn(udata->dev, "Failed to send EC message UCSI_PPM_SET: error=3D%d= ", ret); + return ret; + } + return 0; +} + +static int cros_ucsi_sync_write(struct ucsi *ucsi, unsigned int offset, + const void *val, size_t val_len) +{ + struct cros_ucsi_data *udata =3D ucsi_get_drvdata(ucsi); + bool ack =3D UCSI_COMMAND(*(u64 *)val) =3D=3D UCSI_ACK_CC_CI; + int ret; + + if (ack) + set_bit(ACK_PENDING, &udata->flags); + else + set_bit(COMMAND_PENDING, &udata->flags); + + ret =3D cros_ucsi_async_write(ucsi, offset, val, val_len); + if (ret) + goto out; + + if (!wait_for_completion_timeout(&udata->complete, WRITE_TMO_MS)) + ret =3D -ETIMEDOUT; + +out: + if (ack) + clear_bit(ACK_PENDING, &udata->flags); + else + clear_bit(COMMAND_PENDING, &udata->flags); + return ret; +} + +struct ucsi_operations cros_ucsi_ops =3D { + .read =3D cros_ucsi_read, + .async_write =3D cros_ucsi_async_write, + .sync_write =3D cros_ucsi_sync_write, +}; + +static void cros_ucsi_work(struct work_struct *work) +{ + struct cros_ucsi_data *udata =3D container_of(work, struct cros_ucsi_data= , work); + u32 cci; + int ret; + + ret =3D cros_ucsi_read(udata->ucsi, UCSI_CCI, &cci, sizeof(cci)); + if (ret) + return; + + if (UCSI_CCI_CONNECTOR(cci)) + ucsi_connector_change(udata->ucsi, UCSI_CCI_CONNECTOR(cci)); + + if (cci & UCSI_CCI_ACK_COMPLETE && test_bit(ACK_PENDING, &udata->flags)) + complete(&udata->complete); + if (cci & UCSI_CCI_COMMAND_COMPLETE && + test_bit(COMMAND_PENDING, &udata->flags)) + complete(&udata->complete); +} + +static int cros_ucsi_event(struct notifier_block *nb, + unsigned long host_event, void *_notify) +{ + struct cros_ucsi_data *udata =3D container_of(nb, struct cros_ucsi_data, = nb); + + if (!(host_event & PD_EVENT_PPM)) + return NOTIFY_OK; + + dev_dbg(udata->dev, "UCSI notification received"); + flush_work(&udata->work); + schedule_work(&udata->work); + + return NOTIFY_OK; +} + +static int cros_ucsi_probe(struct platform_device *pdev) +{ + struct device *dev =3D &pdev->dev; + struct cros_ucsi_data *udata; + int ret; + + udata =3D devm_kzalloc(dev, sizeof(*udata), GFP_KERNEL); + if (!udata) + return -ENOMEM; + + udata->dev =3D dev; + + udata->ec =3D ((struct cros_ec_dev *) dev_get_drvdata(pdev->dev.parent))-= >ec_dev; + if (!udata->ec) { + dev_err(dev, "couldn't find parent EC device\n"); + return -ENODEV; + } + + platform_set_drvdata(pdev, udata); + + INIT_WORK(&udata->work, cros_ucsi_work); + init_completion(&udata->complete); + + udata->ucsi =3D ucsi_create(udata->dev, &cros_ucsi_ops); + if (IS_ERR(udata->ucsi)) { + dev_err(dev, "failed to allocate UCSI instance\n"); + return PTR_ERR(udata->ucsi); + } + + ucsi_set_drvdata(udata->ucsi, udata); + + ret =3D ucsi_register(udata->ucsi); + if (ret) { + ucsi_destroy(udata->ucsi); + udata->ucsi =3D NULL; + return ret; + } + + udata->nb.notifier_call =3D cros_ucsi_event; + ret =3D cros_usbpd_register_notify(&udata->nb); + return ret; +} + +static int cros_ucsi_remove(struct platform_device *dev) +{ + struct cros_ucsi_data *udata =3D platform_get_drvdata(dev); + + if (udata->ucsi) { + ucsi_unregister(udata->ucsi); + ucsi_destroy(udata->ucsi); + udata->ucsi =3D NULL; + } + return 0; +} + +static int cros_ucsi_suspend(struct device *dev) +{ + struct cros_ucsi_data *udata =3D dev_get_drvdata(dev); + + cancel_work_sync(&udata->work); + + return 0; +} + +static int cros_ucsi_resume(struct device *dev) +{ + struct cros_ucsi_data *udata =3D dev_get_drvdata(dev); + + return ucsi_resume(udata->ucsi); +} + +static SIMPLE_DEV_PM_OPS(cros_ucsi_pm_ops, cros_ucsi_suspend, + cros_ucsi_resume); + +static struct platform_driver cros_ucsi_driver =3D { + .driver =3D { + .name =3D DRV_NAME, + .pm =3D &cros_ucsi_pm_ops, + }, + .probe =3D cros_ucsi_probe, + .remove =3D cros_ucsi_remove, +}; + +module_platform_driver(cros_ucsi_driver); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("UCSI driver for ChromeOS EC."); +MODULE_ALIAS("platform:" DRV_NAME); diff --git a/include/linux/platform_data/cros_ec_commands.h b/include/linux= /platform_data/cros_ec_commands.h index ecc47d5fe239..39f6f54bbe4c 100644 --- a/include/linux/platform_data/cros_ec_commands.h +++ b/include/linux/platform_data/cros_ec_commands.h @@ -4933,6 +4933,7 @@ struct ec_response_pd_status { #define PD_EVENT_POWER_CHANGE BIT(1) #define PD_EVENT_IDENTITY_RECEIVED BIT(2) #define PD_EVENT_DATA_SWAP BIT(3) +#define PD_EVENT_PPM BIT(5) struct ec_response_host_event_status { uint32_t status; /* PD MCU host event status */ } __ec_align4; @@ -5994,6 +5995,24 @@ struct ec_response_typec_vdm_response { =20 #undef VDO_MAX_SIZE =20 +/* + * Read/write interface for UCSI OPM <-> PPM communication. + */ +#define EC_CMD_UCSI_PPM_SET 0x0140 + +/* The data size is stored in the host command protocol header. */ +struct ec_params_ucsi_ppm_set { + uint16_t offset; + uint8_t data[]; +} __ec_align2; + +#define EC_CMD_UCSI_PPM_GET 0x0141 + +struct ec_params_ucsi_ppm_get { + uint16_t offset; + uint8_t size; +} __ec_align2; + /*************************************************************************= ****/ /* The command range 0x200-0x2FF is reserved for Rotor. */ =20 --=20 2.44.0.396.g6e790dbe36-goog