From nobody Fri Dec 19 20:13:29 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4A6B3182F01; Sun, 24 Mar 2024 23:49:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711324187; cv=none; b=nSmxPYmOAKoMkJYZk7cKDoqrWcNgif2J5qa+Li96m+yCL0am1rNARrysMKqyFEc7vSLr7/QcJgm24kq70eBodece3iTrH3G2mkeakrgdy0FnqloD0nVlgBWaZuNwNrtKd1ZwaVMu56QgdfwGdPoIlBydEU1vVqwM8Vh9gy6lwzA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711324187; c=relaxed/simple; bh=fRXvuFU0WlFQfjxCQnnb4huqHAblWzbZf3aGXPO93Rc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=jYl+556qipR2gNYllQvhysk4qHTa8Jai+EMqAw3O1DkoYgu7RPamXTLp99tmAw9KXQt7z5cZvA+7oZCf822DiKM0X2ZKFFD1GLqzxuGUwzALoiANZUyedBMxTdUs5OX7j5YdcD7HatxAGId2gEDRJt0YppFTGD/jvwmQGHjPUQE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=l5k+O3yB; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="l5k+O3yB" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 79193C433B1; Sun, 24 Mar 2024 23:49:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1711324187; bh=fRXvuFU0WlFQfjxCQnnb4huqHAblWzbZf3aGXPO93Rc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=l5k+O3yBBIdCV71/znyrqpy3vYyZANyazZ+3T2xJekNhBuqTlJjRsORM1aftTAJbU 1a64P5W9fErWNzsbOhNAI7gNoWUsEe/MZlgkQSf6XIpCK8eIVw8mAlkE7WHsA7V6sR N0/Ipdh0xU8WzESvskm4tlkv0u/S/Wl1qo4uHPAUALjjFuqGH+gFohU7GjjVoeEsV1 bEBUuXS8/ZepcDYAOBEk6YC1Jo0Da8n8EmckIJx6HWnso12LIubYhb1UDincXqwMB3 Nn0aTWsiDhrq+cSZNStbhdN1BPg6L3awR1576wYGqNu3ifVmjzzMnvvQSZxo5Qzeus wFU9xSnXAoGzw== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Subbaraya Sundeep , "David S . Miller" , Sasha Levin Subject: [PATCH 5.4 176/183] octeontx2-af: Use separate handlers for interrupts Date: Sun, 24 Mar 2024 19:46:29 -0400 Message-ID: <20240324234638.1355609-177-sashal@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240324234638.1355609-1-sashal@kernel.org> References: <20240324234638.1355609-1-sashal@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Subbaraya Sundeep [ Upstream commit 50e60de381c342008c0956fd762e1c26408f372c ] For PF to AF interrupt vector and VF to AF vector same interrupt handler is registered which is causing race condition. When two interrupts are raised to two CPUs at same time then two cores serve same event corrupting the data. Fixes: 7304ac4567bc ("octeontx2-af: Add mailbox IRQ and msg handlers") Signed-off-by: Subbaraya Sundeep Signed-off-by: David S. Miller Signed-off-by: Sasha Levin --- drivers/net/ethernet/marvell/octeontx2/af/rvu.c | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.c b/drivers/net/= ethernet/marvell/octeontx2/af/rvu.c index 02b4620f7368a..9c6307186505a 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.c @@ -1708,10 +1708,9 @@ static void rvu_queue_work(struct mbox_wq_info *mw, = int first, } } =20 -static irqreturn_t rvu_mbox_intr_handler(int irq, void *rvu_irq) +static irqreturn_t rvu_mbox_pf_intr_handler(int irq, void *rvu_irq) { struct rvu *rvu =3D (struct rvu *)rvu_irq; - int vfs =3D rvu->vfs; u64 intr; =20 intr =3D rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_PFAF_MBOX_INT); @@ -1723,6 +1722,18 @@ static irqreturn_t rvu_mbox_intr_handler(int irq, vo= id *rvu_irq) =20 rvu_queue_work(&rvu->afpf_wq_info, 0, rvu->hw->total_pfs, intr); =20 + return IRQ_HANDLED; +} + +static irqreturn_t rvu_mbox_intr_handler(int irq, void *rvu_irq) +{ + struct rvu *rvu =3D (struct rvu *)rvu_irq; + int vfs =3D rvu->vfs; + u64 intr; + + /* Sync with mbox memory region */ + rmb(); + /* Handle VF interrupts */ if (vfs > 64) { intr =3D rvupf_read64(rvu, RVU_PF_VFPF_MBOX_INTX(1)); @@ -2035,7 +2046,7 @@ static int rvu_register_interrupts(struct rvu *rvu) /* Register mailbox interrupt handler */ sprintf(&rvu->irq_name[RVU_AF_INT_VEC_MBOX * NAME_SIZE], "RVUAF Mbox"); ret =3D request_irq(pci_irq_vector(rvu->pdev, RVU_AF_INT_VEC_MBOX), - rvu_mbox_intr_handler, 0, + rvu_mbox_pf_intr_handler, 0, &rvu->irq_name[RVU_AF_INT_VEC_MBOX * NAME_SIZE], rvu); if (ret) { dev_err(rvu->dev, --=20 2.43.0