From nobody Fri Dec 19 19:15:47 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 673EF17C1AB; Sun, 24 Mar 2024 23:42:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711323764; cv=none; b=naWNleIEOmp+4gke59IKHThJ45NXJH/wYiyXax8gQcIeFJ0iONy1kKkxwLlx5mCBOfqPh59DmXS6ZjPe0JAs2stgerxBdCpiPw95XP8nLnVKprHh2u9uGkdIgQHP+hHHZR9EXaPf3pJNxJElSqTwG54KnzusypGU9XouCI12pD8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711323764; c=relaxed/simple; bh=pCc5yRqiW7zrM8WJbTTAP0OTtZg+beqdp63g2hcZTaQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=a8RWV6hMl/KQmOmkz/ZhnKu0PIJ7g6l3hzAbTZRZMoEDmPvfFvwuvhxfv+swC3FRJkOUqj0vL6WXk7kEQYe30T9l/0eKZqSh36IdS9NmeXhzsmj12vcxY1Sd3cn7HnINuSPgJxPWb2a/kt3ZvZd7COvzHr680X/iwHJN9AUY6NE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=T7QOd7Ye; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="T7QOd7Ye" Received: by smtp.kernel.org (Postfix) with ESMTPSA id A23C3C433F1; Sun, 24 Mar 2024 23:42:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1711323763; bh=pCc5yRqiW7zrM8WJbTTAP0OTtZg+beqdp63g2hcZTaQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=T7QOd7Yen92fPiIdUlknPOd3QHtUW5L1+UKJ5/+gtJM/9nN0mNG2wxBnKy7prLs5d DHy8oIHGIPVmBh2csMNjQGPbOjBQyjAInToMBKRQiKwAw6yGe2sFYrtBzPgOlwZD2p UOA8iy9h4gPH7741l58ZscxsdqmqSWqOx9pXNDrP+f9I2zl3PCdj02c2bYYwhT00FU woiMbYBJLdfTID/oEmSI7jG+s1UjJm/z08FmuMXWM8VmLIGf0cg4iHXMNV0M/v65IS 54PnshexYF31xm8vpn0rWYbAhHgCjVfnx6KF4QYC5LIp7zCTuU/HoPr7Mdg89GbYFH vjXmnzzuuwyvQ== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Konrad Dybcio , Bjorn Andersson , Sasha Levin Subject: [PATCH 5.10 138/238] clk: qcom: reset: Ensure write completion on reset de/assertion Date: Sun, 24 Mar 2024 19:38:46 -0400 Message-ID: <20240324234027.1354210-139-sashal@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240324234027.1354210-1-sashal@kernel.org> References: <20240324234027.1354210-1-sashal@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Konrad Dybcio [ Upstream commit 2f8cf2c3f3e3f7ef61bd19abb4b0bb797ad50aaf ] Trying to toggle the resets in a rapid fashion can lead to the changes not actually arriving at the clock controller block when we expect them to. This was observed at least on SM8250. Read back the value after regmap_update_bits to ensure write completion. Fixes: b36ba30c8ac6 ("clk: qcom: Add reset controller support") Signed-off-by: Konrad Dybcio Link: https://lore.kernel.org/r/20240105-topic-venus_reset-v2-3-c37eba13b5c= e@linaro.org Signed-off-by: Bjorn Andersson Signed-off-by: Sasha Levin --- drivers/clk/qcom/reset.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/clk/qcom/reset.c b/drivers/clk/qcom/reset.c index 20d1d35aaf229..d96c96a9089f4 100644 --- a/drivers/clk/qcom/reset.c +++ b/drivers/clk/qcom/reset.c @@ -33,7 +33,12 @@ static int qcom_reset_set_assert(struct reset_controller= _dev *rcdev, map =3D &rst->reset_map[id]; mask =3D map->bitmask ? map->bitmask : BIT(map->bit); =20 - return regmap_update_bits(rst->regmap, map->reg, mask, assert ? mask : 0); + regmap_update_bits(rst->regmap, map->reg, mask, assert ? mask : 0); + + /* Read back the register to ensure write completion, ignore the value */ + regmap_read(rst->regmap, map->reg, &mask); + + return 0; } =20 static int qcom_reset_assert(struct reset_controller_dev *rcdev, unsigned = long id) --=20 2.43.0