From nobody Wed Oct 15 22:56:36 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 96DB81774F9; Sun, 24 Mar 2024 23:38:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711323485; cv=none; b=NMYJfIf9SoYZkddWwJPGtCDUmrGiFm23WnEi+s/1UDEWM9qUEBVDnH2k9efy9gZjbab7W1ilgBKLMggvWPy7IL3efxH3pe/cgjLOtYaA4gqggKNc01YM9sRcoUTQ7x7PM2ScuVqF8ZvQQV5I9QKtGIYbZEkLcamlbCUcQNjtrP8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711323485; c=relaxed/simple; bh=pCc5yRqiW7zrM8WJbTTAP0OTtZg+beqdp63g2hcZTaQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=A/Uk8wpgc7J6yDsgnlDYchWJ8Apvi3q3Z67fUj7SRmm3hd6+3msGgDlzfXCp15Ehsqd5SdnIBIc3bpxZ6NQQEbWPOOokmheHyvEeUPmOX5IRte29SpRsm/ebgq37wzzK/mz/YW/TwrznMMzFCK4m2AP7i2s3vUCrgVY+CyMwFBY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Ox2QTGA9; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Ox2QTGA9" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D2E0FC43394; Sun, 24 Mar 2024 23:38:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1711323484; bh=pCc5yRqiW7zrM8WJbTTAP0OTtZg+beqdp63g2hcZTaQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Ox2QTGA9hKex/6mW/h9qLg4Ydq5WPahhjbLuAob/7pyIDXnzysSm8VapGGqL+jcVx l2sZdCWvqnzQfL5T/4HD1sYAxgyBGrFXJ/l74W4zodukK9yCc/HCEGQNCFCoKXkYBl 9O0q42NZ+6Wh7wtB1gqB7hDQvpyC4+AFGlbbQNNrcbb9j8v/u3dX8FNVIRIcZtapPu f1TNaQjxTPfhK8A8alXOPP1kn27OoNWdZlCtHlfHh7BH1fUSp8kSgsaDl67aeUwVDl +9LOOH4JvRYmz59Cj+BRyk7NTW/ZX2dJC2EmH63FgsrySD/CVevyxVWzd7JP2Zqk3U pdyZK2yaU4/Yw== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Konrad Dybcio , Bjorn Andersson , Sasha Levin Subject: [PATCH 5.15 189/317] clk: qcom: reset: Ensure write completion on reset de/assertion Date: Sun, 24 Mar 2024 19:32:49 -0400 Message-ID: <20240324233458.1352854-190-sashal@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240324233458.1352854-1-sashal@kernel.org> References: <20240324233458.1352854-1-sashal@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Konrad Dybcio [ Upstream commit 2f8cf2c3f3e3f7ef61bd19abb4b0bb797ad50aaf ] Trying to toggle the resets in a rapid fashion can lead to the changes not actually arriving at the clock controller block when we expect them to. This was observed at least on SM8250. Read back the value after regmap_update_bits to ensure write completion. Fixes: b36ba30c8ac6 ("clk: qcom: Add reset controller support") Signed-off-by: Konrad Dybcio Link: https://lore.kernel.org/r/20240105-topic-venus_reset-v2-3-c37eba13b5c= e@linaro.org Signed-off-by: Bjorn Andersson Signed-off-by: Sasha Levin --- drivers/clk/qcom/reset.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/clk/qcom/reset.c b/drivers/clk/qcom/reset.c index 20d1d35aaf229..d96c96a9089f4 100644 --- a/drivers/clk/qcom/reset.c +++ b/drivers/clk/qcom/reset.c @@ -33,7 +33,12 @@ static int qcom_reset_set_assert(struct reset_controller= _dev *rcdev, map =3D &rst->reset_map[id]; mask =3D map->bitmask ? map->bitmask : BIT(map->bit); =20 - return regmap_update_bits(rst->regmap, map->reg, mask, assert ? mask : 0); + regmap_update_bits(rst->regmap, map->reg, mask, assert ? mask : 0); + + /* Read back the register to ensure write completion, ignore the value */ + regmap_read(rst->regmap, map->reg, &mask); + + return 0; } =20 static int qcom_reset_assert(struct reset_controller_dev *rcdev, unsigned = long id) --=20 2.43.0