From nobody Fri Dec 19 18:54:00 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2A26E139562; Sun, 24 Mar 2024 23:07:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711321621; cv=none; b=j38r5GboUN8JU0cZaFqWzJ4wFI5k+ClTVwEsTkO7tw3zOKlK70ijUMyNRvsTV5lONjsds3BV8YxoB/UXkXzEh9yF8Fq4Ah5hxBxRYIwXJ40h6huDu01wJFfRfC6NcGIiAe3UBU7Avg6f6Sw6FZ8bM22AQZcVzB9ZamPmPZw6RyQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711321621; c=relaxed/simple; bh=OJJPol7J7fIrfaytG9VmHCkxp+IgzNXZBKdiEqSucJQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=tOl3y1DnEk+Hsip6Rga+BdNvFLvHpmVj+5iHJVJ743A/E48Fmcl2kSjNDO1nm8hCJy8KcKxWqL7zs6UuwsIwwwkbG0OPHkCEKWDD9te751uJ4gE9HnGL1cL4FxdjxbCwqpFz4xGmrTP1juCGbg3w2k8r8344OAp0h2dz7TQ9bYA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=dSD4+lcP; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="dSD4+lcP" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0A237C43394; Sun, 24 Mar 2024 23:06:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1711321620; bh=OJJPol7J7fIrfaytG9VmHCkxp+IgzNXZBKdiEqSucJQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dSD4+lcPovoVQ4oVmQBXuoICt9ApNLbm3msukLXtcWLgpsGqMT8tiLhfFavNcuYvT QVvXXZPv62Tyr3rxPwgRfD1XGNUAmF9ifl6y1tpVnXxt3RiYLVAsZ03Ugq9giUl+uZ oAMCH+oXQltxDY1brS0w1Mgag0GiYCWSGUHIBjT4sSSbqgJraVeDH6RLNrW7oekgs0 rYKLJn8B5wcZ1ARe50yJu52RncG/1kNXvf5dA2mjGZXRmDUzlF8B8uRnkPqj+5em8e RvIB7966/hozk41zeoUCe9LObn+mavwUWDWc5bgbMe10kEmVQHkb4z2B9bDXB1ZjPA i/j0dOpjNwhTA== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Alex Bee , Zheng Yang , Heiko Stuebner , Sasha Levin Subject: [PATCH 6.6 351/638] drm/rockchip: inno_hdmi: Fix video timing Date: Sun, 24 Mar 2024 18:56:28 -0400 Message-ID: <20240324230116.1348576-352-sashal@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240324230116.1348576-1-sashal@kernel.org> References: <20240324230116.1348576-1-sashal@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Alex Bee [ Upstream commit 47a145c03484d33e65d773169d5ca1b9fe2a492e ] The controller wants the difference between *total and *sync_start in the HDMI_VIDEO_EXT_*DELAY registers. Otherwise the signal is very unstable for certain non-VIC modes. See downstream commit [0]. [0] https://github.com/rockchip-linux/kernel/commit/8eb559f2502c Fixes: 412d4ae6b7a5 ("drm/rockchip: hdmi: add Innosilicon HDMI support") Co-developed-by: Zheng Yang Signed-off-by: Zheng Yang Signed-off-by: Alex Bee Signed-off-by: Heiko Stuebner Link: https://patchwork.freedesktop.org/patch/msgid/20231222174220.55249-4-= knaerzche@gmail.com Signed-off-by: Sasha Levin --- drivers/gpu/drm/rockchip/inno_hdmi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/rockchip/inno_hdmi.c b/drivers/gpu/drm/rockchi= p/inno_hdmi.c index 6e5b922a121e2..345253e033c53 100644 --- a/drivers/gpu/drm/rockchip/inno_hdmi.c +++ b/drivers/gpu/drm/rockchip/inno_hdmi.c @@ -412,7 +412,7 @@ static int inno_hdmi_config_video_timing(struct inno_hd= mi *hdmi, hdmi_writeb(hdmi, HDMI_VIDEO_EXT_HBLANK_L, value & 0xFF); hdmi_writeb(hdmi, HDMI_VIDEO_EXT_HBLANK_H, (value >> 8) & 0xFF); =20 - value =3D mode->hsync_start - mode->hdisplay; + value =3D mode->htotal - mode->hsync_start; hdmi_writeb(hdmi, HDMI_VIDEO_EXT_HDELAY_L, value & 0xFF); hdmi_writeb(hdmi, HDMI_VIDEO_EXT_HDELAY_H, (value >> 8) & 0xFF); =20 @@ -427,7 +427,7 @@ static int inno_hdmi_config_video_timing(struct inno_hd= mi *hdmi, value =3D mode->vtotal - mode->vdisplay; hdmi_writeb(hdmi, HDMI_VIDEO_EXT_VBLANK, value & 0xFF); =20 - value =3D mode->vsync_start - mode->vdisplay; + value =3D mode->vtotal - mode->vsync_start; hdmi_writeb(hdmi, HDMI_VIDEO_EXT_VDELAY, value & 0xFF); =20 value =3D mode->vsync_end - mode->vsync_start; --=20 2.43.0