From nobody Fri Dec 19 06:59:48 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ECF3013AD34; Sun, 24 Mar 2024 22:44:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711320248; cv=none; b=qViO1TI50aSSvrtj1ZHDPPh6P1UP5l2Qmh9xaXL7JyC6uRI9ZobNH7GK9EXrm2S8dqyoxq5mI8TuBjWcr+g6i32JQKbYWU34z72Q/hPI8dku8GDaVuqAjLcfI/F4XKD5Dji7PTXhh9Kqr4i0P27EPh4opKE/zJ5wp2qf+Nh0gGo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711320248; c=relaxed/simple; bh=9ObjapYVqvVQnhfvnn3+MTqwP2ZcRAUoO8UfIdlYbfI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=aJjzVmeZLmQIoz3Hub4YwF1z89HlbXDAgNDn3BBiot713pVM4WqabsOtz76LeHIHv0oq1XQ3BjB0HZJzHeOII/wxV1tc0yuOx+hBUSuNlq0Uyzaafe4UAN1Q1b2IxhH9lOAv32Ci2vC7osKcIjcw61Z695/94u2nbzVypW8HST4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=rJdcxo2F; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="rJdcxo2F" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0C65BC433B2; Sun, 24 Mar 2024 22:44:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1711320247; bh=9ObjapYVqvVQnhfvnn3+MTqwP2ZcRAUoO8UfIdlYbfI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=rJdcxo2FMEH7U5ZZf3fV1r8kMJk7uee3y+WrsCvb3IpxiUcN97YWYjI85Mpwq66aZ RgbI2JsMG2jUnB1PwkaV+pHVebF7Sf3Q+RtNHAUk2MAy58dGqDfIPxR1o5y8K63/vG zpYY3GE7XHvp8wqxYPFquu+jBaN2zJCXHOKG8NOoyKyOBRim6IB1kFu6IuHKIhPHn0 f8SF/r6EJ4q2B7v+aYM8uJoBV2f+HZ83Ml0xD+Yg8p29RZYlVw0o66/csS80gZYX1o 1/bwl9M5NGlzn4C/ZXwwFVGV400wyQhqmUacb35mSeVtJhL1US4KmXbkuprQTofifL jZoehmHihjSkw== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Dmitry Baryshkov , Jeffrey Hugo , Konrad Dybcio , Vinod Koul , Sasha Levin Subject: [PATCH 6.8 555/715] phy: qcom: qmp-usbc: handle CLAMP register in a correct way Date: Sun, 24 Mar 2024 18:32:14 -0400 Message-ID: <20240324223455.1342824-556-sashal@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240324223455.1342824-1-sashal@kernel.org> References: <20240324223455.1342824-1-sashal@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Dmitry Baryshkov [ Upstream commit 01b086ccdeffac96f107228d581e0925e1c83f87 ] The QMP USB PHYs on msm8998, qcm2290 and some other platforms don't have the PCS_MISC_CLAMP_ENABLE register. Instead they need to toggle the register in the TCSR space. Make the new phy-qcom-qmp-usbc driver correctly handle the clamp register. Fixes: a51969fafc82 ("phy: qcom-qmp: Add QMP V3 USB3 PHY support for msm899= 8") Fixes: 8abe5e778b2c ("phy: qcom-qmp: Add QCM2290 USB3 PHY support") Cc: Jeffrey Hugo Signed-off-by: Dmitry Baryshkov Acked-by: Konrad Dybcio Link: https://lore.kernel.org/r/20240117-usbc-phy-vls-clamp-v2-3-a950c223f1= 0f@linaro.org Signed-off-by: Vinod Koul Signed-off-by: Sasha Levin --- drivers/phy/qualcomm/phy-qcom-qmp-usbc.c | 48 ++++++++++++++++++------ 1 file changed, 37 insertions(+), 11 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-usbc.c b/drivers/phy/qualcom= m/phy-qcom-qmp-usbc.c index 214cf4203de41..3a4b4849db0f5 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-usbc.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-usbc.c @@ -10,11 +10,13 @@ #include #include #include +#include #include #include #include #include #include +#include #include #include #include @@ -56,9 +58,6 @@ /* QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR register bits */ #define IRQ_CLEAR BIT(0) =20 -/* QPHY_V3_PCS_MISC_CLAMP_ENABLE register bits */ -#define CLAMP_EN BIT(0) /* enables i/o clamp_n */ - #define PHY_INIT_COMPLETE_TIMEOUT 10000 =20 struct qmp_phy_init_tbl { @@ -94,7 +93,6 @@ enum qphy_reg_layout { QPHY_PCS_AUTONOMOUS_MODE_CTRL, QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR, QPHY_PCS_POWER_DOWN_CONTROL, - QPHY_PCS_MISC_CLAMP_ENABLE, /* Keep last to ensure regs_layout arrays are properly initialized */ QPHY_LAYOUT_SIZE }; @@ -106,7 +104,6 @@ static const unsigned int qmp_v3_usb3phy_regs_layout[QP= HY_LAYOUT_SIZE] =3D { [QPHY_PCS_AUTONOMOUS_MODE_CTRL] =3D QPHY_V3_PCS_AUTONOMOUS_MODE_CTRL, [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] =3D QPHY_V3_PCS_LFPS_RXTERM_IRQ_CLEAR, [QPHY_PCS_POWER_DOWN_CONTROL] =3D QPHY_V3_PCS_POWER_DOWN_CONTROL, - [QPHY_PCS_MISC_CLAMP_ENABLE] =3D QPHY_V3_PCS_MISC_CLAMP_ENABLE, }; =20 static const unsigned int qmp_v3_usb3phy_regs_layout_qcm2290[QPHY_LAYOUT_S= IZE] =3D { @@ -369,6 +366,9 @@ struct qmp_usbc { void __iomem *tx2; void __iomem *rx2; =20 + struct regmap *tcsr_map; + u32 vls_clamp_reg; + struct clk *pipe_clk; struct clk_bulk_data *clks; int num_clks; @@ -691,7 +691,6 @@ static void qmp_usbc_enable_autonomous_mode(struct qmp_= usbc *qmp) { const struct qmp_phy_cfg *cfg =3D qmp->cfg; void __iomem *pcs =3D qmp->pcs; - void __iomem *pcs_misc =3D qmp->pcs_misc; u32 intr_mask; =20 if (qmp->mode =3D=3D PHY_MODE_USB_HOST_SS || @@ -712,19 +711,18 @@ static void qmp_usbc_enable_autonomous_mode(struct qm= p_usbc *qmp) qphy_setbits(pcs, cfg->regs[QPHY_PCS_AUTONOMOUS_MODE_CTRL], intr_mask); =20 /* Enable i/o clamp_n for autonomous mode */ - if (pcs_misc && cfg->regs[QPHY_PCS_MISC_CLAMP_ENABLE]) - qphy_clrbits(pcs_misc, cfg->regs[QPHY_PCS_MISC_CLAMP_ENABLE], CLAMP_EN); + if (qmp->tcsr_map && qmp->vls_clamp_reg) + regmap_write(qmp->tcsr_map, qmp->vls_clamp_reg, 1); } =20 static void qmp_usbc_disable_autonomous_mode(struct qmp_usbc *qmp) { const struct qmp_phy_cfg *cfg =3D qmp->cfg; void __iomem *pcs =3D qmp->pcs; - void __iomem *pcs_misc =3D qmp->pcs_misc; =20 /* Disable i/o clamp_n on resume for normal mode */ - if (pcs_misc && cfg->regs[QPHY_PCS_MISC_CLAMP_ENABLE]) - qphy_setbits(pcs_misc, cfg->regs[QPHY_PCS_MISC_CLAMP_ENABLE], CLAMP_EN); + if (qmp->tcsr_map && qmp->vls_clamp_reg) + regmap_write(qmp->tcsr_map, qmp->vls_clamp_reg, 0); =20 qphy_clrbits(pcs, cfg->regs[QPHY_PCS_AUTONOMOUS_MODE_CTRL], ARCVR_DTCT_EN | ARCVR_DTCT_EVENT_SEL | ALFPS_DTCT_EN); @@ -1063,6 +1061,30 @@ static int qmp_usbc_parse_dt(struct qmp_usbc *qmp) return 0; } =20 +static int qmp_usbc_parse_vls_clamp(struct qmp_usbc *qmp) +{ + struct of_phandle_args tcsr_args; + struct device *dev =3D qmp->dev; + int ret; + + /* for backwards compatibility ignore if there is no property */ + ret =3D of_parse_phandle_with_fixed_args(dev->of_node, "qcom,tcsr-reg", 1= , 0, + &tcsr_args); + if (ret =3D=3D -ENOENT) + return 0; + else if (ret < 0) + return dev_err_probe(dev, ret, "Failed to parse qcom,tcsr-reg\n"); + + qmp->tcsr_map =3D syscon_node_to_regmap(tcsr_args.np); + of_node_put(tcsr_args.np); + if (IS_ERR(qmp->tcsr_map)) + return PTR_ERR(qmp->tcsr_map); + + qmp->vls_clamp_reg =3D tcsr_args.args[0]; + + return 0; +} + static int qmp_usbc_probe(struct platform_device *pdev) { struct device *dev =3D &pdev->dev; @@ -1093,6 +1115,10 @@ static int qmp_usbc_probe(struct platform_device *pd= ev) if (ret) return ret; =20 + ret =3D qmp_usbc_parse_vls_clamp(qmp); + if (ret) + return ret; + /* Check for legacy binding with child node. */ np =3D of_get_child_by_name(dev->of_node, "phy"); if (np) { --=20 2.43.0