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charset="utf-8" Content-Transfer-Encoding: quoted-printable The writes to setipnum_le/be register for APLIC in MSI-mode have special consideration for level-triggered interrupts as-per the section "4.9.2 Special consideration for level-sensitive interrupt sources" of the RISC-V AIA specification. Particularly, the below text from the RISC-V AIA specification defines the behaviour of writes to setipnum_le/be register for level-triggered interrupts: "A second option is for the interrupt service routine to write the APLIC=E2=80=99s source identity number for the interrupt to the domain=E2= =80=99s setipnum register just before exiting. This will cause the interrupt=E2=80= =99s pending bit to be set to one again if the source is still asserting an interrupt, but not if the source is not asserting an interrupt." Fix setipnum_le/be write emulation for in-kernel APLIC by implementing the above behaviour in aplic_write_pending() function. Cc: stable@vger.kernel.org Fixes: 74967aa208e2 ("RISC-V: KVM: Add in-kernel emulation of AIA APLIC") Signed-off-by: Anup Patel --- arch/riscv/kvm/aia_aplic.c | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/arch/riscv/kvm/aia_aplic.c b/arch/riscv/kvm/aia_aplic.c index 39e72aa016a4..5e842b92dc46 100644 --- a/arch/riscv/kvm/aia_aplic.c +++ b/arch/riscv/kvm/aia_aplic.c @@ -137,11 +137,21 @@ static void aplic_write_pending(struct aplic *aplic, = u32 irq, bool pending) raw_spin_lock_irqsave(&irqd->lock, flags); =20 sm =3D irqd->sourcecfg & APLIC_SOURCECFG_SM_MASK; - if (!pending && - ((sm =3D=3D APLIC_SOURCECFG_SM_LEVEL_HIGH) || - (sm =3D=3D APLIC_SOURCECFG_SM_LEVEL_LOW))) + if (sm =3D=3D APLIC_SOURCECFG_SM_INACTIVE) goto skip_write_pending; =20 + if (sm =3D=3D APLIC_SOURCECFG_SM_LEVEL_HIGH || + sm =3D=3D APLIC_SOURCECFG_SM_LEVEL_LOW) { + if (!pending) + goto skip_write_pending; + if ((irqd->state & APLIC_IRQ_STATE_INPUT) && + sm =3D=3D APLIC_SOURCECFG_SM_LEVEL_LOW) + goto skip_write_pending; + if (!(irqd->state & APLIC_IRQ_STATE_INPUT) && + sm =3D=3D APLIC_SOURCECFG_SM_LEVEL_HIGH) + goto skip_write_pending; + } + if (pending) irqd->state |=3D APLIC_IRQ_STATE_PENDING; else --=20 2.34.1 From nobody Sat Feb 7 14:39:23 2026 Received: from mail-oi1-f170.google.com (mail-oi1-f170.google.com [209.85.167.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 86D0B53E12 for ; Thu, 21 Mar 2024 08:51:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.170 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711011068; cv=none; b=pUwBeGGLxUQLejr7lgQTfU8d4KwANZpSXOi6nVZXITgj5OQLLkBlh3fvzVTcSxXWx00YHR+Ogd/ZEHIq8FL1VJGhOS3qKQvJMYViD3RC7sUGGWYMPKVmPv1NDl1dbskit3PsAyLFQX0859aY6PtqBij3g6nAUvr3inVUiF0BgkM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711011068; c=relaxed/simple; bh=Qv0uJqFhMtAx1X6+XG2ureaXkoHplsppJbmPG09HXsM=; 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Thu, 21 Mar 2024 01:51:05 -0700 (PDT) From: Anup Patel To: Paolo Bonzini , Atish Patra Cc: Palmer Dabbelt , Paul Walmsley , Andrew Jones , Anup Patel , kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Anup Patel Subject: [PATCH 2/2] RISC-V: KVM: Fix APLIC in_clrip[x] read emulation Date: Thu, 21 Mar 2024 14:20:41 +0530 Message-Id: <20240321085041.1955293-3-apatel@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240321085041.1955293-1-apatel@ventanamicro.com> References: <20240321085041.1955293-1-apatel@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The reads to APLIC in_clrip[x] registers returns rectified input values of the interrupt sources. A rectified input value of an interrupt source is defined by the section "4.5.2 Source configurations (sourcecfg[1]=E2=80=93sourcecfg[1023])" of the RISC-V AIA specification as: rectified input value =3D (incoming wire value) XOR (source is inverted) Update the riscv_aplic_input() implementation to match the above. Fixes: 74967aa208e2 ("RISC-V: KVM: Add in-kernel emulation of AIA APLIC") Signed-off-by: Anup Patel --- arch/riscv/kvm/aia_aplic.c | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) diff --git a/arch/riscv/kvm/aia_aplic.c b/arch/riscv/kvm/aia_aplic.c index 5e842b92dc46..b467ba5ed910 100644 --- a/arch/riscv/kvm/aia_aplic.c +++ b/arch/riscv/kvm/aia_aplic.c @@ -197,16 +197,31 @@ static void aplic_write_enabled(struct aplic *aplic, = u32 irq, bool enabled) =20 static bool aplic_read_input(struct aplic *aplic, u32 irq) { - bool ret; - unsigned long flags; + u32 sourcecfg, sm, raw_input, irq_inverted; struct aplic_irq *irqd; + unsigned long flags; + bool ret =3D false; =20 if (!irq || aplic->nr_irqs <=3D irq) return false; irqd =3D &aplic->irqs[irq]; =20 raw_spin_lock_irqsave(&irqd->lock, flags); - ret =3D (irqd->state & APLIC_IRQ_STATE_INPUT) ? true : false; + + sourcecfg =3D irqd->sourcecfg; + if (sourcecfg & APLIC_SOURCECFG_D) + goto skip; + + sm =3D sourcecfg & APLIC_SOURCECFG_SM_MASK; + if (sm =3D=3D APLIC_SOURCECFG_SM_INACTIVE) + goto skip; + + raw_input =3D (irqd->state & APLIC_IRQ_STATE_INPUT) ? 1 : 0; + irq_inverted =3D (sm =3D=3D APLIC_SOURCECFG_SM_LEVEL_LOW || + sm =3D=3D APLIC_SOURCECFG_SM_EDGE_FALL) ? 1 : 0; + ret =3D !!(raw_input ^ irq_inverted); + +skip: raw_spin_unlock_irqrestore(&irqd->lock, flags); =20 return ret; --=20 2.34.1