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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240319-topic-sm8x50-upstream-pcie-1-phy-aux-clk-v1-2-926d7a4ccd80@linaro.org> References: <20240319-topic-sm8x50-upstream-pcie-1-phy-aux-clk-v1-0-926d7a4ccd80@linaro.org> In-Reply-To: <20240319-topic-sm8x50-upstream-pcie-1-phy-aux-clk-v1-0-926d7a4ccd80@linaro.org> To: Bjorn Andersson , Konrad Dybcio , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=2539; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=L9f7mVzB9wMW7O3NrZIDvpmvouDLp7SdgWUnDSjbq1A=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBl+WyVqMHIPwowIY+jis50jKt8HWeaChSOf1n5Qo/s VvyV6LyJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZflslQAKCRB33NvayMhJ0cTwD/ 4oCFX/soYZyw0allUAHdZ2JeGA2i8z2dwZVs45CGAYYDPZ5upLTxBHX1I4/AWQRFCIxqpE1bjcDX99 7Z3Xz2KwKIjl8l3fAoGDoaCKj64IQ77VSio/mFt5PHdZDpYykBX/DIE0HM2IRt58mTmQxpSiWPgCZA T6FobLiQtF9uYKESOWkypSag5wV8BMNTsRF5PqeUpDirDyJk4Egdz9ovFUqVVWU57dHWDJmfzsZ6M9 2oRAsipFxKpF2jmBJX0StNlWu5xwILHpTQ3a/XpeG/hDbZj2tahcHwEVl0mgl0mhaHLIvEtdqQJBdd lDs//mTTZnggxYSsxBoMrXEW3VE1FgHfuNUtD7AHFcYaQ4f3UTr3XUrZzJCEZOsLb3zvIr1MPMlbz1 EYdHfIEGH1oEOB5sT5SIpc/ENEHHbvgPGCBHuKTp96Dw3tZOMzJ394vzmIhgNrCFUfhXKjffMH9Wyx Hxv3Wmmza4WfAfutfpUzBsd7gdocun1KTLduSxW2uLOb8QnlE1QFo8x2CUrEMKJsRU/R3Qqo+WZT0f K1Av2n3lmk3aoj5M8z5rys/HsZ9rGrSU+2XjJYtxQdwslYw9D+uaQKh/dXN9HqFysm1EVzyuTWRyHC Hy2CdIca4gZDAdlUpfoWdtQrNNxulOAH4x4Bj49WTLfeKSqecYX0XN1p9AzA== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE The PCIe Gen4x2 PHY found in the SM8[456]50 SoCs have a second clock, in order to expose it, split the current clock registering in two parts: - CCF clock registering - DT clock registering Also switch to devm_of_clk_add_hw_provider(). Signed-off-by: Neil Armstrong --- drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 27 +++++++++++---------------- 1 file changed, 11 insertions(+), 16 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcom= m/phy-qcom-qmp-pcie.c index 8836bb1ff0cc..079b3e306489 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c @@ -3635,11 +3635,6 @@ static int qmp_pcie_clk_init(struct qmp_pcie *qmp) return devm_clk_bulk_get_optional(dev, num, qmp->clks); } =20 -static void phy_clk_release_provider(void *res) -{ - of_clk_del_provider(res); -} - /* * Register a fixed rate pipe clock. * @@ -3664,7 +3659,7 @@ static int phy_pipe_clk_register(struct qmp_pcie *qmp= , struct device_node *np) struct clk_init_data init =3D { }; int ret; =20 - ret =3D of_property_read_string(np, "clock-output-names", &init.name); + ret =3D of_property_read_string_index(np, "clock-output-names", 0, &init.= name); if (ret) { dev_err(qmp->dev, "%pOFn: No clock-output-names\n", np); return ret; @@ -3683,19 +3678,19 @@ static int phy_pipe_clk_register(struct qmp_pcie *q= mp, struct device_node *np) =20 fixed->hw.init =3D &init; =20 - ret =3D devm_clk_hw_register(qmp->dev, &fixed->hw); - if (ret) - return ret; + return devm_clk_hw_register(qmp->dev, &fixed->hw); +} =20 - ret =3D of_clk_add_hw_provider(np, of_clk_hw_simple_get, &fixed->hw); +static int qmp_pcie_register_clocks(struct qmp_pcie *qmp, struct device_no= de *np) +{ + int ret; + + ret =3D phy_pipe_clk_register(qmp, np); if (ret) return ret; =20 - /* - * Roll a devm action because the clock provider is the child node, but - * the child node is not actually a device. - */ - return devm_add_action_or_reset(qmp->dev, phy_clk_release_provider, np); + return devm_of_clk_add_hw_provider(qmp->dev, of_clk_hw_simple_get, + &qmp->pipe_clk_fixed.hw); } =20 static int qmp_pcie_parse_dt_legacy(struct qmp_pcie *qmp, struct device_no= de *np) @@ -3899,7 +3894,7 @@ static int qmp_pcie_probe(struct platform_device *pde= v) if (ret) goto err_node_put; =20 - ret =3D phy_pipe_clk_register(qmp, np); + ret =3D qmp_pcie_register_clocks(qmp, np); if (ret) goto err_node_put; =20 --=20 2.34.1