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charset="utf-8" Rearrange attributes and descendents declared under the ethernet node, recursively, to follow the DTS style guide. Signed-off-by: Justin Swartz Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Ar=C4=B1n=C3=A7 =C3=9CNAL --- arch/mips/boot/dts/ralink/mt7621.dtsi | 88 +++++++++++++++------------ 1 file changed, 48 insertions(+), 40 deletions(-) diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ral= ink/mt7621.dtsi index 8aa9eba68..f6418201b 100644 --- a/arch/mips/boot/dts/ralink/mt7621.dtsi +++ b/arch/mips/boot/dts/ralink/mt7621.dtsi @@ -364,46 +364,22 @@ ethernet: ethernet@1e100000 { compatible =3D "mediatek,mt7621-eth"; reg =3D <0x1e100000 0x10000>; =20 - clocks =3D <&sysc MT7621_CLK_FE>, <&sysc MT7621_CLK_ETH>; - clock-names =3D "fe", "ethif"; - #address-cells =3D <1>; #size-cells =3D <0>; =20 - resets =3D <&sysc MT7621_RST_FE>, <&sysc MT7621_RST_ETH>; - reset-names =3D "fe", "eth"; + clock-names =3D "fe", "ethif"; + clocks =3D <&sysc MT7621_CLK_FE>, <&sysc MT7621_CLK_ETH>; =20 interrupt-parent =3D <&gic>; interrupts =3D ; =20 - mediatek,ethsys =3D <&sysc>; - pinctrl-names =3D "default"; pinctrl-0 =3D <&mdio_pins>, <&rgmii1_pins>, <&rgmii2_pins>; =20 - gmac0: mac@0 { - compatible =3D "mediatek,eth-mac"; - reg =3D <0>; - phy-mode =3D "trgmii"; - - fixed-link { - speed =3D <1000>; - full-duplex; - pause; - }; - }; - - gmac1: mac@1 { - compatible =3D "mediatek,eth-mac"; - reg =3D <1>; - phy-mode =3D "rgmii"; + reset-names =3D "fe", "eth"; + resets =3D <&sysc MT7621_RST_FE>, <&sysc MT7621_RST_ETH>; =20 - fixed-link { - speed =3D <1000>; - full-duplex; - pause; - }; - }; + mediatek,ethsys =3D <&sysc>; =20 mdio: mdio-bus { #address-cells =3D <1>; @@ -412,73 +388,105 @@ mdio: mdio-bus { switch0: switch@1f { compatible =3D "mediatek,mt7621"; reg =3D <0x1f>; - mediatek,mcm; - resets =3D <&sysc MT7621_RST_MCM>; - reset-names =3D "mcm"; - interrupt-controller; + #interrupt-cells =3D <1>; + interrupt-controller; interrupts =3D ; =20 + reset-names =3D "mcm"; + resets =3D <&sysc MT7621_RST_MCM>; + + mediatek,mcm; + ports { #address-cells =3D <1>; #size-cells =3D <0>; =20 port@0 { - status =3D "disabled"; reg =3D <0>; label =3D "swp0"; + status =3D "disabled"; }; =20 port@1 { - status =3D "disabled"; reg =3D <1>; label =3D "swp1"; + status =3D "disabled"; }; =20 port@2 { - status =3D "disabled"; reg =3D <2>; label =3D "swp2"; + status =3D "disabled"; }; =20 port@3 { - status =3D "disabled"; reg =3D <3>; label =3D "swp3"; + status =3D "disabled"; }; =20 port@4 { - status =3D "disabled"; reg =3D <4>; label =3D "swp4"; + status =3D "disabled"; }; =20 port@5 { reg =3D <5>; + ethernet =3D <&gmac1>; phy-mode =3D "rgmii"; =20 fixed-link { - speed =3D <1000>; full-duplex; pause; + speed =3D <1000>; }; }; =20 port@6 { reg =3D <6>; + ethernet =3D <&gmac0>; phy-mode =3D "trgmii"; =20 fixed-link { - speed =3D <1000>; full-duplex; pause; + speed =3D <1000>; }; }; }; }; }; + + gmac0: mac@0 { + compatible =3D "mediatek,eth-mac"; + reg =3D <0>; + + phy-mode =3D "trgmii"; + + fixed-link { + full-duplex; + pause; + speed =3D <1000>; + }; + }; + + gmac1: mac@1 { + compatible =3D "mediatek,eth-mac"; + reg =3D <1>; + + phy-mode =3D "rgmii"; + + fixed-link { + full-duplex; + pause; + speed =3D <1000>; + }; + }; + }; =20 pcie: pcie@1e140000 { --