From nobody Mon Feb 9 17:56:46 2026 Received: from out-183.mta1.migadu.com (out-183.mta1.migadu.com [95.215.58.183]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A94D05A4D5 for ; Fri, 15 Mar 2024 23:09:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.183 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710544175; cv=none; b=lWhtRdd6mc2j7abnoVPyiGauF8rIACMWsmWaj8kL7xj+7lhDfWQQ2Ksz0qCSA5K8ecPg8IWGrbAixP7VQ3jI28YefpCM4NLbX0u0tfGFCrOrlrEtjasH9J52u0FG2r+l3Kr/y7GU9TuqCMLwn1r5LCtUJjapi9hQmmSfkK6V74Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710544175; c=relaxed/simple; bh=W1v5F0BWjUcXEzaN4Uw2sMp+nMFJwXxu31hI5lhNfK4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=koYfrssRRLXbxP3/qpV50cmNSk9ysCxR3/D3XM5WTWzIFPpTY6dUBiSnp9Q8/fbfDArt+jmQEbn7SmwG1cd21Zmq+Lw31wfylUqEVRue7lzC7115VYOihV2jbhjwGy4lJ+cYgVBSd82ddGyHCpf2zwo80Irltc95MsKv8nSBsh4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=sCTuaiSC; arc=none smtp.client-ip=95.215.58.183 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="sCTuaiSC" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1710544169; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=x3+PPHKFdpXChJ2kv+csEq7dgWK3ohjxhbsPdG1wSL8=; b=sCTuaiSCAibV4U3YanvC1CP7RQ4P/1K1uVl4TF+QK3DoU//lK/I48pIMz7ptYb/yNP48IV 1EGWc9lPRUdMfu7SNC87Rl5ZkIedou7jEXCMxqE3IHEIhcF6SexqcRCgcOwl/I0QqPYYuF FnBDtEn2cPx1zIM/RQVpgv64myIUmRo= From: Sean Anderson To: Laurent Pinchart , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , dri-devel@lists.freedesktop.org Cc: David Airlie , linux-kernel@vger.kernel.org, Michal Simek , linux-arm-kernel@lists.infradead.org, Daniel Vetter , Sean Anderson Subject: [PATCH 3/6] drm: zynqmp_dp: Add locking Date: Fri, 15 Mar 2024 19:09:13 -0400 Message-Id: <20240315230916.1759060-4-sean.anderson@linux.dev> In-Reply-To: <20240315230916.1759060-1-sean.anderson@linux.dev> References: <20240315230916.1759060-1-sean.anderson@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" Add some locking, since none is provided by the drm subsystem. This will prevent the IRQ/workers/bridge API calls from stepping on each other's toes. Signed-off-by: Sean Anderson --- drivers/gpu/drm/xlnx/zynqmp_dp.c | 59 +++++++++++++++++++++++--------- 1 file changed, 42 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/xlnx/zynqmp_dp.c b/drivers/gpu/drm/xlnx/zynqmp= _dp.c index 8635b5673386..d2dee58e7bf2 100644 --- a/drivers/gpu/drm/xlnx/zynqmp_dp.c +++ b/drivers/gpu/drm/xlnx/zynqmp_dp.c @@ -279,6 +279,7 @@ struct zynqmp_dp_config { * @dpsub: Display subsystem * @iomem: device I/O memory for register access * @reset: reset controller + * @lock: Mutex protecting this struct and register access (but not AUX) * @irq: irq * @bridge: DRM bridge for the DP encoder * @next_bridge: The downstream bridge @@ -299,6 +300,7 @@ struct zynqmp_dp { struct zynqmp_dpsub *dpsub; void __iomem *iomem; struct reset_control *reset; + struct mutex lock; int irq; =20 struct drm_bridge bridge; @@ -308,7 +310,7 @@ struct zynqmp_dp { struct drm_dp_aux aux; struct phy *phy[ZYNQMP_DP_MAX_LANES]; u8 num_lanes; - struct delayed_work hpd_work; + struct delayed_work hpd_work, hpd_irq_work; enum drm_connector_status status; bool enabled; =20 @@ -1371,8 +1373,10 @@ zynqmp_dp_bridge_mode_valid(struct drm_bridge *bridg= e, } =20 /* Check with link rate and lane count */ + mutex_lock(&dp->lock); rate =3D zynqmp_dp_max_rate(dp->link_config.max_rate, dp->link_config.max_lanes, dp->config.bpp); + mutex_unlock(&dp->lock); if (mode->clock > rate) { dev_dbg(dp->dev, "filtered mode %s for high pixel rate\n", mode->name); @@ -1399,6 +1403,7 @@ static void zynqmp_dp_bridge_atomic_enable(struct drm= _bridge *bridge, =20 pm_runtime_get_sync(dp->dev); =20 + mutex_lock(&dp->lock); zynqmp_dp_disp_enable(dp, old_bridge_state); =20 /* @@ -1459,6 +1464,7 @@ static void zynqmp_dp_bridge_atomic_enable(struct drm= _bridge *bridge, zynqmp_dp_write(dp, ZYNQMP_DP_SOFTWARE_RESET, ZYNQMP_DP_SOFTWARE_RESET_ALL); zynqmp_dp_write(dp, ZYNQMP_DP_MAIN_STREAM_ENABLE, 1); + mutex_unlock(&dp->lock); } =20 static void zynqmp_dp_bridge_atomic_disable(struct drm_bridge *bridge, @@ -1466,6 +1472,7 @@ static void zynqmp_dp_bridge_atomic_disable(struct dr= m_bridge *bridge, { struct zynqmp_dp *dp =3D bridge_to_dp(bridge); =20 + mutex_lock(&dp->lock); dp->enabled =3D false; cancel_delayed_work(&dp->hpd_work); zynqmp_dp_write(dp, ZYNQMP_DP_MAIN_STREAM_ENABLE, 0); @@ -1476,6 +1483,7 @@ static void zynqmp_dp_bridge_atomic_disable(struct dr= m_bridge *bridge, zynqmp_dp_write(dp, ZYNQMP_DP_TX_AUDIO_CONTROL, 0); =20 zynqmp_dp_disp_disable(dp, old_bridge_state); + mutex_unlock(&dp->lock); =20 pm_runtime_put_sync(dp->dev); } @@ -1518,6 +1526,8 @@ static enum drm_connector_status zynqmp_dp_bridge_det= ect(struct drm_bridge *brid u32 state, i; int ret; =20 + mutex_lock(&dp->lock); + /* * This is from heuristic. It takes some delay (ex, 100 ~ 500 msec) to * get the HPD signal with some monitors. @@ -1545,11 +1555,13 @@ static enum drm_connector_status zynqmp_dp_bridge_d= etect(struct drm_bridge *brid dp->num_lanes); =20 dp->status =3D connector_status_connected; + mutex_unlock(&dp->lock); return connector_status_connected; } =20 disconnected: dp->status =3D connector_status_disconnected; + mutex_unlock(&dp->lock); return connector_status_disconnected; } =20 @@ -1611,6 +1623,29 @@ static void zynqmp_dp_hpd_work_func(struct work_stru= ct *work) drm_bridge_hpd_notify(&dp->bridge, status); } =20 +static void zynqmp_dp_hpd_irq_work_func(struct work_struct *work) +{ + struct zynqmp_dp *dp =3D container_of(work, struct zynqmp_dp, + hpd_irq_work.work); + u8 status[DP_LINK_STATUS_SIZE + 2]; + int err; + + mutex_lock(&dp->lock); + err =3D drm_dp_dpcd_read(&dp->aux, DP_SINK_COUNT, status, + DP_LINK_STATUS_SIZE + 2); + if (err < 0) { + dev_dbg_ratelimited(dp->dev, + "could not read sink status: %d\n", err); + } else { + if (status[4] & DP_LINK_STATUS_UPDATED || + !drm_dp_clock_recovery_ok(&status[2], dp->mode.lane_cnt) || + !drm_dp_channel_eq_ok(&status[2], dp->mode.lane_cnt)) { + zynqmp_dp_train_loop(dp); + } + } + mutex_unlock(&dp->lock); +} + static irqreturn_t zynqmp_dp_irq_handler(int irq, void *data) { struct zynqmp_dp *dp =3D (struct zynqmp_dp *)data; @@ -1635,23 +1670,9 @@ static irqreturn_t zynqmp_dp_irq_handler(int irq, vo= id *data) if (status & ZYNQMP_DP_INT_HPD_EVENT) schedule_delayed_work(&dp->hpd_work, 0); =20 - if (status & ZYNQMP_DP_INT_HPD_IRQ) { - int ret; - u8 status[DP_LINK_STATUS_SIZE + 2]; + if (status & ZYNQMP_DP_INT_HPD_IRQ) + schedule_delayed_work(&dp->hpd_irq_work, 0); =20 - ret =3D drm_dp_dpcd_read(&dp->aux, DP_SINK_COUNT, status, - DP_LINK_STATUS_SIZE + 2); - if (ret < 0) - goto handled; - - if (status[4] & DP_LINK_STATUS_UPDATED || - !drm_dp_clock_recovery_ok(&status[2], dp->mode.lane_cnt) || - !drm_dp_channel_eq_ok(&status[2], dp->mode.lane_cnt)) { - zynqmp_dp_train_loop(dp); - } - } - -handled: return IRQ_HANDLED; } =20 @@ -1674,8 +1695,10 @@ int zynqmp_dp_probe(struct zynqmp_dpsub *dpsub) dp->dev =3D &pdev->dev; dp->dpsub =3D dpsub; dp->status =3D connector_status_disconnected; + mutex_init(&dp->lock); =20 INIT_DELAYED_WORK(&dp->hpd_work, zynqmp_dp_hpd_work_func); + INIT_DELAYED_WORK(&dp->hpd_irq_work, zynqmp_dp_hpd_irq_work_func); =20 /* Acquire all resources (IOMEM, IRQ and PHYs). */ res =3D platform_get_resource_byname(pdev, IORESOURCE_MEM, "dp"); @@ -1775,6 +1798,7 @@ void zynqmp_dp_remove(struct zynqmp_dpsub *dpsub) zynqmp_dp_write(dp, ZYNQMP_DP_INT_DS, ZYNQMP_DP_INT_ALL); disable_irq(dp->irq); =20 + cancel_delayed_work_sync(&dp->hpd_irq_work); cancel_delayed_work_sync(&dp->hpd_work); =20 zynqmp_dp_write(dp, ZYNQMP_DP_TRANSMITTER_ENABLE, 0); @@ -1782,4 +1806,5 @@ void zynqmp_dp_remove(struct zynqmp_dpsub *dpsub) =20 zynqmp_dp_phy_exit(dp); zynqmp_dp_reset(dp, true); + mutex_destroy(&dp->lock); } --=20 2.35.1.1320.gc452695387.dirty