From nobody Sun Feb 8 04:35:25 2026 Received: from rtg-sunil-navi33.amd.com (unknown [165.204.156.251]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F2FE01B7F6 for ; Fri, 15 Mar 2024 12:13:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=165.204.156.251 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710504813; cv=none; b=dx+uS0Cq+NYt8/td/LhbjlWKRlWIgAftH34t/wzRn/TRknU93fyrOWyClJyRB1Dwm+fvsl5AZGDWsyei6zfqB0EucZVvMsu6aGRdoKcYIOJrZjLH5wu2r+TDr8279NK/VAEsu2wxZJyGkyZhQuTzu+FtJku9CO3JQQ/pVwwGMjA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710504813; c=relaxed/simple; bh=ChL5GpheItVSCs3jljAJjr/cxtujnaEIwTsNjiye2oE=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=B0Xpwh9RO9ncwIWLdBzrShUwM9zJbcCrCl/e1mxHTvIlaPJs5+wF+riUosQhba09kvEGMW/Lg4W+u8WFDhs41hdKIpHu9906azn3c8QhTPmqrjtn2EAWt4T1t0nCib4G/ONjTZ2ac6eD8iucNH6uUBoljGG+8GzzzprCtUymITo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=fail (p=quarantine dis=none) header.from=amd.com; spf=none smtp.mailfrom=rtg-sunil-navi33.amd.com; arc=none smtp.client-ip=165.204.156.251 Authentication-Results: smtp.subspace.kernel.org; dmarc=fail (p=quarantine dis=none) header.from=amd.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=rtg-sunil-navi33.amd.com Received: from rtg-sunil-navi33.amd.com (localhost [127.0.0.1]) by rtg-sunil-navi33.amd.com (8.15.2/8.15.2/Debian-22ubuntu3) with ESMTP id 42FCDHcQ406627; Fri, 15 Mar 2024 17:43:17 +0530 Received: (from sunil@localhost) by rtg-sunil-navi33.amd.com (8.15.2/8.15.2/Submit) id 42FCDGq3406620; Fri, 15 Mar 2024 17:43:16 +0530 From: Sunil Khatri To: Alex Deucher , =?UTF-8?q?Christian=20K=C3=B6nig?= , Shashank Sharma Cc: amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Sunil Khatri Subject: [PATCH] drm/amdgpu: add the hw_ip version of all IP's Date: Fri, 15 Mar 2024 17:43:15 +0530 Message-Id: <20240315121315.406601-1-sunil.khatri@amd.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add all the IP's version information on a SOC to the devcoredump. Signed-off-by: Sunil Khatri Reviewed-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c | 62 +++++++++++++++++++++++ 1 file changed, 62 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c b/drivers/gpu/drm/am= d/amdgpu/amdgpu_reset.c index a0dbccad2f53..3d4bfe0a5a7c 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c @@ -29,6 +29,43 @@ #include "sienna_cichlid.h" #include "smu_v13_0_10.h" =20 +const char *hw_ip_names[MAX_HWIP] =3D { + [GC_HWIP] =3D "GC", + [HDP_HWIP] =3D "HDP", + [SDMA0_HWIP] =3D "SDMA0", + [SDMA1_HWIP] =3D "SDMA1", + [SDMA2_HWIP] =3D "SDMA2", + [SDMA3_HWIP] =3D "SDMA3", + [SDMA4_HWIP] =3D "SDMA4", + [SDMA5_HWIP] =3D "SDMA5", + [SDMA6_HWIP] =3D "SDMA6", + [SDMA7_HWIP] =3D "SDMA7", + [LSDMA_HWIP] =3D "LSDMA", + [MMHUB_HWIP] =3D "MMHUB", + [ATHUB_HWIP] =3D "ATHUB", + [NBIO_HWIP] =3D "NBIO", + [MP0_HWIP] =3D "MP0", + [MP1_HWIP] =3D "MP1", + [UVD_HWIP] =3D "UVD/JPEG/VCN", + [VCN1_HWIP] =3D "VCN1", + [VCE_HWIP] =3D "VCE", + [VPE_HWIP] =3D "VPE", + [DF_HWIP] =3D "DF", + [DCE_HWIP] =3D "DCE", + [OSSSYS_HWIP] =3D "OSSSYS", + [SMUIO_HWIP] =3D "SMUIO", + [PWR_HWIP] =3D "PWR", + [NBIF_HWIP] =3D "NBIF", + [THM_HWIP] =3D "THM", + [CLK_HWIP] =3D "CLK", + [UMC_HWIP] =3D "UMC", + [RSMU_HWIP] =3D "RSMU", + [XGMI_HWIP] =3D "XGMI", + [DCI_HWIP] =3D "DCI", + [PCIE_HWIP] =3D "PCIE", +}; + + int amdgpu_reset_init(struct amdgpu_device *adev) { int ret =3D 0; @@ -196,6 +233,31 @@ amdgpu_devcoredump_read(char *buffer, loff_t offset, s= ize_t count, coredump->reset_task_info.process_name, coredump->reset_task_info.pid); =20 + /* GPU IP's information of the SOC */ + if (coredump->adev) { + + drm_printf(&p, "\nIP Information\n"); + drm_printf(&p, "SOC Family: %d\n", coredump->adev->family); + drm_printf(&p, "SOC Revision id: %d\n", coredump->adev->rev_id); + drm_printf(&p, "SOC External Revision id: %d\n", + coredump->adev->external_rev_id); + + for (int i =3D 1; i < MAX_HWIP; i++) { + for (int j =3D 0; j < HWIP_MAX_INSTANCE; j++) { + int ver =3D coredump->adev->ip_versions[i][j]; + + if (ver) + drm_printf(&p, "HWIP: %s[%d][%d]: v%d.%d.%d.%d.%d\n", + hw_ip_names[i], i, j, + IP_VERSION_MAJ(ver), + IP_VERSION_MIN(ver), + IP_VERSION_REV(ver), + IP_VERSION_VARIANT(ver), + IP_VERSION_SUBREV(ver)); + } + } + } + if (coredump->ring) { drm_printf(&p, "\nRing timed out details\n"); drm_printf(&p, "IP Type: %d Ring Name: %s\n", --=20 2.34.1