From nobody Mon Feb 9 23:57:50 2026 Received: from smtp-8fa9.mail.infomaniak.ch (smtp-8fa9.mail.infomaniak.ch [83.166.143.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B0D2F3BBE2 for ; Fri, 8 Mar 2024 15:46:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=83.166.143.169 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709912796; cv=none; b=jxgqGI5DKuOkekFdBpPohJn1d/irFQjfhmnJuzG9XEq9Zgbo6DZ895HyCKuiqNd8VlQ+oaV8yKX7Q2fKvZwH8fh++2mrubJAX75LHWLGqkn9slMBZ0Gxj7mGFu+Qs5o5HWg4PQGAvn4HuwDJA426gwf9mRMXL4kZ3IzydFXUqYY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709912796; c=relaxed/simple; bh=2lDcs35zMlrFWBoz1f+V+xz2jDVMtjyyAVMGf9MUILU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=lpNoK8/TURkSfKkJWcX2PRliDpdX8GGPLCbhL2qX7vLdeMPO5UQjid3uxCKEnwutNlSpihGTBJBdWQpk7fbxAjFhmuphsTo5NF9DGMpFh3xhw+wXQWwJEaPhoSt6iBMi+nUVoYy8OWR5AFvvxfqwsKScF49maWzXnuDA8RUwWTY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=0leil.net; spf=pass smtp.mailfrom=0leil.net; arc=none smtp.client-ip=83.166.143.169 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=0leil.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=0leil.net Received: from smtp-3-0000.mail.infomaniak.ch (smtp-3-0000.mail.infomaniak.ch [10.4.36.107]) by smtp-4-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4TrrBB2DqHz14Qt; Fri, 8 Mar 2024 16:46:26 +0100 (CET) Received: from unknown by smtp-3-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4TrrB9553Rzr7; Fri, 8 Mar 2024 16:46:25 +0100 (CET) From: Quentin Schulz Date: Fri, 08 Mar 2024 16:46:09 +0100 Subject: [PATCH v2 3/3] arm64: dts: rockchip: add regulators for PCIe on RK3399 Puma Haikou Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240308-puma-diode-pu-v2-3-309f83da110a@theobroma-systems.com> References: <20240308-puma-diode-pu-v2-0-309f83da110a@theobroma-systems.com> In-Reply-To: <20240308-puma-diode-pu-v2-0-309f83da110a@theobroma-systems.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: Klaus Goger , Quentin Schulz , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Quentin Schulz , Dragan Simic X-Mailer: b4 0.13.0 X-Infomaniak-Routing: alpha From: Quentin Schulz The PCIe PHY requires two regulators and are present on the SoM directly, while the PCIe connector also exposes 3V3 and 12V power rails which are available on the baseboard. Considering that 3/4 regulators are always-on on HW level and that the last one depends on a regulator from the PMIC that is specified as always on, this commit should be purely cosmetic and no change in behavior is expected. Let's add all regulators for PCIe on RK3399 Puma Haikou. Reviewed-by: Dragan Simic Signed-off-by: Quentin Schulz --- .../arm64/boot/dts/rockchip/rk3399-puma-haikou.dts | 2 ++ arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi | 26 ++++++++++++++++++= ++++ 2 files changed, 28 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts b/arch/arm= 64/boot/dts/rockchip/rk3399-puma-haikou.dts index 18a98c4648eae..66ebb148bbc9a 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts @@ -194,6 +194,8 @@ &pcie0 { num-lanes =3D <4>; pinctrl-names =3D "default"; pinctrl-0 =3D <&pcie_clkreqn_cpm>; + vpcie3v3-supply =3D <&vcc3v3_baseboard>; + vpcie12v-supply =3D <&dc_12v>; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi b/arch/arm64/boo= t/dts/rockchip/rk3399-puma.dtsi index 2484ad2bd86fc..ccbe3a7a1d2c2 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi @@ -79,6 +79,26 @@ vcc5v0_sys: vcc5v0-sys { regulator-max-microvolt =3D <5000000>; }; =20 + vcca_0v9: vcca-0v9-regulator { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcca_0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <900000>; + vin-supply =3D <&vcc_1v8>; + }; + + vcca_1v8: vcca-1v8-regulator { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcca_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + vin-supply =3D <&vcc3v3_sys>; + }; + vdd_log: vdd-log { compatible =3D "pwm-regulator"; pwms =3D <&pwm2 0 25000 1>; @@ -416,6 +436,12 @@ &io_domains { gpio1830-supply =3D <&vcc_1v8>; }; =20 +&pcie0 { + /* PCIe PHY supplies */ + vpcie0v9-supply =3D <&vcca_0v9>; + vpcie1v8-supply =3D <&vcca_1v8>; +}; + &pcie_clkreqn_cpm { rockchip,pins =3D <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>; --=20 2.44.0