From nobody Mon Feb 9 12:43:24 2026 Received: from smtp-bc09.mail.infomaniak.ch (smtp-bc09.mail.infomaniak.ch [45.157.188.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9DB2E1B812 for ; Fri, 8 Mar 2024 12:52:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.157.188.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709902348; cv=none; b=p/HT3PCeVg+gg0hTfmK/X/vDnK/kQHyoj6A3cDRvmg1o5N6vkG6exM3Pn84QISR3TwLI9omFJRAWrQ5Ujc662dMoINRFS9HRTRso7tRFUNMQjGmUx369FgMNt80c0c12xbTvN+XhCpfkkAJVfh3RaBitWW5AXKhm6kYss8/F0R0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709902348; c=relaxed/simple; bh=aqrD/Cge+/rUwjlnDV5JnmAzZubCbxI3etTc0cf5Xyk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=cNi4vj5/FnUMPM3HaxMroUd19wFM6Cue1EroImVpN5T3eWcyq3lNe/ZeSFK9fannJOY9C5vawqhJ3zRH9fjNQtCquIzf7BT70MwfThCusjbvaOjACGXa9X4Ruo9lUW3NSk9xS/YB5J5EFsJHiMWvpcgLIz9UxnkCo00YBCC66EE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=0leil.net; spf=pass smtp.mailfrom=0leil.net; arc=none smtp.client-ip=45.157.188.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=0leil.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=0leil.net Received: from smtp-3-0001.mail.infomaniak.ch (smtp-3-0001.mail.infomaniak.ch [10.4.36.108]) by smtp-4-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4TrmKD6D1tzmYw; Fri, 8 Mar 2024 13:52:16 +0100 (CET) Received: from unknown by smtp-3-0001.mail.infomaniak.ch (Postfix) with ESMTPA id 4TrmKD1rMbzMppDS; Fri, 8 Mar 2024 13:52:16 +0100 (CET) From: Quentin Schulz Date: Fri, 08 Mar 2024 13:52:09 +0100 Subject: [PATCH 2/3] arm64: dts: rockchip: enable internal pull-up on PCIE_WAKE# for RK3399 Puma Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240308-puma-diode-pu-v1-2-2b38457bcdc0@theobroma-systems.com> References: <20240308-puma-diode-pu-v1-0-2b38457bcdc0@theobroma-systems.com> In-Reply-To: <20240308-puma-diode-pu-v1-0-2b38457bcdc0@theobroma-systems.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: Klaus Goger , Quentin Schulz , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Quentin Schulz X-Mailer: b4 0.13.0 X-Infomaniak-Routing: alpha From: Quentin Schulz The PCIE_WAKE# has a diode used as a level-shifter, and is used as an input pin. The SoC default for this pin is a pull-up, which is correct but the pinconf in the introducing commit missed that, so let's fix this oversight. Fixes: 60fd9f72ce8a ("arm64: dts: rockchip: add Haikou baseboard with RK339= 9-Q7 SoM") Signed-off-by: Quentin Schulz --- arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi b/arch/arm64/boo= t/dts/rockchip/rk3399-puma.dtsi index a51ebb8f8b80f..2484ad2bd86fc 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi @@ -416,6 +416,11 @@ &io_domains { gpio1830-supply =3D <&vcc_1v8>; }; =20 +&pcie_clkreqn_cpm { + rockchip,pins =3D + <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>; +}; + &pinctrl { pinctrl-names =3D "default"; pinctrl-0 =3D <&q7_thermal_pin>; --=20 2.44.0