From nobody Mon Feb 9 01:50:28 2026 Received: from mail-lj1-f170.google.com (mail-lj1-f170.google.com [209.85.208.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2ADB96A343 for ; Fri, 1 Mar 2024 09:16:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.170 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709284577; cv=none; b=pAUsHdXvXy/appQOQflEJsldHnGr4BvsAfclgInVQ4JDJ7SsYv5SjrTxvaRj0q9BnS8VgmczbB6SHjrrLf5zPR21C691FTKzZvFaUjLVmLbVF7eC/meZe78XCy7J//eg7DP0UyZ+/WK9Q9ghzI3ntPPoXbvMeErxLD44v2aecp0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709284577; c=relaxed/simple; bh=Grv+B1lXOvsgkugd0xHmI2otveFzl/ke8dkw8ikngxA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=X92Rv+2IkoUOFMlb9w71qOTsebw3CBtCBRpUmLICOA03KB7soNncpxVnk7Vt0m4NxdSIzuvcDZfOxMiZmuzwtEzuWwXEzcfC8fsfmVlNrSouta/kvMv1HYQCY5/Wku+vW0vLDC43divOMN9sgorDr/O3wcijay4rqPqB19TWVtE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com; spf=pass smtp.mailfrom=rivosinc.com; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b=TWNV6pdP; arc=none smtp.client-ip=209.85.208.170 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b="TWNV6pdP" Received: by mail-lj1-f170.google.com with SMTP id 38308e7fff4ca-2d33986dbc0so4495381fa.2 for ; Fri, 01 Mar 2024 01:16:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1709284573; x=1709889373; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3HmYMQ4fCaWre3Z0n4nCWU3axYoW5M2HfRVImcv9VqU=; b=TWNV6pdPdxvfH8VBVvwLB3dvscvb5F81aqw46QHY+ITfLjvUuxg/vX5G40pctmYBBP kirkrV7tv91wbL3B+O1kRZGOM49L1kgAxRL6duDbsMMJaqig8UpqbuLfEeNPfsIDH61N q82Mt09CWMcjmPLQDWvQgmbFOhB67FdPyCgoF8SwJHPSkpG9Ja2Hu4bKC/y7RFcDsFYA QQonDP2P0iGC7c/Vxp3PojU6SpzIqDW47EZcJfIInEUCPV9fFWqQnxO+Gy8mxkaixlNH hxy7mvZwyDgAvkGZFz7xROiwU4x5mJBV1FrGVKLSgO8Tfk7GTKTgsmJzgKPnCInaV8uj sLlg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709284573; x=1709889373; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3HmYMQ4fCaWre3Z0n4nCWU3axYoW5M2HfRVImcv9VqU=; b=vKtE2qoS9/rf2bH2qxenJiTlYUm1CXMMmO+Qeb9qztCvA6soQCSzQEWoksOXCrpS6I PqhP86+cVK7PkbVgSpTz7QtQbxhUN/+qacChU4v9kfyLiPldpLYoAPsf/j0fQ9uqlFXX 8p8xPM+ZzWC3BAzRntMNDO6ayJpx6DPzpNruskN48d8fAInuZM93nh98jjMsOXTXAato InKpMBB4AaUG/W0mdJd1Ge/JaEawbQsyt/olSN9Ngo9mtgzQNd9LqMwECrgLZbXIJ984 yW+0JMNkg09dsb62CyQxFApPI+6s+HGL+rq1OgTAyZKpKgbUUk5ioeEE8mw2jQQY7drH KUEA== X-Forwarded-Encrypted: i=1; AJvYcCWplVYekc96ZFaFARt/pfjetckb3iXXmPfWZuL1UdebKGVPvlNbgyvKwCg6/gkh3c7SwPPgxwM6DfEQ1D82VrBvzJ3CmxvET1TjoRDx X-Gm-Message-State: AOJu0Yzse3JbQZr9TchNmDt9VcVOjjARDVbGcyYgIxnP05Lkcn3MahkA nFzzL1UNz3kd7YaXqdoCNBTE+YjKsJUKhbMv4g/0n8fbp8kTO9oeyBAsyhiDHp8= X-Google-Smtp-Source: AGHT+IHQVU7ZdAsKvA/XTSgIwwIMQlWsmY+5DOvluKjOjYHWuq3/2JdBJ53cUSY5g2ynNIYVyWu0Lg== X-Received: by 2002:a05:651c:10cf:b0:2d2:eb8c:b3a6 with SMTP id l15-20020a05651c10cf00b002d2eb8cb3a6mr619531ljn.40.1709284573125; Fri, 01 Mar 2024 01:16:13 -0800 (PST) Received: from alex-rivos.ba.rivosinc.com (amontpellier-656-1-456-62.w92-145.abo.wanadoo.fr. [92.145.124.62]) by smtp.gmail.com with ESMTPSA id m21-20020a7bcb95000000b00410b0ce91b1sm7777825wmi.25.2024.03.01.01.16.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Mar 2024 01:16:12 -0800 (PST) From: Alexandre Ghiti To: Catalin Marinas , Will Deacon , Ryan Roberts , Mark Rutland , Paul Walmsley , Palmer Dabbelt , Albert Ou , Andrew Morton , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-mm@kvack.org Cc: Alexandre Ghiti Subject: [PATCH 1/9] riscv: Restore the pfn in a NAPOT pte when manipulated by core mm code Date: Fri, 1 Mar 2024 10:14:47 +0100 Message-Id: <20240301091455.246686-2-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240301091455.246686-1-alexghiti@rivosinc.com> References: <20240301091455.246686-1-alexghiti@rivosinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The core mm code expects to be able to extract the pfn from a pte. NAPOT mappings work differently since its ptes actually point to the first pfn of the mapping, the other bits being used to encode the size of the mapping. So modify ptep_get() so that it returns a pte value that contains the *real* pfn (which is then different from what the HW expects) and right before storing the ptes to the page table, reset the pfn LSBs to the size of the mapping. And make sure that all NAPOT mappings are set using set_ptes(). Signed-off-by: Alexandre Ghiti Acked-by: Palmer Dabbelt --- arch/riscv/include/asm/pgtable-64.h | 11 +++ arch/riscv/include/asm/pgtable.h | 105 ++++++++++++++++++++++++++-- arch/riscv/mm/hugetlbpage.c | 38 +++++----- 3 files changed, 128 insertions(+), 26 deletions(-) diff --git a/arch/riscv/include/asm/pgtable-64.h b/arch/riscv/include/asm/p= gtable-64.h index b42017d76924..a0f76c3071a9 100644 --- a/arch/riscv/include/asm/pgtable-64.h +++ b/arch/riscv/include/asm/pgtable-64.h @@ -106,6 +106,17 @@ enum napot_cont_order { #define napot_cont_mask(order) (~(napot_cont_size(order) - 1UL)) #define napot_pte_num(order) BIT(order) =20 +static inline bool is_napot_order(unsigned int order) +{ + unsigned int napot_order; + + for_each_napot_order(napot_order) + if (order =3D=3D napot_order) + return true; + + return false; +} + #ifdef CONFIG_RISCV_ISA_SVNAPOT #define HUGE_MAX_HSTATE (2 + (NAPOT_ORDER_MAX - NAPOT_CONT_ORDER_BASE)) #else diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgta= ble.h index 0c94260b5d0c..951f3ceb5529 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -303,6 +303,8 @@ static inline unsigned long pte_napot(pte_t pte) return pte_val(pte) & _PAGE_NAPOT; } =20 +#define pte_valid_napot(pte) (pte_present(pte) && pte_napot(pte)) + static inline pte_t pte_mknapot(pte_t pte, unsigned int order) { int pos =3D order - 1 + _PAGE_PFN_SHIFT; @@ -312,6 +314,12 @@ static inline pte_t pte_mknapot(pte_t pte, unsigned in= t order) return __pte((pte_val(pte) & napot_mask) | napot_bit | _PAGE_NAPOT); } =20 +/* pte at entry must *not* encode the mapping size in the pfn LSBs. */ +static inline pte_t pte_clear_napot(pte_t pte) +{ + return __pte(pte_val(pte) & ~_PAGE_NAPOT); +} + #else =20 static __always_inline bool has_svnapot(void) { return false; } @@ -321,17 +329,14 @@ static inline unsigned long pte_napot(pte_t pte) return 0; } =20 +#define pte_valid_napot(pte) false + #endif /* CONFIG_RISCV_ISA_SVNAPOT */ =20 /* Yields the page frame number (PFN) of a page table entry */ static inline unsigned long pte_pfn(pte_t pte) { - unsigned long res =3D __page_val_to_pfn(pte_val(pte)); - - if (has_svnapot() && pte_napot(pte)) - res =3D res & (res - 1UL); - - return res; + return __page_val_to_pfn(pte_val(pte)); } =20 #define pte_page(x) pfn_to_page(pte_pfn(x)) @@ -523,9 +528,91 @@ static inline void __set_pte_at(pte_t *ptep, pte_t pte= val) set_pte(ptep, pteval); } =20 +#ifdef CONFIG_RISCV_ISA_SVNAPOT +static inline int arch_contpte_get_num_contig(pte_t *ptep, unsigned long s= ize, + size_t *pgsize) +{ + pte_t __pte; + + /* We must read the raw value of the pte to get the size of the mapping */ + __pte =3D READ_ONCE(*ptep); + + if (pgsize) { + if (size >=3D PGDIR_SIZE) + *pgsize =3D PGDIR_SIZE; + else if (size >=3D P4D_SIZE) + *pgsize =3D P4D_SIZE; + else if (size >=3D PUD_SIZE) + *pgsize =3D PUD_SIZE; + else if (size >=3D PMD_SIZE) + *pgsize =3D PMD_SIZE; + else + *pgsize =3D PAGE_SIZE; + } + + /* Make sure __pte is not a swap entry */ + if (pte_valid_napot(__pte)) + return napot_pte_num(napot_cont_order(__pte)); + + return 1; +} +#endif + +static inline pte_t ptep_get(pte_t *ptep) +{ + pte_t pte =3D READ_ONCE(*ptep); + +#ifdef CONFIG_RISCV_ISA_SVNAPOT + /* + * The pte we load has the N bit set and the size of the mapping in + * the pfn LSBs: keep the N bit and replace the mapping size with + * the *real* pfn since the core mm code expects to find it there. + * The mapping size will be reset just before being written to the + * page table in set_ptes(). + */ + if (unlikely(pte_valid_napot(pte))) { + unsigned int order =3D napot_cont_order(pte); + int pos =3D order - 1 + _PAGE_PFN_SHIFT; + unsigned long napot_mask =3D ~GENMASK(pos, _PAGE_PFN_SHIFT); + pte_t *orig_ptep =3D PTR_ALIGN_DOWN(ptep, sizeof(*ptep) * napot_pte_num(= order)); + + pte =3D __pte((pte_val(pte) & napot_mask) + ((ptep - orig_ptep) << _PAGE= _PFN_SHIFT)); + } +#endif + + return pte; +} +#define ptep_get ptep_get + static inline void set_ptes(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pteval, unsigned int nr) { +#ifdef CONFIG_RISCV_ISA_SVNAPOT + if (unlikely(pte_valid_napot(pteval))) { + unsigned int order =3D ilog2(nr); + + if (!is_napot_order(order)) { + /* + * Something's weird, we are given a NAPOT pte but the + * size of the mapping is not a known NAPOT mapping + * size, so clear the NAPOT bit and map this without + * NAPOT support: core mm only manipulates pte with the + * real pfn so we know the pte is valid without the N + * bit. + */ + pr_err("Incorrect NAPOT mapping, resetting.\n"); + pteval =3D pte_clear_napot(pteval); + } else { + /* + * NAPOT ptes that arrive here only have the N bit set + * and their pfn does not contain the mapping size, so + * set that here. + */ + pteval =3D pte_mknapot(pteval, order); + } + } +#endif + page_table_check_ptes_set(mm, ptep, pteval, nr); =20 for (;;) { @@ -533,6 +620,12 @@ static inline void set_ptes(struct mm_struct *mm, unsi= gned long addr, if (--nr =3D=3D 0) break; ptep++; + +#ifdef CONFIG_RISCV_ISA_SVNAPOT + if (unlikely(pte_valid_napot(pteval))) + continue; +#endif + pte_val(pteval) +=3D 1 << _PAGE_PFN_SHIFT; } } diff --git a/arch/riscv/mm/hugetlbpage.c b/arch/riscv/mm/hugetlbpage.c index 29c7606414d2..3d84fbc5c572 100644 --- a/arch/riscv/mm/hugetlbpage.c +++ b/arch/riscv/mm/hugetlbpage.c @@ -256,8 +256,7 @@ void set_huge_pte_at(struct mm_struct *mm, =20 clear_flush(mm, addr, ptep, pgsize, pte_num); =20 - for (i =3D 0; i < pte_num; i++, ptep++, addr +=3D pgsize) - set_pte_at(mm, addr, ptep, pte); + set_ptes(mm, addr, ptep, pte, pte_num); } =20 int huge_ptep_set_access_flags(struct vm_area_struct *vma, @@ -267,16 +266,16 @@ int huge_ptep_set_access_flags(struct vm_area_struct = *vma, int dirty) { struct mm_struct *mm =3D vma->vm_mm; - unsigned long order; + size_t pgsize; pte_t orig_pte; - int i, pte_num; + int pte_num; =20 if (!pte_napot(pte)) return ptep_set_access_flags(vma, addr, ptep, pte, dirty); =20 - order =3D napot_cont_order(pte); - pte_num =3D napot_pte_num(order); - ptep =3D huge_pte_offset(mm, addr, napot_cont_size(order)); + pte_num =3D arch_contpte_get_num_contig(ptep, 0, &pgsize); + ptep =3D huge_pte_offset(mm, addr, pte_num * pgsize); + orig_pte =3D get_clear_contig_flush(mm, addr, ptep, pte_num); =20 if (pte_dirty(orig_pte)) @@ -285,8 +284,7 @@ int huge_ptep_set_access_flags(struct vm_area_struct *v= ma, if (pte_young(orig_pte)) pte =3D pte_mkyoung(pte); =20 - for (i =3D 0; i < pte_num; i++, addr +=3D PAGE_SIZE, ptep++) - set_pte_at(mm, addr, ptep, pte); + set_ptes(mm, addr, ptep, pte, pte_num); =20 return true; } @@ -301,7 +299,7 @@ pte_t huge_ptep_get_and_clear(struct mm_struct *mm, if (!pte_napot(orig_pte)) return ptep_get_and_clear(mm, addr, ptep); =20 - pte_num =3D napot_pte_num(napot_cont_order(orig_pte)); + pte_num =3D arch_contpte_get_num_contig(ptep, 0, NULL); =20 return get_clear_contig(mm, addr, ptep, pte_num); } @@ -311,24 +309,23 @@ void huge_ptep_set_wrprotect(struct mm_struct *mm, pte_t *ptep) { pte_t pte =3D ptep_get(ptep); - unsigned long order; + size_t pgsize; pte_t orig_pte; - int i, pte_num; + int pte_num; =20 if (!pte_napot(pte)) { ptep_set_wrprotect(mm, addr, ptep); return; } =20 - order =3D napot_cont_order(pte); - pte_num =3D napot_pte_num(order); - ptep =3D huge_pte_offset(mm, addr, napot_cont_size(order)); + pte_num =3D arch_contpte_get_num_contig(ptep, 0, &pgsize); + ptep =3D huge_pte_offset(mm, addr, pte_num * pgsize); + orig_pte =3D get_clear_contig_flush(mm, addr, ptep, pte_num); =20 orig_pte =3D pte_wrprotect(orig_pte); =20 - for (i =3D 0; i < pte_num; i++, addr +=3D PAGE_SIZE, ptep++) - set_pte_at(mm, addr, ptep, orig_pte); + set_ptes(mm, addr, ptep, orig_pte, pte_num); } =20 pte_t huge_ptep_clear_flush(struct vm_area_struct *vma, @@ -341,7 +338,7 @@ pte_t huge_ptep_clear_flush(struct vm_area_struct *vma, if (!pte_napot(pte)) return ptep_clear_flush(vma, addr, ptep); =20 - pte_num =3D napot_pte_num(napot_cont_order(pte)); + pte_num =3D arch_contpte_get_num_contig(ptep, 0, NULL); =20 return get_clear_contig_flush(vma->vm_mm, addr, ptep, pte_num); } @@ -351,6 +348,7 @@ void huge_pte_clear(struct mm_struct *mm, pte_t *ptep, unsigned long sz) { + size_t pgsize; pte_t pte =3D ptep_get(ptep); int i, pte_num; =20 @@ -359,8 +357,8 @@ void huge_pte_clear(struct mm_struct *mm, return; } =20 - pte_num =3D napot_pte_num(napot_cont_order(pte)); - for (i =3D 0; i < pte_num; i++, addr +=3D PAGE_SIZE, ptep++) + pte_num =3D arch_contpte_get_num_contig(ptep, 0, &pgsize); + for (i =3D 0; i < pte_num; i++, addr +=3D pgsize, ptep++) pte_clear(mm, addr, ptep); } =20 --=20 2.39.2 From nobody Mon Feb 9 01:50:28 2026 Received: from mail-wm1-f52.google.com (mail-wm1-f52.google.com [209.85.128.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E23926A32B for ; Fri, 1 Mar 2024 09:17:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709284637; cv=none; b=FVf3TPV75fNtktcWW3uKRXKEHBt+fkxI9XkZqqUEwL8GadUl7UPjGnA8RlMeKGkdh4vEEbXDZjLT8vH0lTI32WizyRVRQvIp793lDrtkbLBWpiKLBqGOfVNzyl2CyuWzSe+vFRVDlGV6J3mNYuhHxKmb7/mZptDgygsWhFYNiOQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709284637; c=relaxed/simple; bh=fuD7xzNQmvbDUfKc84q5eANZ/OlUzjddCa7IPcGLM+Q=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=A7gdKBmoTEDstWPNNzb3/EbR/tCrqhA706RINdwmklR6mEw4WVlgb84xawihLjAGn0tUfM88UhR0uI5smxQAAoVozBPlrOKSVDYwtN8YT8iouVHlNYPdfhgVVEaEcc/59cY1l/veCv/aL3UOr+G90q9N8BgKhvs4gkqkR5tBCXY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com; spf=pass smtp.mailfrom=rivosinc.com; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b=D88vBHfu; arc=none smtp.client-ip=209.85.128.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b="D88vBHfu" Received: by mail-wm1-f52.google.com with SMTP id 5b1f17b1804b1-412c3f4c6b9so5408265e9.0 for ; Fri, 01 Mar 2024 01:17:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1709284634; x=1709889434; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=celeezlUFfnCgdabriQL+vY9x87nEUlib9jbsT9nzg0=; b=D88vBHfuqkU82KVn1HZ6QnjU7/+Qr0plRkucMAzTdrRDPeTHInZEZ4lou5fdl+6UVS PGGbFQx614obSDwJTuxuiYv2ejwBhLWyHgyidPHdj8Te+rcIqTSTFhyGEXCroa9x/e9u 3VJrHcT/tegbFcjEGWZNRqBXp7mAXx0uYu1vqOxKv+aKmrx05TuLhfgK7aB+6gMVk/nV xqNh8AFZAP9SvSdBk8y3hQxvgP8RFGUYDSFUGhfDVqUeEHp8+XoGtDL9FeUyDFbl+4/5 yl3yO0cq/zhQcscPNoWJfkZvURqsoOa22qPf/B1UrwQgHIH64H7vVtEucnL2SY9VgyCi N7fw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709284634; x=1709889434; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=celeezlUFfnCgdabriQL+vY9x87nEUlib9jbsT9nzg0=; b=QrHQLe/jE/cS9jts/ANrVJlxPYNx1aUcP601HoBkw9H7yiYkyG3Y3UHG0UhScIUanU Rt3rlzQFya1+CreQKeqRf3A+yGyZMdnITMRiHEhXU6LX1hyD4HY8wTekMOpP/QelsrYF dgcA35UJAz964IxYxAyFm+6WNA2XwnNITUIroblzzTAk4HhoKx1HOfQs9FWsX5r6rEeg vdMxjzsh+NaQ9ZMiPt3LY6pK0K/3S9YdXY2ibDjb7q7v1e7Yhu8eLt1Szv6dmIYbo3az Yr1hoM8NFfzCQtJihMuoGT0xAy/qeOfx3HjmDUFbp8CoIYKfoTxtkJjS6f1QPkD1L/6I 3DnQ== X-Forwarded-Encrypted: i=1; AJvYcCXpFCbXno4xeXax518+uWSPsxdWFMgHrqJ1xCuSf0DHRC9ugTbb9Dnnu7UFDYyhd39Fq02XewHeaknY8h7Y07w4hfC82ca5odfSFLsW X-Gm-Message-State: AOJu0Yy1R4xj0y/PSWTavc/Pt/K/Wgs5mREBkwFxiegZOOkkS0UNy8N4 oD1Rj+d+nFf06fhTN8dApSGBB1HZHVTUE/TH61ZAh84+F/plbQK0hv7owIXNLaU= X-Google-Smtp-Source: AGHT+IFB0pFFxU/+IPg3Lb+DpLxmFSKXoGv4IrPSAZpcxiUzICaAY8iLg+9vVvkiiGxUNIP5Ue4QKg== X-Received: by 2002:a05:600c:3b26:b0:412:c810:fd18 with SMTP id m38-20020a05600c3b2600b00412c810fd18mr995837wms.18.1709284634158; Fri, 01 Mar 2024 01:17:14 -0800 (PST) Received: from alex-rivos.ba.rivosinc.com (amontpellier-656-1-456-62.w92-145.abo.wanadoo.fr. [92.145.124.62]) by smtp.gmail.com with ESMTPSA id l33-20020a05600c1d2100b00412ca88537dsm358022wms.0.2024.03.01.01.17.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Mar 2024 01:17:13 -0800 (PST) From: Alexandre Ghiti To: Catalin Marinas , Will Deacon , Ryan Roberts , Mark Rutland , Paul Walmsley , Palmer Dabbelt , Albert Ou , Andrew Morton , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-mm@kvack.org Cc: Alexandre Ghiti Subject: [PATCH 2/9] riscv: Safely remove huge_pte_offset() when manipulating NAPOT ptes Date: Fri, 1 Mar 2024 10:14:48 +0100 Message-Id: <20240301091455.246686-3-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240301091455.246686-1-alexghiti@rivosinc.com> References: <20240301091455.246686-1-alexghiti@rivosinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The pte_t pointer is expected to point to the first entry of the NAPOT mapping so no need to use huge_pte_offset(), similarly to what is done in arm64. Signed-off-by: Alexandre Ghiti Acked-by: Palmer Dabbelt --- arch/riscv/mm/hugetlbpage.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/arch/riscv/mm/hugetlbpage.c b/arch/riscv/mm/hugetlbpage.c index 3d84fbc5c572..2477d20c1497 100644 --- a/arch/riscv/mm/hugetlbpage.c +++ b/arch/riscv/mm/hugetlbpage.c @@ -274,7 +274,6 @@ int huge_ptep_set_access_flags(struct vm_area_struct *v= ma, return ptep_set_access_flags(vma, addr, ptep, pte, dirty); =20 pte_num =3D arch_contpte_get_num_contig(ptep, 0, &pgsize); - ptep =3D huge_pte_offset(mm, addr, pte_num * pgsize); =20 orig_pte =3D get_clear_contig_flush(mm, addr, ptep, pte_num); =20 @@ -319,10 +318,8 @@ void huge_ptep_set_wrprotect(struct mm_struct *mm, } =20 pte_num =3D arch_contpte_get_num_contig(ptep, 0, &pgsize); - ptep =3D huge_pte_offset(mm, addr, pte_num * pgsize); =20 orig_pte =3D get_clear_contig_flush(mm, addr, ptep, pte_num); - orig_pte =3D pte_wrprotect(orig_pte); =20 set_ptes(mm, addr, ptep, orig_pte, pte_num); --=20 2.39.2 From nobody Mon Feb 9 01:50:28 2026 Received: from mail-lj1-f175.google.com (mail-lj1-f175.google.com [209.85.208.175]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 197666A014 for ; Fri, 1 Mar 2024 09:18:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.175 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709284699; cv=none; b=JN52nfzXtVWcb0dDoq2aHuZje+5nDu7Ux6xDtSwgigcBzf55tLZ02PKNS5P7C4pxT8R8x1MjYPcKuUjy6pVO6gKF27TxfoU8nk+XtSssoIYlsAV5P0J4hgELz617KPzC4pvZWeTuEYzNhfcbskOjNps+57/BPxYHUoDdnVCwdXw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709284699; c=relaxed/simple; bh=l7/QK0Td6iMIdSgS71BBF/zg1i+GlAsTZZtUi/hBDc4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=QQnoM8qq6VoPQ+axCGMGy9d62pAj0FIhPV3/Kt+4ajgSwdSIilYI7CyYcwvg8gWtPSz+PMP+Hu2bXoo5YfAfVgmGnJhIIk7UCW0kSoWKH0Mlujyp1kvm2ieR9200AzspIsf6LKOpkVQHZyZxu2QkOsuxxhPomiKMgBDuazwL0/I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com; spf=pass smtp.mailfrom=rivosinc.com; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b=J7wwGyTD; arc=none smtp.client-ip=209.85.208.175 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b="J7wwGyTD" Received: by mail-lj1-f175.google.com with SMTP id 38308e7fff4ca-2d2ab9c5e83so19371731fa.2 for ; Fri, 01 Mar 2024 01:18:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1709284695; x=1709889495; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=f1tNyFTcsXe5j/Xz9tdKUfPkAneqDazbYHB6YPwtZWk=; b=J7wwGyTDEb8OPiPO4+X8cBztwaMmPYh7BVnvbzrIYGTJG5u15Jwf26VT9+PdV/lqQC wsO1e4PEe6xd9OEr7nznOJBH8HO3Fgx6JSlfQ5Y+Tk0Fps/FceUVwlyS0ejTkEf7n5Ox umt7w1nzubpNr5z7m/VqKFYgdHo2+v0l8LNRvyg/axcB3F3XBq0eUpm9PRsDZvHTXbLN 1OMfhSqD/7zYF57CH/Lj8kwBFpihnloEeNupsPTjLThEUqmZBsGXtGxSgGOTrUognpr9 Vl9TIkFuNhmUS5ew/+qILYN22cEmlO0mqJEue9YK80XdgRjCJAK9Tvgx+fiH1R04A6je wU7g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709284695; x=1709889495; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=f1tNyFTcsXe5j/Xz9tdKUfPkAneqDazbYHB6YPwtZWk=; b=ELa8f6Jlq692K3cPR4LzCiFnmibJMovoWuKD/kexVKByLJ4CYsiV/jLuPQLKdeCiYM RfDboA2OvOgtF4oa30GEKTxckMZTB/5cWda1Nu38WWGF5afTwzt8Gxhs+HXSOSDA83gI LDvUolhXk023FYOsWjb6g5H4q5ldbbjEotIE1yenFA6IADj0uYSgOEEe/MgFBFSr41Yq nrnCVj5rl3l5PzEs++31GK4TjoP1CPn/4C3yERNxqadC0jXu2kF2ufxt1YvdQVM/PHUP WFvdudxoO/0CbhllLG3x/a+NlORyAE/mNReqbz8iItuUewKQDfgoOEF/xWeymWyqAtif J0fg== X-Forwarded-Encrypted: i=1; AJvYcCW6rqj96W8FgM32VVGDHKYftRmVjR3d53siT9qsJEy4Re+mDv2irl+PqrTjHgJlBhDtQT4mjENn58i+7UQHVm4Ks/TtyxllRRpdPy9w X-Gm-Message-State: AOJu0Yz5vtWqcVmnKtWuyBapv7irAx8HWIaUByQ0Q6tYx0LfScDtdeaV UytqhcbJ5lzTTj+HpDGH2x2k0iuqfWjK8HgNHiOq0Tx+F9qSfkkw60pmPSqFi7E= X-Google-Smtp-Source: AGHT+IGpqFyv1mrLhJ3nW6qi9rLC4OBLYLmhrJ+wNsqKGTezYuRrvThKSI3wD+ZkJxl8NSkgNWNgvg== X-Received: by 2002:a05:651c:b1e:b0:2d2:cb34:2e0c with SMTP id b30-20020a05651c0b1e00b002d2cb342e0cmr1088079ljr.10.1709284695243; Fri, 01 Mar 2024 01:18:15 -0800 (PST) Received: from alex-rivos.ba.rivosinc.com (amontpellier-656-1-456-62.w92-145.abo.wanadoo.fr. [92.145.124.62]) by smtp.gmail.com with ESMTPSA id m20-20020a7bca54000000b0041290251dc2sm7744159wml.14.2024.03.01.01.18.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Mar 2024 01:18:14 -0800 (PST) From: Alexandre Ghiti To: Catalin Marinas , Will Deacon , Ryan Roberts , Mark Rutland , Paul Walmsley , Palmer Dabbelt , Albert Ou , Andrew Morton , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-mm@kvack.org Cc: Alexandre Ghiti Subject: [PATCH 3/9] mm: Use common huge_ptep_get() function for riscv/arm64 Date: Fri, 1 Mar 2024 10:14:49 +0100 Message-Id: <20240301091455.246686-4-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240301091455.246686-1-alexghiti@rivosinc.com> References: <20240301091455.246686-1-alexghiti@rivosinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" For that, we need to introduce: - a new config: ARCH_HAS_CONTPTE, - a new arch specific function which returns the number of contiguous PTE in a mapping and its base page size, - a pte_cont() helper, only introduced for riscv since we keep the arm64 naming (contpte) which is more explicit than the riscv's (napot). Signed-off-by: Alexandre Ghiti Acked-by: Palmer Dabbelt --- arch/arm64/Kconfig | 1 + arch/arm64/include/asm/pgtable.h | 31 ++++++++++++++++++ arch/arm64/mm/hugetlbpage.c | 55 ++------------------------------ arch/riscv/Kconfig | 1 + arch/riscv/include/asm/hugetlb.h | 2 +- arch/riscv/include/asm/pgtable.h | 1 + arch/riscv/mm/hugetlbpage.c | 24 -------------- mm/Kconfig | 3 ++ mm/Makefile | 1 + mm/contpte.c | 45 ++++++++++++++++++++++++++ 10 files changed, 86 insertions(+), 78 deletions(-) create mode 100644 mm/contpte.c diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index aa7c1d435139..5e6bd49169d7 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -20,6 +20,7 @@ config ARM64 select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2 select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE select ARCH_HAS_CACHE_LINE_SIZE + select ARCH_HAS_CONTPTE select ARCH_HAS_CURRENT_STACK_POINTER select ARCH_HAS_DEBUG_VIRTUAL select ARCH_HAS_DEBUG_VM_PGTABLE diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgta= ble.h index 79ce70fbb751..3003a10547de 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -1124,6 +1124,37 @@ extern pte_t ptep_modify_prot_start(struct vm_area_s= truct *vma, extern void ptep_modify_prot_commit(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep, pte_t old_pte, pte_t new_pte); + +static inline int arch_contpte_get_num_contig(pte_t *ptep, unsigned long s= ize, + size_t *pgsize) +{ + int contig_ptes =3D 0; + + *pgsize =3D size; + + switch (size) { +#ifndef __PAGETABLE_PMD_FOLDED + case PUD_SIZE: + if (pud_sect_supported()) + contig_ptes =3D 1; + break; +#endif + case PMD_SIZE: + contig_ptes =3D 1; + break; + case CONT_PMD_SIZE: + *pgsize =3D PMD_SIZE; + contig_ptes =3D CONT_PMDS; + break; + case CONT_PTE_SIZE: + *pgsize =3D PAGE_SIZE; + contig_ptes =3D CONT_PTES; + break; + } + + return contig_ptes; +} + #endif /* !__ASSEMBLY__ */ =20 #endif /* __ASM_PGTABLE_H */ diff --git a/arch/arm64/mm/hugetlbpage.c b/arch/arm64/mm/hugetlbpage.c index 8116ac599f80..6b61714d7726 100644 --- a/arch/arm64/mm/hugetlbpage.c +++ b/arch/arm64/mm/hugetlbpage.c @@ -119,57 +119,6 @@ static int find_num_contig(struct mm_struct *mm, unsig= ned long addr, return CONT_PTES; } =20 -static inline int num_contig_ptes(unsigned long size, size_t *pgsize) -{ - int contig_ptes =3D 0; - - *pgsize =3D size; - - switch (size) { -#ifndef __PAGETABLE_PMD_FOLDED - case PUD_SIZE: - if (pud_sect_supported()) - contig_ptes =3D 1; - break; -#endif - case PMD_SIZE: - contig_ptes =3D 1; - break; - case CONT_PMD_SIZE: - *pgsize =3D PMD_SIZE; - contig_ptes =3D CONT_PMDS; - break; - case CONT_PTE_SIZE: - *pgsize =3D PAGE_SIZE; - contig_ptes =3D CONT_PTES; - break; - } - - return contig_ptes; -} - -pte_t huge_ptep_get(pte_t *ptep) -{ - int ncontig, i; - size_t pgsize; - pte_t orig_pte =3D ptep_get(ptep); - - if (!pte_present(orig_pte) || !pte_cont(orig_pte)) - return orig_pte; - - ncontig =3D num_contig_ptes(page_size(pte_page(orig_pte)), &pgsize); - for (i =3D 0; i < ncontig; i++, ptep++) { - pte_t pte =3D ptep_get(ptep); - - if (pte_dirty(pte)) - orig_pte =3D pte_mkdirty(orig_pte); - - if (pte_young(pte)) - orig_pte =3D pte_mkyoung(orig_pte); - } - return orig_pte; -} - /* * Changing some bits of contiguous entries requires us to follow a * Break-Before-Make approach, breaking the whole contiguous set @@ -250,7 +199,7 @@ void set_huge_pte_at(struct mm_struct *mm, unsigned lon= g addr, unsigned long pfn, dpfn; pgprot_t hugeprot; =20 - ncontig =3D num_contig_ptes(sz, &pgsize); + ncontig =3D arch_contpte_get_num_contig(ptep, sz, &pgsize); =20 if (!pte_present(pte)) { for (i =3D 0; i < ncontig; i++, ptep++, addr +=3D pgsize) @@ -397,7 +346,7 @@ void huge_pte_clear(struct mm_struct *mm, unsigned long= addr, int i, ncontig; size_t pgsize; =20 - ncontig =3D num_contig_ptes(sz, &pgsize); + ncontig =3D arch_contpte_get_num_contig(NULL, sz, &pgsize); =20 for (i =3D 0; i < ncontig; i++, addr +=3D pgsize, ptep++) pte_clear(mm, addr, ptep); diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index dba28a756e63..121183768d1a 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -19,6 +19,7 @@ config RISCV select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2 select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE select ARCH_HAS_BINFMT_FLAT + select ARCH_HAS_CONTPTE if RISCV_ISA_SVNAPOT select ARCH_HAS_CURRENT_STACK_POINTER select ARCH_HAS_DEBUG_VIRTUAL if MMU select ARCH_HAS_DEBUG_VM_PGTABLE diff --git a/arch/riscv/include/asm/hugetlb.h b/arch/riscv/include/asm/huge= tlb.h index 20f9c3ba2341..a431a0c0e0fa 100644 --- a/arch/riscv/include/asm/hugetlb.h +++ b/arch/riscv/include/asm/hugetlb.h @@ -47,7 +47,7 @@ pte_t huge_ptep_get(pte_t *ptep); pte_t arch_make_huge_pte(pte_t entry, unsigned int shift, vm_flags_t flags= ); #define arch_make_huge_pte arch_make_huge_pte =20 -#endif /*CONFIG_RISCV_ISA_SVNAPOT*/ +#endif /* CONFIG_RISCV_ISA_SVNAPOT */ =20 #include =20 diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgta= ble.h index 951f3ceb5529..ddff4a56e12d 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -302,6 +302,7 @@ static inline unsigned long pte_napot(pte_t pte) { return pte_val(pte) & _PAGE_NAPOT; } +#define pte_cont pte_napot =20 #define pte_valid_napot(pte) (pte_present(pte) && pte_napot(pte)) =20 diff --git a/arch/riscv/mm/hugetlbpage.c b/arch/riscv/mm/hugetlbpage.c index 2477d20c1497..51ec80cf2028 100644 --- a/arch/riscv/mm/hugetlbpage.c +++ b/arch/riscv/mm/hugetlbpage.c @@ -3,30 +3,6 @@ #include =20 #ifdef CONFIG_RISCV_ISA_SVNAPOT -pte_t huge_ptep_get(pte_t *ptep) -{ - unsigned long pte_num; - int i; - pte_t orig_pte =3D ptep_get(ptep); - - if (!pte_present(orig_pte) || !pte_napot(orig_pte)) - return orig_pte; - - pte_num =3D napot_pte_num(napot_cont_order(orig_pte)); - - for (i =3D 0; i < pte_num; i++, ptep++) { - pte_t pte =3D ptep_get(ptep); - - if (pte_dirty(pte)) - orig_pte =3D pte_mkdirty(orig_pte); - - if (pte_young(pte)) - orig_pte =3D pte_mkyoung(orig_pte); - } - - return orig_pte; -} - pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma, unsigned long addr, diff --git a/mm/Kconfig b/mm/Kconfig index ffc3a2ba3a8c..71d92e6c50d9 100644 --- a/mm/Kconfig +++ b/mm/Kconfig @@ -1001,6 +1001,9 @@ config IDLE_PAGE_TRACKING config ARCH_HAS_CACHE_LINE_SIZE bool =20 +config ARCH_HAS_CONTPTE + bool + config ARCH_HAS_CURRENT_STACK_POINTER bool help diff --git a/mm/Makefile b/mm/Makefile index e4b5b75aaec9..d5aa9326fc80 100644 --- a/mm/Makefile +++ b/mm/Makefile @@ -90,6 +90,7 @@ obj-$(CONFIG_MIGRATION) +=3D migrate.o obj-$(CONFIG_NUMA) +=3D memory-tiers.o obj-$(CONFIG_DEVICE_MIGRATION) +=3D migrate_device.o obj-$(CONFIG_TRANSPARENT_HUGEPAGE) +=3D huge_memory.o khugepaged.o +obj-$(CONFIG_ARCH_HAS_CONTPTE) +=3D contpte.o obj-$(CONFIG_PAGE_COUNTER) +=3D page_counter.o obj-$(CONFIG_MEMCG) +=3D memcontrol.o vmpressure.o ifdef CONFIG_SWAP diff --git a/mm/contpte.c b/mm/contpte.c new file mode 100644 index 000000000000..c3f4b8039b19 --- /dev/null +++ b/mm/contpte.c @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2024 Rivos Inc. + */ + +#include +#include +#include + +/* + * Any arch that wants to use that needs to define: + * * contpte macros + * - pte_cont() + * - arch_contpte_get_num_contig() + */ + +/* + * This file implements the following contpte aware API: + * huge_ptep_get() + */ + +pte_t huge_ptep_get(pte_t *ptep) +{ + int ncontig, i; + size_t pgsize; + pte_t orig_pte =3D ptep_get(ptep); + + if (!pte_present(orig_pte) || !pte_cont(orig_pte)) + return orig_pte; + + ncontig =3D arch_contpte_get_num_contig(ptep, + page_size(pte_page(orig_pte)), + &pgsize); + + for (i =3D 0; i < ncontig; i++, ptep++) { + pte_t pte =3D ptep_get(ptep); + + if (pte_dirty(pte)) + orig_pte =3D pte_mkdirty(orig_pte); + + if (pte_young(pte)) + orig_pte =3D pte_mkyoung(orig_pte); + } + return orig_pte; +} --=20 2.39.2 From nobody Mon Feb 9 01:50:28 2026 Received: from mail-wm1-f43.google.com (mail-wm1-f43.google.com [209.85.128.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 222566A333 for ; Fri, 1 Mar 2024 09:19:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.43 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709284760; cv=none; b=Wqy9UvGZLMcxWTv1MD4O7VbgmYx9zzfto2qYJUw3XWzAFBq/klSoYNQewLuldeYpx12HDoin8cHFGBwEVcC7X5amaPzw2+ZoosE/QHSIPSxhSSD3M3s90SXd6QtB/k3RbNsMEEPJn1LRYJO22th8DEZtkPa3qNDe9LFEZ2qGFLE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709284760; c=relaxed/simple; bh=TPDvPyDeHRlzYsRpYqIX0Abk+DqhasToPlBHcS6Cx1w=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=THoz/ApxMaO9ymrkTIPQRUBBDTVswZTrcUSq3fX4IJUy11ezvz9JZi//3D9rrCcGkqshyl/DFo0k5xVX4xUSWPAycAa3Mkjkk4/IvvXUw+GnkYiN+eFDkFhWA44NqLoOBLWNfFbVpHtaCvw1buJnkzKiqgNAodFlKSvw7L5256A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com; spf=pass smtp.mailfrom=rivosinc.com; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b=ejflXW0a; arc=none smtp.client-ip=209.85.128.43 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b="ejflXW0a" Received: by mail-wm1-f43.google.com with SMTP id 5b1f17b1804b1-412bb23e5c5so10024395e9.1 for ; Fri, 01 Mar 2024 01:19:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1709284756; x=1709889556; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mB8cpSFUHI2v28tFlR/YUHSb5lk45+n/9IYk3vd50wk=; b=ejflXW0aDakpiYCc9zCVhjuOgN1tIUIrY6Hpho7reJ995j1en7MED3b9huiuoFhqYY yHDfqLnp58s1uVUzhtfnJcAQX3cy/tA0SiFicwFFYy4XS1WKM5Ekv5arWS6nvgHocvHy TMRzhY75a26u22YhA0IXzKMKTGMIokolvt/wHQuMmniQ5KwFBtsAl16cDn+bO1KV5yQC IMRgxunwLY/8Ew6qSbUSZFtgzo+vFbGKyMe4zAZOV/3FaMzJ5oTR2pFG7o54gZIsds97 pO8KJrhC36tjHqO0wtuZnw+LtJPRsu+bS7ubGz0wlvMYk+tV6K9Phb899yvHMgjF0SgD B6Ng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709284756; x=1709889556; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mB8cpSFUHI2v28tFlR/YUHSb5lk45+n/9IYk3vd50wk=; b=ADByS+jmxHtmAnmf0h/yMPvuWgHMQWz+qKv2M9OCB/wiOqrkUMT9W1kWuiNzxwHLXY R6Z5wnMEc/ixlouV/2Rw/EZV6DjwmVJXDXqbgVBZR0DnK4U7cVThaU9c92ak4NJpx2z4 +KfLq/skcIEkn1JpAj+HNvrRKHBlavzHn3CRt7GarmRT+vt0MzncQFLKY5TpBZWdVZlu +W4tmi0b1eDoraX+Vq98u4Qki6J9V8ctXSXERA59FSsjfP8HDmfA6qddCvZ7qoEJ1A4l wTNkXSKl3BL/WSXzQnXYweYIlUKOE9mVXSjisrKdGXoABr2Z/J8rvYnwRI1RgJK1fZYj eB0A== X-Forwarded-Encrypted: i=1; AJvYcCUHhtu93ZxmQokc/g0SALx9bubSCS2Q5kxJQSg5EqX9eazhkNv0y1/Usk6NiEBKR4L9mgSwIlRAdbvsv9Ki2izNevtiDglnWawHgOZn X-Gm-Message-State: AOJu0YzyBdqKILKzdDMuPi6oJIKlP8mYYtSkb8AFbo0ptlMk+k7rDmri /AncnH8+8LKh6qG0LmFGPcCfmdCD8HMA28v9MoAdu7lqD5QwPTB0/TiYzk7SUVM= X-Google-Smtp-Source: AGHT+IHpEyM7pTJk28YugLtMmnzHnlZqFOrfhIPrp2GM/yv98BwZmlX0jtBa8/Iqo86IkfuCuT/7uw== X-Received: by 2002:adf:9dca:0:b0:33e:1a3f:44b4 with SMTP id q10-20020adf9dca000000b0033e1a3f44b4mr1239957wre.26.1709284756335; Fri, 01 Mar 2024 01:19:16 -0800 (PST) Received: from alex-rivos.ba.rivosinc.com (amontpellier-656-1-456-62.w92-145.abo.wanadoo.fr. [92.145.124.62]) by smtp.gmail.com with ESMTPSA id bv16-20020a0560001f1000b0033e0523b829sm4144440wrb.13.2024.03.01.01.19.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Mar 2024 01:19:16 -0800 (PST) From: Alexandre Ghiti To: Catalin Marinas , Will Deacon , Ryan Roberts , Mark Rutland , Paul Walmsley , Palmer Dabbelt , Albert Ou , Andrew Morton , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-mm@kvack.org Cc: Alexandre Ghiti Subject: [PATCH 4/9] mm: Use common set_huge_pte_at() function for riscv/arm64 Date: Fri, 1 Mar 2024 10:14:50 +0100 Message-Id: <20240301091455.246686-5-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240301091455.246686-1-alexghiti@rivosinc.com> References: <20240301091455.246686-1-alexghiti@rivosinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" After some adjustments, both architectures have the same implementation so move it to generic code. Signed-off-by: Alexandre Ghiti Acked-by: Palmer Dabbelt --- arch/arm64/include/asm/pgtable.h | 16 ++++++--- arch/arm64/mm/hugetlbpage.c | 56 ----------------------------- arch/riscv/include/asm/pgtable.h | 26 ++++++++++---- arch/riscv/mm/hugetlbpage.c | 62 -------------------------------- mm/contpte.c | 58 ++++++++++++++++++++++++++++++ 5 files changed, 88 insertions(+), 130 deletions(-) diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgta= ble.h index 3003a10547de..437e9638b2b9 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -341,9 +341,10 @@ static inline void __sync_cache_and_tags(pte_t pte, un= signed int nr_pages) mte_sync_tags(pte, nr_pages); } =20 -static inline void set_ptes(struct mm_struct *mm, - unsigned long __always_unused addr, - pte_t *ptep, pte_t pte, unsigned int nr) +static inline void __set_ptes(struct mm_struct *mm, + unsigned long __always_unused addr, + pte_t *ptep, pte_t pte, unsigned int nr, + unsigned long pgsize) { page_table_check_ptes_set(mm, ptep, pte, nr); __sync_cache_and_tags(pte, nr); @@ -354,10 +355,15 @@ static inline void set_ptes(struct mm_struct *mm, if (--nr =3D=3D 0) break; ptep++; - pte_val(pte) +=3D PAGE_SIZE; + pte_val(pte) +=3D pgsize; } } -#define set_ptes set_ptes + +#define set_ptes(mm, addr, ptep, pte, nr) \ + __set_ptes(mm, addr, ptep, pte, nr, PAGE_SIZE) + +#define set_contptes(mm, addr, ptep, pte, nr, pgsize) \ + __set_ptes(mm, addr, ptep, pte, nr, pgsize) =20 /* * Huge pte definitions. diff --git a/arch/arm64/mm/hugetlbpage.c b/arch/arm64/mm/hugetlbpage.c index 6b61714d7726..4da951e81bde 100644 --- a/arch/arm64/mm/hugetlbpage.c +++ b/arch/arm64/mm/hugetlbpage.c @@ -166,62 +166,6 @@ static pte_t get_clear_contig_flush(struct mm_struct *= mm, return orig_pte; } =20 -/* - * Changing some bits of contiguous entries requires us to follow a - * Break-Before-Make approach, breaking the whole contiguous set - * before we can change any entries. See ARM DDI 0487A.k_iss10775, - * "Misprogramming of the Contiguous bit", page D4-1762. - * - * This helper performs the break step for use cases where the - * original pte is not needed. - */ -static void clear_flush(struct mm_struct *mm, - unsigned long addr, - pte_t *ptep, - unsigned long pgsize, - unsigned long ncontig) -{ - struct vm_area_struct vma =3D TLB_FLUSH_VMA(mm, 0); - unsigned long i, saddr =3D addr; - - for (i =3D 0; i < ncontig; i++, addr +=3D pgsize, ptep++) - ptep_clear(mm, addr, ptep); - - flush_tlb_range(&vma, saddr, addr); -} - -void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, - pte_t *ptep, pte_t pte, unsigned long sz) -{ - size_t pgsize; - int i; - int ncontig; - unsigned long pfn, dpfn; - pgprot_t hugeprot; - - ncontig =3D arch_contpte_get_num_contig(ptep, sz, &pgsize); - - if (!pte_present(pte)) { - for (i =3D 0; i < ncontig; i++, ptep++, addr +=3D pgsize) - set_pte_at(mm, addr, ptep, pte); - return; - } - - if (!pte_cont(pte)) { - set_pte_at(mm, addr, ptep, pte); - return; - } - - pfn =3D pte_pfn(pte); - dpfn =3D pgsize >> PAGE_SHIFT; - hugeprot =3D pte_pgprot(pte); - - clear_flush(mm, addr, ptep, pgsize, ncontig); - - for (i =3D 0; i < ncontig; i++, ptep++, addr +=3D pgsize, pfn +=3D dpfn) - set_pte_at(mm, addr, ptep, pfn_pte(pfn, hugeprot)); -} - pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma, unsigned long addr, unsigned long sz) { diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgta= ble.h index ddff4a56e12d..03f8ced8b26a 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -533,29 +533,39 @@ static inline void __set_pte_at(pte_t *ptep, pte_t pt= eval) static inline int arch_contpte_get_num_contig(pte_t *ptep, unsigned long s= ize, size_t *pgsize) { + unsigned long hugepage_shift; pte_t __pte; =20 /* We must read the raw value of the pte to get the size of the mapping */ __pte =3D READ_ONCE(*ptep); =20 - if (pgsize) { - if (size >=3D PGDIR_SIZE) + if (size >=3D PGDIR_SIZE) { + if (pgsize) *pgsize =3D PGDIR_SIZE; - else if (size >=3D P4D_SIZE) + hugepage_shift =3D PGDIR_SHIFT; + } else if (size >=3D P4D_SIZE) { + if (pgsize) *pgsize =3D P4D_SIZE; - else if (size >=3D PUD_SIZE) + hugepage_shift =3D P4D_SHIFT; + } else if (size >=3D PUD_SIZE) { + if (pgsize) *pgsize =3D PUD_SIZE; - else if (size >=3D PMD_SIZE) + hugepage_shift =3D PUD_SHIFT; + } else if (size >=3D PMD_SIZE) { + if (pgsize) *pgsize =3D PMD_SIZE; - else + hugepage_shift =3D PMD_SHIFT; + } else { + if (pgsize) *pgsize =3D PAGE_SIZE; + hugepage_shift =3D PAGE_SHIFT; } =20 /* Make sure __pte is not a swap entry */ if (pte_valid_napot(__pte)) return napot_pte_num(napot_cont_order(__pte)); =20 - return 1; + return size >> hugepage_shift; } #endif =20 @@ -631,6 +641,8 @@ static inline void set_ptes(struct mm_struct *mm, unsig= ned long addr, } } #define set_ptes set_ptes +#define set_contptes(mm, addr, ptep, pte, nr, pgsize) \ + set_ptes(mm, addr, ptep, pte, nr) =20 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) diff --git a/arch/riscv/mm/hugetlbpage.c b/arch/riscv/mm/hugetlbpage.c index 51ec80cf2028..ebc735f5d325 100644 --- a/arch/riscv/mm/hugetlbpage.c +++ b/arch/riscv/mm/hugetlbpage.c @@ -173,68 +173,6 @@ pte_t arch_make_huge_pte(pte_t entry, unsigned int shi= ft, vm_flags_t flags) return entry; } =20 -static void clear_flush(struct mm_struct *mm, - unsigned long addr, - pte_t *ptep, - unsigned long pgsize, - unsigned long ncontig) -{ - struct vm_area_struct vma =3D TLB_FLUSH_VMA(mm, 0); - unsigned long i, saddr =3D addr; - - for (i =3D 0; i < ncontig; i++, addr +=3D pgsize, ptep++) - ptep_get_and_clear(mm, addr, ptep); - - flush_tlb_range(&vma, saddr, addr); -} - -/* - * When dealing with NAPOT mappings, the privileged specification indicate= s that - * "if an update needs to be made, the OS generally should first mark all = of the - * PTEs invalid, then issue SFENCE.VMA instruction(s) covering all 4 KiB r= egions - * within the range, [...] then update the PTE(s), as described in Section - * 4.2.1.". That's the equivalent of the Break-Before-Make approach used by - * arm64. - */ -void set_huge_pte_at(struct mm_struct *mm, - unsigned long addr, - pte_t *ptep, - pte_t pte, - unsigned long sz) -{ - unsigned long hugepage_shift, pgsize; - int i, pte_num; - - if (sz >=3D PGDIR_SIZE) - hugepage_shift =3D PGDIR_SHIFT; - else if (sz >=3D P4D_SIZE) - hugepage_shift =3D P4D_SHIFT; - else if (sz >=3D PUD_SIZE) - hugepage_shift =3D PUD_SHIFT; - else if (sz >=3D PMD_SIZE) - hugepage_shift =3D PMD_SHIFT; - else - hugepage_shift =3D PAGE_SHIFT; - - pte_num =3D sz >> hugepage_shift; - pgsize =3D 1 << hugepage_shift; - - if (!pte_present(pte)) { - for (i =3D 0; i < pte_num; i++, ptep++, addr +=3D pgsize) - set_ptes(mm, addr, ptep, pte, 1); - return; - } - - if (!pte_napot(pte)) { - set_ptes(mm, addr, ptep, pte, 1); - return; - } - - clear_flush(mm, addr, ptep, pgsize, pte_num); - - set_ptes(mm, addr, ptep, pte, pte_num); -} - int huge_ptep_set_access_flags(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep, diff --git a/mm/contpte.c b/mm/contpte.c index c3f4b8039b19..f7bfa861c6a1 100644 --- a/mm/contpte.c +++ b/mm/contpte.c @@ -12,11 +12,13 @@ * * contpte macros * - pte_cont() * - arch_contpte_get_num_contig() + * - set_contptes() */ =20 /* * This file implements the following contpte aware API: * huge_ptep_get() + * set_huge_pte_at() */ =20 pte_t huge_ptep_get(pte_t *ptep) @@ -43,3 +45,59 @@ pte_t huge_ptep_get(pte_t *ptep) } return orig_pte; } + +/* + * ARM64: Changing some bits of contiguous entries requires us to follow a + * Break-Before-Make approach, breaking the whole contiguous set + * before we can change any entries. See ARM DDI 0487A.k_iss10775, + * "Misprogramming of the Contiguous bit", page D4-1762. + * + * RISCV: When dealing with NAPOT mappings, the privileged specification + * indicates that "if an update needs to be made, the OS generally should = first + * mark all of the PTEs invalid, then issue SFENCE.VMA instruction(s) cove= ring + * all 4 KiB regions within the range, [...] then update the PTE(s), as + * described in Section 4.2.1.". That's the equivalent of the Break-Before= -Make + * approach used by arm64. + * + * This helper performs the break step for use cases where the + * original pte is not needed. + */ +static void clear_flush(struct mm_struct *mm, + unsigned long addr, + pte_t *ptep, + unsigned long pgsize, + unsigned long ncontig) +{ + struct vm_area_struct vma =3D TLB_FLUSH_VMA(mm, 0); + unsigned long i, saddr =3D addr; + + for (i =3D 0; i < ncontig; i++, addr +=3D pgsize, ptep++) + ptep_clear(mm, addr, ptep); + + flush_tlb_range(&vma, saddr, addr); +} + +void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, + pte_t *ptep, pte_t pte, unsigned long sz) +{ + size_t pgsize; + int i; + int ncontig; + + ncontig =3D arch_contpte_get_num_contig(ptep, sz, &pgsize); + + if (!pte_present(pte)) { + for (i =3D 0; i < ncontig; i++, ptep++, addr +=3D pgsize) + set_pte_at(mm, addr, ptep, pte); + return; + } + + if (!pte_cont(pte)) { + set_pte_at(mm, addr, ptep, pte); + return; + } + + clear_flush(mm, addr, ptep, pgsize, ncontig); + + set_contptes(mm, addr, ptep, pte, ncontig, pgsize); +} --=20 2.39.2 From nobody Mon Feb 9 01:50:28 2026 Received: from mail-wm1-f53.google.com (mail-wm1-f53.google.com [209.85.128.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DE5AD6A34B for ; Fri, 1 Mar 2024 09:20:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.53 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709284820; cv=none; b=WpVWFzLVWvAQWKUHn1bXzzjLWzKZ26ZLZyoVWsIE5qvaz89TAYEjZnO/1VdWPFM5cpPqf/YYfpExm2k4vN7KaNp1W8gYmiZxWgQ4bnZNzIIOSKuyAJ+12bXSr9rmQf6BRgCHJkc9PjQIfRIiNfZzFaX7CGXaaw+mJ8IEW44UDjE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709284820; c=relaxed/simple; bh=deJfNqmd+84vDDBO0fDBd8YCdfhsA76uVTjUbdf6HeU=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=mJOz939GfnMa5SzyKDCcWv5uY2AeAexXHXNUKwGEWPlqWuw3DmiaBYLzseA3Gb6ujyhb4ktRQj8n4g7r6Iyk4nmBV0HXCc/l49fG7D0gFMPUkOgYjQgLxfZiF6qYkG5SqM7sdsjj9fy2JKIe971I4vKbRqtSIKwbIpuSReBiLEE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com; spf=pass smtp.mailfrom=rivosinc.com; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b=zPCwsrHJ; arc=none smtp.client-ip=209.85.128.53 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b="zPCwsrHJ" Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-412a9e9c776so17909525e9.0 for ; Fri, 01 Mar 2024 01:20:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1709284817; x=1709889617; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=rdWlfuEJdB5bVZdrcri04Zmq/yhRfMcRDdftEw7qNFA=; b=zPCwsrHJ0eOHW1Zv7kbRW3DsboeAnoZUSy0hAXtloUAYPfO4RAkUjsac/X2ewPz05k W6hoat+sjn8uzRpkkIEHZ/bxqUXkMWuIhCymnz5+GL2NRotPD2c3n0Vs9caGI/nP9MAg 7/yY4MVZ4/Pws1E8MFkip8bxCsn/2/k5FrTdIh50aDXYOjZVJD/qLxxN1D5ietqs28Y1 fsrcWfMP+K4AQF1mphtfOYovOE3FA/b8HfnCJkaaBMsr6BGDPQv+24Q318PBfhdK9cEj Vcs2DwNsQFc/qFX6IITboGPZAjyfk+nN2bPmiDjOHbBRPIerGSIGZfpJuCGyt1I6qQMX wBOg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709284817; x=1709889617; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=rdWlfuEJdB5bVZdrcri04Zmq/yhRfMcRDdftEw7qNFA=; b=hAsxSpopjcCdoCdM7aXFhbRdCzIZK8lHZmCxLZLSKxmJxwGfP61P1JcIuETRHqHo3u 5TMgj+7NU4UebDQX9TCzjGpEwqPSrN8SLIkLKtZHz9FBfTxvKHBgGkGroLHp1s95i7Tx OtF8J9wmtdIng9sb0zcxHwJfBvIERbiM2MHs+IhECIlI/GZb1g7m3M3EJAovWaqG6xBq 0iXR44l9S4N8OJuKpELb8zt0a+tknS2kSYHkUek1D9FJIVfv0n9hAd7d7ScMYaegZscE MQ4WRp5TnPtOWzMcnSzD4ik9GcMvoV7lFy7CC0fvr2rU62YoSNRINdEsxxAVLB/NGYsX zDLw== X-Forwarded-Encrypted: i=1; AJvYcCWLB7yOdZipiapj6YFKl6mo2Iv92wv2xL9B3KDKuuAOp73nUwtWmhX26uwZjXD1A/fKNdrDMXNh2xsA/7MEbfZ1eEOFugE//2VxnOHc X-Gm-Message-State: AOJu0YxdAZWDJp0UnSK+6oTk5P4Odw2V4rogoJMOhR1jeYNXtN2e+TPC jxlUGOllBwiEEYC+MowPN4hZUVz6qwjJ4WBFLiDCmWbge0Ez0cY2dRnJwaV2kPw= X-Google-Smtp-Source: AGHT+IHirYUWWAQ3EzQ3D3sM4w5kbNmWdiMfyHww76VDivA5fk7+UlmhKkRo6vORNs4FOsSe8ylbjw== X-Received: by 2002:adf:a3c9:0:b0:33e:21bc:bc6f with SMTP id m9-20020adfa3c9000000b0033e21bcbc6fmr809159wrb.11.1709284817327; Fri, 01 Mar 2024 01:20:17 -0800 (PST) Received: from alex-rivos.ba.rivosinc.com (amontpellier-656-1-456-62.w92-145.abo.wanadoo.fr. [92.145.124.62]) by smtp.gmail.com with ESMTPSA id l9-20020a056000022900b0033cf2063052sm3994161wrz.111.2024.03.01.01.20.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Mar 2024 01:20:17 -0800 (PST) From: Alexandre Ghiti To: Catalin Marinas , Will Deacon , Ryan Roberts , Mark Rutland , Paul Walmsley , Palmer Dabbelt , Albert Ou , Andrew Morton , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-mm@kvack.org Cc: Alexandre Ghiti Subject: [PATCH 5/9] mm: Use common huge_pte_clear() function for riscv/arm64 Date: Fri, 1 Mar 2024 10:14:51 +0100 Message-Id: <20240301091455.246686-6-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240301091455.246686-1-alexghiti@rivosinc.com> References: <20240301091455.246686-1-alexghiti@rivosinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Both architectures have the same implementation so move it to generic code. Signed-off-by: Alexandre Ghiti Acked-by: Palmer Dabbelt --- arch/arm64/mm/hugetlbpage.c | 12 ------------ arch/riscv/mm/hugetlbpage.c | 19 ------------------- mm/contpte.c | 13 +++++++++++++ 3 files changed, 13 insertions(+), 31 deletions(-) diff --git a/arch/arm64/mm/hugetlbpage.c b/arch/arm64/mm/hugetlbpage.c index 4da951e81bde..09b55bac8c7c 100644 --- a/arch/arm64/mm/hugetlbpage.c +++ b/arch/arm64/mm/hugetlbpage.c @@ -284,18 +284,6 @@ pte_t arch_make_huge_pte(pte_t entry, unsigned int shi= ft, vm_flags_t flags) return entry; } =20 -void huge_pte_clear(struct mm_struct *mm, unsigned long addr, - pte_t *ptep, unsigned long sz) -{ - int i, ncontig; - size_t pgsize; - - ncontig =3D arch_contpte_get_num_contig(NULL, sz, &pgsize); - - for (i =3D 0; i < ncontig; i++, addr +=3D pgsize, ptep++) - pte_clear(mm, addr, ptep); -} - pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) { diff --git a/arch/riscv/mm/hugetlbpage.c b/arch/riscv/mm/hugetlbpage.c index ebc735f5d325..01b1403dd4cb 100644 --- a/arch/riscv/mm/hugetlbpage.c +++ b/arch/riscv/mm/hugetlbpage.c @@ -254,25 +254,6 @@ pte_t huge_ptep_clear_flush(struct vm_area_struct *vma, return get_clear_contig_flush(vma->vm_mm, addr, ptep, pte_num); } =20 -void huge_pte_clear(struct mm_struct *mm, - unsigned long addr, - pte_t *ptep, - unsigned long sz) -{ - size_t pgsize; - pte_t pte =3D ptep_get(ptep); - int i, pte_num; - - if (!pte_napot(pte)) { - pte_clear(mm, addr, ptep); - return; - } - - pte_num =3D arch_contpte_get_num_contig(ptep, 0, &pgsize); - for (i =3D 0; i < pte_num; i++, addr +=3D pgsize, ptep++) - pte_clear(mm, addr, ptep); -} - static bool is_napot_size(unsigned long size) { unsigned long order; diff --git a/mm/contpte.c b/mm/contpte.c index f7bfa861c6a1..5200c234404d 100644 --- a/mm/contpte.c +++ b/mm/contpte.c @@ -19,6 +19,7 @@ * This file implements the following contpte aware API: * huge_ptep_get() * set_huge_pte_at() + * huge_pte_clear() */ =20 pte_t huge_ptep_get(pte_t *ptep) @@ -101,3 +102,15 @@ void set_huge_pte_at(struct mm_struct *mm, unsigned lo= ng addr, =20 set_contptes(mm, addr, ptep, pte, ncontig, pgsize); } + +void huge_pte_clear(struct mm_struct *mm, unsigned long addr, + pte_t *ptep, unsigned long sz) +{ + int i, ncontig; + size_t pgsize; + + ncontig =3D arch_contpte_get_num_contig(ptep, sz, &pgsize); + + for (i =3D 0; i < ncontig; i++, addr +=3D pgsize, ptep++) + pte_clear(mm, addr, ptep); +} --=20 2.39.2 From nobody Mon Feb 9 01:50:28 2026 Received: from mail-wr1-f50.google.com (mail-wr1-f50.google.com [209.85.221.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 22B501E886 for ; Fri, 1 Mar 2024 09:21:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709284882; cv=none; b=udl+0h5CwjTZVwrgj/myukeV5mmcDM/rCEDmfkLvR28bau8KY/LskGnKzWX362mHujAkjxFmuMpGgLSsl4/yhGrBzV03pWiL5i0fzSl+ljRKI0pde3zG4nlW02qgPjqX41Gve+6KF+utiCqftBw1NlmlwVpJRxqF+mShL4kLGl4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709284882; c=relaxed/simple; bh=nZL7SCApwbfJRaEZ1HgnD4H5WYTWB5+0lXq/w41ioHY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=oDsSiZ0MccZf68pqnJfvjbYut2RFK3ELFXWk1R0BCKhQduo0metp0X2TcwundVB+KyaqcAK26bmDRRyvzXJ0iGZhM5Kn0KM4Erd34v0B2+3+jJ8XMmpFHfPbQ3Dd6Ipd7AGFqBS676kLB2H2GbzXvEcxOB9dvd9Uu7WlpHOdP1A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com; spf=pass smtp.mailfrom=rivosinc.com; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b=B+bGAjCR; arc=none smtp.client-ip=209.85.221.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b="B+bGAjCR" Received: by mail-wr1-f50.google.com with SMTP id ffacd0b85a97d-33e1207bba1so1028381f8f.1 for ; Fri, 01 Mar 2024 01:21:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1709284878; x=1709889678; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=roMginZSvi1o0fjo+EUJOo1pu0LVGawrxcxtyn24YPc=; b=B+bGAjCRErv1emgAe/JcKQ1GGvaqUR+dsTusu5hD2SOMGq/RZr3XUvkIvOHsPOrEfQ AsP0+D52Bl+lFqE1rAZv0zGh5FiKmz651UKdddD5btszA1LYWRQOmTnF4EcO3/g3LpXk WcKt6/0qQVeRU2LXTW7ZIkW6XLsCYyJTFyxfEHxTR+wxNu/0784n//j6ct2VdowVSETh XBWDrAivJly6dVWOzOw//frAyw64iDJ4jcOJNu67L2VWCx59kGeCgVyJu9UegbtB+SC6 Fm4ZF3lakbW1Qjfla+cDIHAH+J8ML2yX22f0+B+k0cpSE1ZsYFi97UoKVQ3OBAyQwJJF KoWw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709284878; x=1709889678; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=roMginZSvi1o0fjo+EUJOo1pu0LVGawrxcxtyn24YPc=; b=RFAwZI54FvuG8RP+XeoTPrTeWLZsMfP/OvM2TXJ7gf9zIc4l/IBNKqwckimnrpRtGr LQ1ckLtmtZfRYzJkzgET8IrIeps0rE5F2VM9yxSwPd6cIYw74xUcnY7V42RuD+QkCX+j blrayYon/26WQm4vozgNPwC/I8utVSN1/v8ZHwCunwf6AhWV8xvxFxdpSRRrqf5Yuz6L m+1eRsTuReJxrE5LAPrB/Du3Ym+dA4c3Lj3CaPHnUcUM6/7ixuJON9gLX6ClV2IHM3A8 Lwp0s/Sjc9WUmg0cFfUPE7KFgBcWloQ9Kuu/dIU/Rq7gei0SdqpyK6JmsniI2K3ggi+h WTjQ== X-Forwarded-Encrypted: i=1; AJvYcCXzQbdHKuaagd/0fHCJ3p5pG5j+tlEfZfdpLhZ1ACc7AfZtYwKr3HjMcaDZROhJHN2r4970WlDYc+ZA8UtcMLj9h0MjAbaSsyhxNi/K X-Gm-Message-State: AOJu0YzJ7gZSa78Tde3csVrCK6pwxX0gB1hXP42ijtZmjhGF8Sr8UAjo uqo/DRMMtNZJtXhY32m74P2sr2yzNHFGGK2EibLjwDZUUvhBppY99LsbIk2qyrA= X-Google-Smtp-Source: AGHT+IHE36Cx0pzkf7/PwROG0sFnOnPILtKg/5tjC2XGRavDiE3m4OmzpuOVj7dxMVbSTb8/7tKiwA== X-Received: by 2002:adf:f24e:0:b0:33d:c5c5:9bc6 with SMTP id b14-20020adff24e000000b0033dc5c59bc6mr893274wrp.54.1709284878472; Fri, 01 Mar 2024 01:21:18 -0800 (PST) Received: from alex-rivos.ba.rivosinc.com (amontpellier-656-1-456-62.w92-145.abo.wanadoo.fr. [92.145.124.62]) by smtp.gmail.com with ESMTPSA id i6-20020adfb646000000b0033e033898c5sm4044660wre.20.2024.03.01.01.21.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Mar 2024 01:21:18 -0800 (PST) From: Alexandre Ghiti To: Catalin Marinas , Will Deacon , Ryan Roberts , Mark Rutland , Paul Walmsley , Palmer Dabbelt , Albert Ou , Andrew Morton , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-mm@kvack.org Cc: Alexandre Ghiti Subject: [PATCH 6/9] mm: Use common huge_ptep_get_and_clear() function for riscv/arm64 Date: Fri, 1 Mar 2024 10:14:52 +0100 Message-Id: <20240301091455.246686-7-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240301091455.246686-1-alexghiti@rivosinc.com> References: <20240301091455.246686-1-alexghiti@rivosinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" After some adjustments, both architectures have the same implementation so move it to the generic code. Note that get_clear_contig() function is duplicated in the generic and the arm64 code because it is still used by some arm64 functions that will, in the next commits, be moved to the generic code. Once all have been moved, the arm64 version will be removed. Signed-off-by: Alexandre Ghiti Acked-by: Palmer Dabbelt --- arch/arm64/include/asm/pgtable.h | 14 +++++++++- arch/arm64/mm/hugetlbpage.c | 19 ++----------- arch/riscv/include/asm/pgtable.h | 4 ++- arch/riscv/mm/hugetlbpage.c | 21 ++------------ mm/contpte.c | 48 ++++++++++++++++++++++++++++++-- 5 files changed, 66 insertions(+), 40 deletions(-) diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgta= ble.h index 437e9638b2b9..b5caf7a9d03f 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -1131,11 +1131,23 @@ extern void ptep_modify_prot_commit(struct vm_area_= struct *vma, unsigned long addr, pte_t *ptep, pte_t old_pte, pte_t new_pte); =20 -static inline int arch_contpte_get_num_contig(pte_t *ptep, unsigned long s= ize, +int find_num_contig(struct mm_struct *mm, unsigned long addr, + pte_t *ptep, size_t *pgsize); + +static inline int arch_contpte_get_num_contig(struct mm_struct *mm, + unsigned long addr, + pte_t *ptep, unsigned long size, size_t *pgsize) { int contig_ptes =3D 0; =20 + /* + * If the size is not passed, we need to go through the page table to + * find out the number of contiguous ptes. + */ + if (size =3D=3D 0) + return find_num_contig(mm, addr, ptep, pgsize); + *pgsize =3D size; =20 switch (size) { diff --git a/arch/arm64/mm/hugetlbpage.c b/arch/arm64/mm/hugetlbpage.c index 09b55bac8c7c..a2d33cbc7da5 100644 --- a/arch/arm64/mm/hugetlbpage.c +++ b/arch/arm64/mm/hugetlbpage.c @@ -100,8 +100,8 @@ int pud_huge(pud_t pud) #endif } =20 -static int find_num_contig(struct mm_struct *mm, unsigned long addr, - pte_t *ptep, size_t *pgsize) +int find_num_contig(struct mm_struct *mm, unsigned long addr, + pte_t *ptep, size_t *pgsize) { pgd_t *pgdp =3D pgd_offset(mm, addr); p4d_t *p4dp; @@ -284,21 +284,6 @@ pte_t arch_make_huge_pte(pte_t entry, unsigned int shi= ft, vm_flags_t flags) return entry; } =20 -pte_t huge_ptep_get_and_clear(struct mm_struct *mm, - unsigned long addr, pte_t *ptep) -{ - int ncontig; - size_t pgsize; - pte_t orig_pte =3D ptep_get(ptep); - - if (!pte_cont(orig_pte)) - return ptep_get_and_clear(mm, addr, ptep); - - ncontig =3D find_num_contig(mm, addr, ptep, &pgsize); - - return get_clear_contig(mm, addr, ptep, pgsize, ncontig); -} - /* * huge_ptep_set_access_flags will update access flags (dirty, accesssed) * and write permission. diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgta= ble.h index 03f8ced8b26a..1cb877f0d0ce 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -530,7 +530,9 @@ static inline void __set_pte_at(pte_t *ptep, pte_t ptev= al) } =20 #ifdef CONFIG_RISCV_ISA_SVNAPOT -static inline int arch_contpte_get_num_contig(pte_t *ptep, unsigned long s= ize, +static inline int arch_contpte_get_num_contig(struct mm_struct *mm, + unsigned long addr, + pte_t *ptep, unsigned long size, size_t *pgsize) { unsigned long hugepage_shift; diff --git a/arch/riscv/mm/hugetlbpage.c b/arch/riscv/mm/hugetlbpage.c index 01b1403dd4cb..4c441664db8a 100644 --- a/arch/riscv/mm/hugetlbpage.c +++ b/arch/riscv/mm/hugetlbpage.c @@ -187,7 +187,7 @@ int huge_ptep_set_access_flags(struct vm_area_struct *v= ma, if (!pte_napot(pte)) return ptep_set_access_flags(vma, addr, ptep, pte, dirty); =20 - pte_num =3D arch_contpte_get_num_contig(ptep, 0, &pgsize); + pte_num =3D arch_contpte_get_num_contig(vma->vm_mm, addr, ptep, 0, &pgsiz= e); =20 orig_pte =3D get_clear_contig_flush(mm, addr, ptep, pte_num); =20 @@ -202,21 +202,6 @@ int huge_ptep_set_access_flags(struct vm_area_struct *= vma, return true; } =20 -pte_t huge_ptep_get_and_clear(struct mm_struct *mm, - unsigned long addr, - pte_t *ptep) -{ - pte_t orig_pte =3D ptep_get(ptep); - int pte_num; - - if (!pte_napot(orig_pte)) - return ptep_get_and_clear(mm, addr, ptep); - - pte_num =3D arch_contpte_get_num_contig(ptep, 0, NULL); - - return get_clear_contig(mm, addr, ptep, pte_num); -} - void huge_ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep) @@ -231,7 +216,7 @@ void huge_ptep_set_wrprotect(struct mm_struct *mm, return; } =20 - pte_num =3D arch_contpte_get_num_contig(ptep, 0, &pgsize); + pte_num =3D arch_contpte_get_num_contig(mm, addr, ptep, 0, &pgsize); =20 orig_pte =3D get_clear_contig_flush(mm, addr, ptep, pte_num); orig_pte =3D pte_wrprotect(orig_pte); @@ -249,7 +234,7 @@ pte_t huge_ptep_clear_flush(struct vm_area_struct *vma, if (!pte_napot(pte)) return ptep_clear_flush(vma, addr, ptep); =20 - pte_num =3D arch_contpte_get_num_contig(ptep, 0, NULL); + pte_num =3D arch_contpte_get_num_contig(vma->vm_mm, addr, ptep, 0, NULL); =20 return get_clear_contig_flush(vma->vm_mm, addr, ptep, pte_num); } diff --git a/mm/contpte.c b/mm/contpte.c index 5200c234404d..8d2ab391e0d8 100644 --- a/mm/contpte.c +++ b/mm/contpte.c @@ -20,6 +20,7 @@ * huge_ptep_get() * set_huge_pte_at() * huge_pte_clear() + * huge_ptep_get_and_clear() */ =20 pte_t huge_ptep_get(pte_t *ptep) @@ -31,7 +32,7 @@ pte_t huge_ptep_get(pte_t *ptep) if (!pte_present(orig_pte) || !pte_cont(orig_pte)) return orig_pte; =20 - ncontig =3D arch_contpte_get_num_contig(ptep, + ncontig =3D arch_contpte_get_num_contig(NULL, 0, ptep, page_size(pte_page(orig_pte)), &pgsize); =20 @@ -85,7 +86,7 @@ void set_huge_pte_at(struct mm_struct *mm, unsigned long = addr, int i; int ncontig; =20 - ncontig =3D arch_contpte_get_num_contig(ptep, sz, &pgsize); + ncontig =3D arch_contpte_get_num_contig(mm, addr, ptep, sz, &pgsize); =20 if (!pte_present(pte)) { for (i =3D 0; i < ncontig; i++, ptep++, addr +=3D pgsize) @@ -109,8 +110,49 @@ void huge_pte_clear(struct mm_struct *mm, unsigned lon= g addr, int i, ncontig; size_t pgsize; =20 - ncontig =3D arch_contpte_get_num_contig(ptep, sz, &pgsize); + ncontig =3D arch_contpte_get_num_contig(mm, addr, ptep, sz, &pgsize); =20 for (i =3D 0; i < ncontig; i++, addr +=3D pgsize, ptep++) pte_clear(mm, addr, ptep); } + +static pte_t get_clear_contig(struct mm_struct *mm, + unsigned long addr, + pte_t *ptep, + unsigned long pgsize, + unsigned long ncontig) +{ + pte_t orig_pte =3D ptep_get(ptep); + unsigned long i; + + for (i =3D 0; i < ncontig; i++, addr +=3D pgsize, ptep++) { + pte_t pte =3D ptep_get_and_clear(mm, addr, ptep); + + /* + * If HW_AFDBM (arm64) or svadu (riscv) is enabled, then the HW + * could turn on the dirty or accessed bit for any page in the + * set, so check them all. + */ + if (pte_dirty(pte)) + orig_pte =3D pte_mkdirty(orig_pte); + + if (pte_young(pte)) + orig_pte =3D pte_mkyoung(orig_pte); + } + return orig_pte; +} + +pte_t huge_ptep_get_and_clear(struct mm_struct *mm, + unsigned long addr, pte_t *ptep) +{ + int ncontig; + size_t pgsize; + pte_t orig_pte =3D ptep_get(ptep); + + if (!pte_cont(orig_pte)) + return ptep_get_and_clear(mm, addr, ptep); + + ncontig =3D arch_contpte_get_num_contig(mm, addr, ptep, 0, &pgsize); + + return get_clear_contig(mm, addr, ptep, pgsize, ncontig); +} --=20 2.39.2 From nobody Mon Feb 9 01:50:28 2026 Received: from mail-wr1-f46.google.com (mail-wr1-f46.google.com [209.85.221.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2F2EA1E886 for ; Fri, 1 Mar 2024 09:22:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709284943; cv=none; b=rUsiW9+9u1lM92mrVymojIIE5ZKzeMm28wJmtaNlMKwhOlOiyL3KcgSEOpB07niDNWqPF2Al3OIXZ3ajQ5t0/aIdXwIv9Fs/BL4fhuY4IAnU2ZgCs2qrqmChlxi13Sx3ZK2JQMV15ce2ySpTUjFBXUjUuGUcrwXo6cKjMg6fHFA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709284943; c=relaxed/simple; bh=ewaz0+30TL4hNr+v/Sd93KkOOVe261sfJ+PpKwEwyfg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=WwRgUOv1+IEc/4PFEXBSAuZbYR31O0g7uR1JW63nInLzjNEOJyNhgGnFsxJUhwt19rMKNC5leSIkDv08RvyyfB/ug7tWiTp05XO0rQ8UXsZDI0Y2YHSOJwMNkBhBaUrfilQMi3BkTOPPYkd0YPnbaLiHVuEmf0Zqx1om3oOnavc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com; spf=pass smtp.mailfrom=rivosinc.com; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b=w8pbEbCM; arc=none smtp.client-ip=209.85.221.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b="w8pbEbCM" Received: by mail-wr1-f46.google.com with SMTP id ffacd0b85a97d-33e17fc5aceso535686f8f.0 for ; Fri, 01 Mar 2024 01:22:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1709284939; x=1709889739; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=fHzJQXP5BEIeqfOJsZUcjaIxOTpiaXVWcZpI+r0iAkE=; b=w8pbEbCMWfcSnm2Ysd0YIf+XZOkFG9506GVk0bLQC9RueKznXYTf13pvdyeUM/GyRu umhWfLQvWuiesqLBMwcdx2nfkc4HXvyVZQfEXKiNXqCI6MD+MoQC/7cADCsbTisiuVuA H3gZCGCbe9EW/bcHox2HB9blbapN1SxBKFQXM09wJHJM7WAWkG5MURZR6gdxNJk5LNyy xrAhznTK7+zGrofTh+VGeq0qLJTawxrPOiJNmP14YfF4vZqW++NwT0VVkehu/KFCRKNW IyHRkm6EiTLbyK9/sm8svqG7rc6sMLb/pWIDSdFjF4QSNoqvuappKXDWnEHc6ImvoYFu GrMA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709284939; x=1709889739; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=fHzJQXP5BEIeqfOJsZUcjaIxOTpiaXVWcZpI+r0iAkE=; b=JFp98gXG4iKxXWFg9/4ff1QJV7+bW2tRTvWX6I3pdpOhr5HDebWk5GhF5DvM1pUvsd ZW0wCVqySvOf9hiDwaUI9iUi3ucMq6Jz/zZUmDmhHOivpVrmlFQrKJDKFalLyF8on+L0 MbHvDUtrHEniRryVLoJENZBlmbreytcQ3865z74OeoziwuqyA8S2MZ6wUPkfPPSKFBX9 OFcLs2sy/mZpd+mxQieJIWvNL/NJp0lKTx+1L/BJXq6METkG5o9uCf3vU1aYdWIz1UtT ZjNkGpwvfIGrkyPzc07IQE3HNI7ZX85528z5yBEqvIuiGUYlquNX0OAxUfTyx7ySN6nK T/Lw== X-Forwarded-Encrypted: i=1; AJvYcCXtHx41ziMl5ANVaTRZbohS0wP+0r2QQA43QrGZeiM3gs3dMPEbMJgUEIa+WMMbX8y1u8Xl1etJ4XH30ujOJz4AoQjYjp/AMxucICBC X-Gm-Message-State: AOJu0Yy6gNDPiE/7Hjzk5vlCO0Tc/wIVgbdSONUopSBsKOx6UtxpCRqe kA4225haHUgf0p77j/LZqMrClOClg4+Ed3WmLdPyZmL35FkoSm/EEHO670koZ3g= X-Google-Smtp-Source: AGHT+IETq5VRJHPuwhCoVEqwX4u/EPRIvAhXp1XnZCRkR4LhBkbxP9zDwDTrac3tIekTrNx6Id8PTw== X-Received: by 2002:adf:f84c:0:b0:33d:39db:a0f8 with SMTP id d12-20020adff84c000000b0033d39dba0f8mr1044349wrq.7.1709284939471; Fri, 01 Mar 2024 01:22:19 -0800 (PST) Received: from alex-rivos.ba.rivosinc.com (amontpellier-656-1-456-62.w92-145.abo.wanadoo.fr. [92.145.124.62]) by smtp.gmail.com with ESMTPSA id e13-20020a5d594d000000b0033e12b2e567sm3302518wri.35.2024.03.01.01.22.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Mar 2024 01:22:19 -0800 (PST) From: Alexandre Ghiti To: Catalin Marinas , Will Deacon , Ryan Roberts , Mark Rutland , Paul Walmsley , Palmer Dabbelt , Albert Ou , Andrew Morton , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-mm@kvack.org Cc: Alexandre Ghiti Subject: [PATCH 7/9] mm: Use common huge_ptep_set_access_flags() function for riscv/arm64 Date: Fri, 1 Mar 2024 10:14:53 +0100 Message-Id: <20240301091455.246686-8-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240301091455.246686-1-alexghiti@rivosinc.com> References: <20240301091455.246686-1-alexghiti@rivosinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Both architectures have almost the same implementation: __cont_access_flags_changed() is also correct on riscv and brings the same benefits (ie don't do anything if the flags are unchanged). As in the previous commit, get_clear_contig_flush() is duplicated in both the arch and the generic codes, it will be removed from the arch code when the last reference there gets moved to the generic code. Signed-off-by: Alexandre Ghiti Acked-by: Palmer Dabbelt --- arch/arm64/mm/hugetlbpage.c | 65 -------------------------------- arch/riscv/mm/hugetlbpage.c | 29 --------------- mm/contpte.c | 74 +++++++++++++++++++++++++++++++++++++ 3 files changed, 74 insertions(+), 94 deletions(-) diff --git a/arch/arm64/mm/hugetlbpage.c b/arch/arm64/mm/hugetlbpage.c index a2d33cbc7da5..b8abbd5ace4f 100644 --- a/arch/arm64/mm/hugetlbpage.c +++ b/arch/arm64/mm/hugetlbpage.c @@ -284,71 +284,6 @@ pte_t arch_make_huge_pte(pte_t entry, unsigned int shi= ft, vm_flags_t flags) return entry; } =20 -/* - * huge_ptep_set_access_flags will update access flags (dirty, accesssed) - * and write permission. - * - * For a contiguous huge pte range we need to check whether or not write - * permission has to change only on the first pte in the set. Then for - * all the contiguous ptes we need to check whether or not there is a - * discrepancy between dirty or young. - */ -static int __cont_access_flags_changed(pte_t *ptep, pte_t pte, int ncontig) -{ - int i; - - if (pte_write(pte) !=3D pte_write(ptep_get(ptep))) - return 1; - - for (i =3D 0; i < ncontig; i++) { - pte_t orig_pte =3D ptep_get(ptep + i); - - if (pte_dirty(pte) !=3D pte_dirty(orig_pte)) - return 1; - - if (pte_young(pte) !=3D pte_young(orig_pte)) - return 1; - } - - return 0; -} - -int huge_ptep_set_access_flags(struct vm_area_struct *vma, - unsigned long addr, pte_t *ptep, - pte_t pte, int dirty) -{ - int ncontig, i; - size_t pgsize =3D 0; - unsigned long pfn =3D pte_pfn(pte), dpfn; - struct mm_struct *mm =3D vma->vm_mm; - pgprot_t hugeprot; - pte_t orig_pte; - - if (!pte_cont(pte)) - return ptep_set_access_flags(vma, addr, ptep, pte, dirty); - - ncontig =3D find_num_contig(mm, addr, ptep, &pgsize); - dpfn =3D pgsize >> PAGE_SHIFT; - - if (!__cont_access_flags_changed(ptep, pte, ncontig)) - return 0; - - orig_pte =3D get_clear_contig_flush(mm, addr, ptep, pgsize, ncontig); - - /* Make sure we don't lose the dirty or young state */ - if (pte_dirty(orig_pte)) - pte =3D pte_mkdirty(pte); - - if (pte_young(orig_pte)) - pte =3D pte_mkyoung(pte); - - hugeprot =3D pte_pgprot(pte); - for (i =3D 0; i < ncontig; i++, ptep++, addr +=3D pgsize, pfn +=3D dpfn) - set_pte_at(mm, addr, ptep, pfn_pte(pfn, hugeprot)); - - return 1; -} - void huge_ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep) { diff --git a/arch/riscv/mm/hugetlbpage.c b/arch/riscv/mm/hugetlbpage.c index 4c441664db8a..fdb633844d4b 100644 --- a/arch/riscv/mm/hugetlbpage.c +++ b/arch/riscv/mm/hugetlbpage.c @@ -173,35 +173,6 @@ pte_t arch_make_huge_pte(pte_t entry, unsigned int shi= ft, vm_flags_t flags) return entry; } =20 -int huge_ptep_set_access_flags(struct vm_area_struct *vma, - unsigned long addr, - pte_t *ptep, - pte_t pte, - int dirty) -{ - struct mm_struct *mm =3D vma->vm_mm; - size_t pgsize; - pte_t orig_pte; - int pte_num; - - if (!pte_napot(pte)) - return ptep_set_access_flags(vma, addr, ptep, pte, dirty); - - pte_num =3D arch_contpte_get_num_contig(vma->vm_mm, addr, ptep, 0, &pgsiz= e); - - orig_pte =3D get_clear_contig_flush(mm, addr, ptep, pte_num); - - if (pte_dirty(orig_pte)) - pte =3D pte_mkdirty(pte); - - if (pte_young(orig_pte)) - pte =3D pte_mkyoung(pte); - - set_ptes(mm, addr, ptep, pte, pte_num); - - return true; -} - void huge_ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep) diff --git a/mm/contpte.c b/mm/contpte.c index 8d2ab391e0d8..3b65c49c6d4b 100644 --- a/mm/contpte.c +++ b/mm/contpte.c @@ -21,6 +21,7 @@ * set_huge_pte_at() * huge_pte_clear() * huge_ptep_get_and_clear() + * huge_ptep_set_access_flags() */ =20 pte_t huge_ptep_get(pte_t *ptep) @@ -156,3 +157,76 @@ pte_t huge_ptep_get_and_clear(struct mm_struct *mm, =20 return get_clear_contig(mm, addr, ptep, pgsize, ncontig); } + +/* + * huge_ptep_set_access_flags will update access flags (dirty, accesssed) + * and write permission. + * + * For a contiguous huge pte range we need to check whether or not write + * permission has to change only on the first pte in the set. Then for + * all the contiguous ptes we need to check whether or not there is a + * discrepancy between dirty or young. + */ +static int __cont_access_flags_changed(pte_t *ptep, pte_t pte, int ncontig) +{ + int i; + + if (pte_write(pte) !=3D pte_write(ptep_get(ptep))) + return 1; + + for (i =3D 0; i < ncontig; i++) { + pte_t orig_pte =3D ptep_get(ptep + i); + + if (pte_dirty(pte) !=3D pte_dirty(orig_pte)) + return 1; + + if (pte_young(pte) !=3D pte_young(orig_pte)) + return 1; + } + + return 0; +} + +static pte_t get_clear_contig_flush(struct mm_struct *mm, + unsigned long addr, + pte_t *ptep, + unsigned long pgsize, + unsigned long ncontig) +{ + pte_t orig_pte =3D get_clear_contig(mm, addr, ptep, pgsize, ncontig); + struct vm_area_struct vma =3D TLB_FLUSH_VMA(mm, 0); + + flush_tlb_range(&vma, addr, addr + (pgsize * ncontig)); + return orig_pte; +} + +int huge_ptep_set_access_flags(struct vm_area_struct *vma, + unsigned long addr, pte_t *ptep, + pte_t pte, int dirty) +{ + int ncontig; + size_t pgsize =3D 0; + struct mm_struct *mm =3D vma->vm_mm; + pte_t orig_pte; + + if (!pte_cont(pte)) + return ptep_set_access_flags(vma, addr, ptep, pte, dirty); + + ncontig =3D arch_contpte_get_num_contig(vma->vm_mm, addr, ptep, 0, &pgsiz= e); + + if (!__cont_access_flags_changed(ptep, pte, ncontig)) + return 0; + + orig_pte =3D get_clear_contig_flush(mm, addr, ptep, pgsize, ncontig); + + /* Make sure we don't lose the dirty or young state */ + if (pte_dirty(orig_pte)) + pte =3D pte_mkdirty(pte); + + if (pte_young(orig_pte)) + pte =3D pte_mkyoung(pte); + + set_contptes(mm, addr, ptep, pte, ncontig, pgsize); + + return 1; +} --=20 2.39.2 From nobody Mon Feb 9 01:50:28 2026 Received: from mail-lj1-f172.google.com (mail-lj1-f172.google.com [209.85.208.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 50D341E886 for ; Fri, 1 Mar 2024 09:23:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709285004; cv=none; b=DmQWnLbYqRk+o9w+v45B20FmrJ2ZHHZE8mLGPOrZ0c3YV55QUISRxTc7hPDajkv94AB6Ej3fZ6UoF2adY+8CpTdCSXLKn18Z8G8yPKIR1o9s98GidOyH6Y69Cybi9GmstZhaEWLRX/dzrwTLqDspSrxCk4bPT3gQJRkumG+kbm4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709285004; c=relaxed/simple; bh=GXAk2kN1CTNZcSPb0xo/khVDgAjh/yl/yqVe3qPZCWw=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=hMGQPOi4u5OjVDGMWdCTBMIPAAkxegJMGVlRCf4FVCCCG5kRk3P6eN7SUXrYdhg52OSAyO443F65ulVaFuqnX/u8yp6LhUXjVnS/pPalfXtL/raLgONk3aBwoL64aWcK6s7O4lD5UPMjtqWDlhlPZ7mCN6uZiLu405speu/lXSo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com; spf=pass smtp.mailfrom=rivosinc.com; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b=hrytu87r; arc=none smtp.client-ip=209.85.208.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b="hrytu87r" Received: by mail-lj1-f172.google.com with SMTP id 38308e7fff4ca-2d22b8801b9so23166141fa.0 for ; Fri, 01 Mar 2024 01:23:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1709285000; x=1709889800; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+Bwm42ASg+Pn4jchqsA5u8tprYh0PuExgujdSk24Zd8=; b=hrytu87rixLQYgV1MR6B5Go6MbsecCNyDU8wutYVMIaP67Dx+eIYH43Gfip7lo+71y ZMcPF1kUqjUG2RZqrTNI2brU9CneXP8QD1lv7tB6qADON4O58gEgox7HWBlYO5V+6aXX BCbLi32Fudvfo8947uzFYGXiJUTY1xXk8DuS9W6v2/PM+gSTBqc1gIiH1LqBVlcfbKY5 NGaSYShAYdZw0fz/fhECIPFK3WRQctxAXiB/0TJzv6ZyUhi5631Uoj/P022pcGPRcdzh LU1wxRBiHbVe4YdxS/92I7Zml1dfopPMKG8ksnQiZRXmcWMuG/acOaAhmlanjEsaKVmZ 38UA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709285000; x=1709889800; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+Bwm42ASg+Pn4jchqsA5u8tprYh0PuExgujdSk24Zd8=; b=hmlhCHY1HYbNnh7je/tFfrdmqkW2y2PJb9H58ho84X5ZSJUtL0Uic0GbPBN1LR3gBw 8UhsUHVtbm/Jt+9291sE80lDbgV5YXKXZ26jbvvxBPkMgdfwtiVMByPzDOkOKWj9UnK4 kh8EOntybH/dr+aAuGAXmhNuXR9NflzVLhT81cF1Tg4gfBBe9z7HIvrFpyGzflK2IoUr qmAe5C/JfjHAYR1xGYcCkcxds5rLzFMDWRNEvcaHKF62YWxwjDBJbG2HRQ2yP7hq6p7t qlMQDZcXKMXEMzpeiWmGcOMDbH4wb7ya7g2TKzrlbVZJZYKE/Yt4gSh5nbqO42tkOhqP A+Bg== X-Forwarded-Encrypted: i=1; AJvYcCXg1fbTxX5QngY2ZubfNCf9z1pMrM4b794v7qAecLWuGKwWLnGHmzayNWaqJyZFPTj5scc2ViKIQOaJjgy8FWGQwueLfc4ipsNZIjTP X-Gm-Message-State: AOJu0YyLjuE+WfTLbRzvucWYwOVnYzsXoEEk7AmvTwmabC1Eucr0CCOG V0E/kuz8+zPkaAjyoI76ShfIZdxRSfnSgwl8Qff8kNccch1J1b/C73o2YuFbA4s= X-Google-Smtp-Source: AGHT+IFkOrueHwu+dCituNGudpmJQSWFJOG3RRqM9+lTLTigiW3MgJH56JMq1RpUEmcE9Sa98B2xOQ== X-Received: by 2002:a2e:a4cb:0:b0:2d3:365e:9d02 with SMTP id p11-20020a2ea4cb000000b002d3365e9d02mr635537ljm.28.1709285000535; Fri, 01 Mar 2024 01:23:20 -0800 (PST) Received: from alex-rivos.ba.rivosinc.com (amontpellier-656-1-456-62.w92-145.abo.wanadoo.fr. [92.145.124.62]) by smtp.gmail.com with ESMTPSA id l33-20020a05600c1d2100b00412ca88537dsm374810wms.0.2024.03.01.01.23.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Mar 2024 01:23:20 -0800 (PST) From: Alexandre Ghiti To: Catalin Marinas , Will Deacon , Ryan Roberts , Mark Rutland , Paul Walmsley , Palmer Dabbelt , Albert Ou , Andrew Morton , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-mm@kvack.org Cc: Alexandre Ghiti Subject: [PATCH 8/9] mm: Use common huge_ptep_set_wrprotect() function for riscv/arm64 Date: Fri, 1 Mar 2024 10:14:54 +0100 Message-Id: <20240301091455.246686-9-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240301091455.246686-1-alexghiti@rivosinc.com> References: <20240301091455.246686-1-alexghiti@rivosinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" After some adjustments, both architectures have the same implementation so move it to the generic code. Signed-off-by: Alexandre Ghiti Acked-by: Palmer Dabbelt --- arch/arm64/mm/hugetlbpage.c | 27 --------------------------- arch/riscv/mm/hugetlbpage.c | 22 ---------------------- mm/contpte.c | 21 +++++++++++++++++++++ 3 files changed, 21 insertions(+), 49 deletions(-) diff --git a/arch/arm64/mm/hugetlbpage.c b/arch/arm64/mm/hugetlbpage.c index b8abbd5ace4f..d6ddaf282a94 100644 --- a/arch/arm64/mm/hugetlbpage.c +++ b/arch/arm64/mm/hugetlbpage.c @@ -284,33 +284,6 @@ pte_t arch_make_huge_pte(pte_t entry, unsigned int shi= ft, vm_flags_t flags) return entry; } =20 -void huge_ptep_set_wrprotect(struct mm_struct *mm, - unsigned long addr, pte_t *ptep) -{ - unsigned long pfn, dpfn; - pgprot_t hugeprot; - int ncontig, i; - size_t pgsize; - pte_t pte; - - if (!pte_cont(READ_ONCE(*ptep))) { - ptep_set_wrprotect(mm, addr, ptep); - return; - } - - ncontig =3D find_num_contig(mm, addr, ptep, &pgsize); - dpfn =3D pgsize >> PAGE_SHIFT; - - pte =3D get_clear_contig_flush(mm, addr, ptep, pgsize, ncontig); - pte =3D pte_wrprotect(pte); - - hugeprot =3D pte_pgprot(pte); - pfn =3D pte_pfn(pte); - - for (i =3D 0; i < ncontig; i++, ptep++, addr +=3D pgsize, pfn +=3D dpfn) - set_pte_at(mm, addr, ptep, pfn_pte(pfn, hugeprot)); -} - pte_t huge_ptep_clear_flush(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep) { diff --git a/arch/riscv/mm/hugetlbpage.c b/arch/riscv/mm/hugetlbpage.c index fdb633844d4b..e6cbb6fb2904 100644 --- a/arch/riscv/mm/hugetlbpage.c +++ b/arch/riscv/mm/hugetlbpage.c @@ -173,28 +173,6 @@ pte_t arch_make_huge_pte(pte_t entry, unsigned int shi= ft, vm_flags_t flags) return entry; } =20 -void huge_ptep_set_wrprotect(struct mm_struct *mm, - unsigned long addr, - pte_t *ptep) -{ - pte_t pte =3D ptep_get(ptep); - size_t pgsize; - pte_t orig_pte; - int pte_num; - - if (!pte_napot(pte)) { - ptep_set_wrprotect(mm, addr, ptep); - return; - } - - pte_num =3D arch_contpte_get_num_contig(mm, addr, ptep, 0, &pgsize); - - orig_pte =3D get_clear_contig_flush(mm, addr, ptep, pte_num); - orig_pte =3D pte_wrprotect(orig_pte); - - set_ptes(mm, addr, ptep, orig_pte, pte_num); -} - pte_t huge_ptep_clear_flush(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep) diff --git a/mm/contpte.c b/mm/contpte.c index 3b65c49c6d4b..f7f26d2cfa23 100644 --- a/mm/contpte.c +++ b/mm/contpte.c @@ -22,6 +22,7 @@ * huge_pte_clear() * huge_ptep_get_and_clear() * huge_ptep_set_access_flags() + * huge_ptep_set_wrprotect() */ =20 pte_t huge_ptep_get(pte_t *ptep) @@ -230,3 +231,23 @@ int huge_ptep_set_access_flags(struct vm_area_struct *= vma, =20 return 1; } + +void huge_ptep_set_wrprotect(struct mm_struct *mm, + unsigned long addr, pte_t *ptep) +{ + int ncontig; + size_t pgsize; + pte_t pte; + + if (!pte_cont(ptep_get(ptep))) { + ptep_set_wrprotect(mm, addr, ptep); + return; + } + + ncontig =3D arch_contpte_get_num_contig(mm, addr, ptep, 0, &pgsize); + + pte =3D get_clear_contig_flush(mm, addr, ptep, pgsize, ncontig); + pte =3D pte_wrprotect(pte); + + set_contptes(mm, addr, ptep, pte, ncontig, pgsize); +} --=20 2.39.2 From nobody Mon Feb 9 01:50:28 2026 Received: from mail-lj1-f169.google.com (mail-lj1-f169.google.com [209.85.208.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 74CAF1E886 for ; Fri, 1 Mar 2024 09:24:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.169 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709285065; cv=none; b=C7bJmZdDdGXV/rBakGDvLvI5ct0M2S9A7hVA1UdczbtRpMxR3mYvDaPqrcJUnGzMOA3F4H7maAD3L7qmTHLlOBLUFc6qyME061JyMhpRjgKp6NUDVeI1T5Dj2jWPd8YWjCPJgfPbfMoHo9pah/uCiUWWjpOeCBXTcuRNWDMus8k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709285065; c=relaxed/simple; bh=+ow+dOW9ypF4OLMK7/TVjfBm7JSrFvOpR9MHm14eflw=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=cBjv/khdDl0VYO0RGMfepZb+P3d+HUcZ84B+J0Bqa9QEEoQeN+pawPvPrm0/AyxIlx9Nqqu1IIVGtTepOIoW54WeGnPAN8o3qs5FVt1KFb6xscNnF0LjmnBBm8ypHvFvAVF0XmNm+vCCG2//Zr6xgblZZ7DmtH5/DcdZGbTXqOo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com; spf=pass smtp.mailfrom=rivosinc.com; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b=n+O+UU8o; arc=none smtp.client-ip=209.85.208.169 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b="n+O+UU8o" Received: by mail-lj1-f169.google.com with SMTP id 38308e7fff4ca-2d23d301452so19647331fa.1 for ; Fri, 01 Mar 2024 01:24:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1709285061; x=1709889861; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=K12kuYfal65hYkuTm7CnsK9zS+VdU7mNn9HZDxR8IYY=; b=n+O+UU8oiMMmL3XVwwEsvNJhjmmPr5FkZotyNPP9fovVMxnBxnHGfYrR993uR5YHQ0 l6TMymD+AQ9P3RkN5p6nsvGJBJmGacGtjLJqno8co2Sc73krgleNqHYdIeN+RJ066mcU BFZ7M7Pp/v0WGUYrw9T8FlJzVVyIeWQrL4CwDiVN84/hKcE5spEYGq34noAqRbk9k4GU JiuWWL8Ndy4awE9wdjGnmH7d1zn+qn97VBout+3P4LP69KzJyMnoS9avltzlxq7N1Gco RHiDteBfr60Gr5PHV/TWuzUlVSmOyFppWQw3zOL4QB9zZYGlTYSj8RFvF4vvb1mnZ/M7 zXVw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709285061; x=1709889861; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=K12kuYfal65hYkuTm7CnsK9zS+VdU7mNn9HZDxR8IYY=; b=sCnmL0iDIQex7gA96P/LpseVl6X9xv0rsesefKy+XC+D3pi1IdjC8W+rTWkkFEqHJR whSvdTk+SdFnag1o5MfB2edRwPLJ06MAlixjhHtVa6kLX/+v1tOJaGQCsH3nrAl9yunP 9AiDH0sMnxHaBROBdNZkjhvvxYabnss2oTB7LrE89U+ytY8Z77vYey5ik320uxvxP2MJ TcylS5YSqqhRROZPERH5Ajzu9njWguM9UmmdmpurgslWfYraWEYIUUWhSR37KdA0Oyw2 DCDdGd9tMoB3kwOF0w5ySQPs1FDkye6pJzHy9qK6kJ+x7RuoJJzHwbfICaKl4JHdqmvi n3AQ== X-Forwarded-Encrypted: i=1; AJvYcCWxiq0zx5LuhQqL3Sb0cvFlUHx5jcT2EMA2RUWvlbvXlPCiWeH5OwpVHejhUFM0xs9Fj9CBPaZYeDb33XwwueL3gABK5sGgNz07+w86 X-Gm-Message-State: AOJu0YyOAcA6FRkDivFv/ZkZ9cd3U45eNssHxsxtcfPJ+1OA2yX4oYb5 S4t3jwP/Y9qNWMsxHWeylmiAUXm2dvriutb5g4xwatmr7iXd7f3nODvrUojYLOs= X-Google-Smtp-Source: AGHT+IFt+kCs8abRI8MZlthQ5rKNhpeiYCQtIBul4mlcyfPmRwi1Z8kSKZm+NO/gjQvAypId4axWxw== X-Received: by 2002:a2e:9909:0:b0:2d2:92a2:9a84 with SMTP id v9-20020a2e9909000000b002d292a29a84mr731669lji.43.1709285061585; Fri, 01 Mar 2024 01:24:21 -0800 (PST) Received: from alex-rivos.ba.rivosinc.com (amontpellier-656-1-456-62.w92-145.abo.wanadoo.fr. [92.145.124.62]) by smtp.gmail.com with ESMTPSA id w15-20020a05600c474f00b00412ca1dc2e4sm649267wmo.7.2024.03.01.01.24.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Mar 2024 01:24:21 -0800 (PST) From: Alexandre Ghiti To: Catalin Marinas , Will Deacon , Ryan Roberts , Mark Rutland , Paul Walmsley , Palmer Dabbelt , Albert Ou , Andrew Morton , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-mm@kvack.org Cc: Alexandre Ghiti Subject: [PATCH 9/9] mm: Use common huge_ptep_clear_flush() function for riscv/arm64 Date: Fri, 1 Mar 2024 10:14:55 +0100 Message-Id: <20240301091455.246686-10-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240301091455.246686-1-alexghiti@rivosinc.com> References: <20240301091455.246686-1-alexghiti@rivosinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" After some adjustments, both architectures have the same implementation so move it to the generic code. Signed-off-by: Alexandre Ghiti Acked-by: Palmer Dabbelt --- arch/arm64/mm/hugetlbpage.c | 61 ------------------------------------- arch/riscv/mm/hugetlbpage.c | 51 ------------------------------- mm/contpte.c | 15 +++++++++ 3 files changed, 15 insertions(+), 112 deletions(-) diff --git a/arch/arm64/mm/hugetlbpage.c b/arch/arm64/mm/hugetlbpage.c index d6ddaf282a94..8a273b9816d7 100644 --- a/arch/arm64/mm/hugetlbpage.c +++ b/arch/arm64/mm/hugetlbpage.c @@ -119,53 +119,6 @@ int find_num_contig(struct mm_struct *mm, unsigned lon= g addr, return CONT_PTES; } =20 -/* - * Changing some bits of contiguous entries requires us to follow a - * Break-Before-Make approach, breaking the whole contiguous set - * before we can change any entries. See ARM DDI 0487A.k_iss10775, - * "Misprogramming of the Contiguous bit", page D4-1762. - * - * This helper performs the break step. - */ -static pte_t get_clear_contig(struct mm_struct *mm, - unsigned long addr, - pte_t *ptep, - unsigned long pgsize, - unsigned long ncontig) -{ - pte_t orig_pte =3D ptep_get(ptep); - unsigned long i; - - for (i =3D 0; i < ncontig; i++, addr +=3D pgsize, ptep++) { - pte_t pte =3D ptep_get_and_clear(mm, addr, ptep); - - /* - * If HW_AFDBM is enabled, then the HW could turn on - * the dirty or accessed bit for any page in the set, - * so check them all. - */ - if (pte_dirty(pte)) - orig_pte =3D pte_mkdirty(orig_pte); - - if (pte_young(pte)) - orig_pte =3D pte_mkyoung(orig_pte); - } - return orig_pte; -} - -static pte_t get_clear_contig_flush(struct mm_struct *mm, - unsigned long addr, - pte_t *ptep, - unsigned long pgsize, - unsigned long ncontig) -{ - pte_t orig_pte =3D get_clear_contig(mm, addr, ptep, pgsize, ncontig); - struct vm_area_struct vma =3D TLB_FLUSH_VMA(mm, 0); - - flush_tlb_range(&vma, addr, addr + (pgsize * ncontig)); - return orig_pte; -} - pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma, unsigned long addr, unsigned long sz) { @@ -284,20 +237,6 @@ pte_t arch_make_huge_pte(pte_t entry, unsigned int shi= ft, vm_flags_t flags) return entry; } =20 -pte_t huge_ptep_clear_flush(struct vm_area_struct *vma, - unsigned long addr, pte_t *ptep) -{ - struct mm_struct *mm =3D vma->vm_mm; - size_t pgsize; - int ncontig; - - if (!pte_cont(READ_ONCE(*ptep))) - return ptep_clear_flush(vma, addr, ptep); - - ncontig =3D find_num_contig(mm, addr, ptep, &pgsize); - return get_clear_contig_flush(mm, addr, ptep, pgsize, ncontig); -} - static int __init hugetlbpage_init(void) { if (pud_sect_supported()) diff --git a/arch/riscv/mm/hugetlbpage.c b/arch/riscv/mm/hugetlbpage.c index e6cbb6fb2904..caf1db6f8f20 100644 --- a/arch/riscv/mm/hugetlbpage.c +++ b/arch/riscv/mm/hugetlbpage.c @@ -121,42 +121,6 @@ unsigned long hugetlb_mask_last_page(struct hstate *h) return 0UL; } =20 -static pte_t get_clear_contig(struct mm_struct *mm, - unsigned long addr, - pte_t *ptep, - unsigned long pte_num) -{ - pte_t orig_pte =3D ptep_get(ptep); - unsigned long i; - - for (i =3D 0; i < pte_num; i++, addr +=3D PAGE_SIZE, ptep++) { - pte_t pte =3D ptep_get_and_clear(mm, addr, ptep); - - if (pte_dirty(pte)) - orig_pte =3D pte_mkdirty(orig_pte); - - if (pte_young(pte)) - orig_pte =3D pte_mkyoung(orig_pte); - } - - return orig_pte; -} - -static pte_t get_clear_contig_flush(struct mm_struct *mm, - unsigned long addr, - pte_t *ptep, - unsigned long pte_num) -{ - pte_t orig_pte =3D get_clear_contig(mm, addr, ptep, pte_num); - struct vm_area_struct vma =3D TLB_FLUSH_VMA(mm, 0); - bool valid =3D !pte_none(orig_pte); - - if (valid) - flush_tlb_range(&vma, addr, addr + (PAGE_SIZE * pte_num)); - - return orig_pte; -} - pte_t arch_make_huge_pte(pte_t entry, unsigned int shift, vm_flags_t flags) { unsigned long order; @@ -173,21 +137,6 @@ pte_t arch_make_huge_pte(pte_t entry, unsigned int shi= ft, vm_flags_t flags) return entry; } =20 -pte_t huge_ptep_clear_flush(struct vm_area_struct *vma, - unsigned long addr, - pte_t *ptep) -{ - pte_t pte =3D ptep_get(ptep); - int pte_num; - - if (!pte_napot(pte)) - return ptep_clear_flush(vma, addr, ptep); - - pte_num =3D arch_contpte_get_num_contig(vma->vm_mm, addr, ptep, 0, NULL); - - return get_clear_contig_flush(vma->vm_mm, addr, ptep, pte_num); -} - static bool is_napot_size(unsigned long size) { unsigned long order; diff --git a/mm/contpte.c b/mm/contpte.c index f7f26d2cfa23..445e5ebe46b4 100644 --- a/mm/contpte.c +++ b/mm/contpte.c @@ -23,6 +23,7 @@ * huge_ptep_get_and_clear() * huge_ptep_set_access_flags() * huge_ptep_set_wrprotect() + * huge_ptep_clear_flush() */ =20 pte_t huge_ptep_get(pte_t *ptep) @@ -251,3 +252,17 @@ void huge_ptep_set_wrprotect(struct mm_struct *mm, =20 set_contptes(mm, addr, ptep, pte, ncontig, pgsize); } + +pte_t huge_ptep_clear_flush(struct vm_area_struct *vma, + unsigned long addr, pte_t *ptep) +{ + struct mm_struct *mm =3D vma->vm_mm; + size_t pgsize; + int ncontig; + + if (!pte_cont(ptep_get(ptep))) + return ptep_clear_flush(vma, addr, ptep); + + ncontig =3D arch_contpte_get_num_contig(mm, addr, ptep, 0, &pgsize); + return get_clear_contig_flush(mm, addr, ptep, pgsize, ncontig); +} --=20 2.39.2