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Peter Anvin" Subject: [RFC PATCH 31/73] KVM: x86/PVM: Implement instruction emulation for #UD and #GP Date: Mon, 26 Feb 2024 22:35:48 +0800 Message-Id: <20240226143630.33643-32-jiangshanlai@gmail.com> X-Mailer: git-send-email 2.19.1.6.gb485710b In-Reply-To: <20240226143630.33643-1-jiangshanlai@gmail.com> References: <20240226143630.33643-1-jiangshanlai@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Lai Jiangshan The privilege instruction in supervisor mode will trigger a #GP and induce VM exit. Therefore, PVM reuses the existing x86 emulator in PVM to support privilege instruction emulation in supervisor mode. Signed-off-by: Lai Jiangshan Signed-off-by: Hou Wenlong --- arch/x86/kvm/pvm/pvm.c | 38 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/arch/x86/kvm/pvm/pvm.c b/arch/x86/kvm/pvm/pvm.c index 6f91dffb6c50..4ec8c2c514ca 100644 --- a/arch/x86/kvm/pvm/pvm.c +++ b/arch/x86/kvm/pvm/pvm.c @@ -402,6 +402,40 @@ static void pvm_sched_in(struct kvm_vcpu *vcpu, int cp= u) { } =20 +static void pvm_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hype= rcall) +{ + /* KVM_X86_QUIRK_FIX_HYPERCALL_INSN should not be enabled for pvm guest */ + + /* ud2; int3; */ + hypercall[0] =3D 0x0F; + hypercall[1] =3D 0x0B; + hypercall[2] =3D 0xCC; +} + +static int pvm_check_emulate_instruction(struct kvm_vcpu *vcpu, int emul_t= ype, + void *insn, int insn_len) +{ + return X86EMUL_CONTINUE; +} + +static int skip_emulated_instruction(struct kvm_vcpu *vcpu) +{ + return kvm_emulate_instruction(vcpu, EMULTYPE_SKIP); +} + +static int pvm_check_intercept(struct kvm_vcpu *vcpu, + struct x86_instruction_info *info, + enum x86_intercept_stage stage, + struct x86_exception *exception) +{ + /* + * HF_GUEST_MASK is not used even nested pvm is supported. L0 pvm + * might even be unaware the L1 pvm. + */ + WARN_ON_ONCE(1); + return X86EMUL_CONTINUE; +} + static void pvm_set_msr_linear_address_range(struct vcpu_pvm *pvm, u64 pml4_i_s, u64 pml4_i_e, u64 pml5_i_s, u64 pml5_i_e) @@ -1682,8 +1716,10 @@ static struct kvm_x86_ops pvm_x86_ops __initdata =3D= { .vcpu_pre_run =3D pvm_vcpu_pre_run, .vcpu_run =3D pvm_vcpu_run, .handle_exit =3D pvm_handle_exit, + .skip_emulated_instruction =3D skip_emulated_instruction, .set_interrupt_shadow =3D pvm_set_interrupt_shadow, .get_interrupt_shadow =3D pvm_get_interrupt_shadow, + .patch_hypercall =3D pvm_patch_hypercall, .inject_irq =3D pvm_inject_irq, .inject_nmi =3D pvm_inject_nmi, .inject_exception =3D pvm_inject_exception, @@ -1699,6 +1735,7 @@ static struct kvm_x86_ops pvm_x86_ops __initdata =3D { =20 .vcpu_after_set_cpuid =3D pvm_vcpu_after_set_cpuid, =20 + .check_intercept =3D pvm_check_intercept, .handle_exit_irqoff =3D pvm_handle_exit_irqoff, =20 .request_immediate_exit =3D __kvm_request_immediate_exit, @@ -1721,6 +1758,7 @@ static struct kvm_x86_ops pvm_x86_ops __initdata =3D { .complete_emulated_msr =3D kvm_complete_insn_gp, .vcpu_deliver_sipi_vector =3D kvm_vcpu_deliver_sipi_vector, =20 + .check_emulate_instruction =3D pvm_check_emulate_instruction, .disallowed_va =3D pvm_disallowed_va, .vcpu_gpc_refresh =3D pvm_vcpu_gpc_refresh, }; --=20 2.19.1.6.gb485710b