From nobody Fri Sep 20 01:35:29 2024 Received: from mail-wr1-f50.google.com (mail-wr1-f50.google.com [209.85.221.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B16C4139599 for ; Tue, 9 Apr 2024 13:42:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712670149; cv=none; b=hY8X707pRLUHEtBLE1p1ko2knz/X5c5+aQrLvbv58v02XExWovQE1dKUml64zZ9C6EkgEIpYUpQ407NCt4n2qCkP2IbGn3pvnPhFKhDvgcnPLE1Fyh3j/mJcg1AL4d0w0TwdmUDJakVk8sna1eg83rwq3rQ+NxeObM+NiuETmfg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712670149; c=relaxed/simple; bh=rupMHCo4ov9trVUAGySMN2xWWd+DYicdRaX3eev6dnk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Jz0H3GbV6Eun5ncd61wyNd1Zb6Jhk3VsrD/6vPHWxRTvW8vGEWKrmLhRC4RYeXRhPxdoMRPVY5JO3YDWGCjEjGmiMKO53/sr0cnCpUh1gLiJBCHVBcNmgwwkHkRNQpgKGGs/AAd9zXbEwWRVRt7JVrYy/A0RwaFj+dk4f2am5C4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b=1MCoSnID; arc=none smtp.client-ip=209.85.221.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b="1MCoSnID" Received: by mail-wr1-f50.google.com with SMTP id ffacd0b85a97d-3455ff1339dso1959991f8f.0 for ; Tue, 09 Apr 2024 06:42:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1712670145; x=1713274945; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=GTSY1ko++/wb2lPvySWoKOwaimob916R/fGD0IssuIQ=; b=1MCoSnID8g/DyU1EcpIYpk74XJnd+nQyXufhbreVnDCMET0h2OBzh7gsHyA3BR5I9/ 7tJnmvId5yMH2x+ySVQ8SnM4zAUI/q2SbqsqnLwB2B18gjM6udc9v3eImUXBCFZjQfLa 3LH3LAQRXtIcn7De0mYSVR82L1/pNAmjjIlYBFxxbvn+yZNW8MrScFr+0BU0KIqIhWgL 6po8ozYM8/tPSfHIHyMoCrYt1aPkrYuofIXqedpz2iv/sN6V6fWoLxkkdT93i5NckU6u h18t4P4kDz84Ld0514JZAd6DsucWu9Ky36efIYw9tu6dbze/9dfqPO0tXTIyP7nevTAu G+lQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1712670145; x=1713274945; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=GTSY1ko++/wb2lPvySWoKOwaimob916R/fGD0IssuIQ=; b=pQobliLdEhpXLxK87sjtulp9Jv43CRP99j5mM4A3AVTT/K1Z1KxkZnrK8Y4Fi/JHp2 dEvQ7Bu06TVyvSz6AaA8hDGVvtV9uV8quCeCaQB0SGNR6+sLcIQ85wbt/n8zS25EVgga wtTHRalgmelddd9LSL5v3U3Buyi+ytYog1K2ivqglciz2/jVk+5LMOL47NovJBKAOhxw cSbyupQGEbmnpCfm58ayeDm6DC9069j9A0vnmpjqieqsPGrsNb4mULJ5NWXlgRB6o9k2 KARZs6qVQVO0yUc+jbKckUSuGAUIpCqIFDeHI/G+lyy7TJvCpOPUAcN87k1TnX7hLmMu YqOQ== X-Forwarded-Encrypted: i=1; AJvYcCX/LOUvAprx3lYRLbuXLQoQy1FzrBL2mJcGcJxTu4EwZ14e8yiSue4+iGx41xbQBtr79//W1P9N1N1ioTB8TEjwJjLVRU0sE4OMdyc9 X-Gm-Message-State: AOJu0YzEWcpxNDE6bJZufP69FHwRUj3jwlNfCyNk93dpvePfxIAk596g J7wpmQfq2HXn4fUGW2IUEs9K7UgwzNBlEEF+2agCV2CpWcPKgBAQ9X+AlAR5C141Mn+xj/C081M x+pI= X-Google-Smtp-Source: AGHT+IEqTXuQ9vUhLAGUJddJlynr3Hgv8g1A9SL9yf+aGDwibGHFcaB9hafvGzYGFH6ippvirWYDUA== X-Received: by 2002:a5d:6d81:0:b0:345:e3e9:f063 with SMTP id l1-20020a5d6d81000000b00345e3e9f063mr4281547wrs.59.1712670145020; Tue, 09 Apr 2024 06:42:25 -0700 (PDT) Received: from [127.0.1.1] ([93.5.22.158]) by smtp.googlemail.com with ESMTPSA id j11-20020adff54b000000b003433bf6651dsm10753579wrp.75.2024.04.09.06.42.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Apr 2024 06:42:24 -0700 (PDT) From: Alexandre Mergnat Date: Tue, 09 Apr 2024 15:42:06 +0200 Subject: [PATCH v3 08/18] ASoC: mediatek: mt8365: Add ADDA DAI support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240226-audio-i350-v3-8-16bb2c974c55@baylibre.com> References: <20240226-audio-i350-v3-0-16bb2c974c55@baylibre.com> In-Reply-To: <20240226-audio-i350-v3-0-16bb2c974c55@baylibre.com> To: Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Lee Jones , Flora Fu , Jaroslav Kysela , Takashi Iwai , Sumit Semwal , =?utf-8?q?Christian_K=C3=B6nig?= , Catalin Marinas , Will Deacon , Rob Herring Cc: linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, linaro-mm-sig@lists.linaro.org, Alexandre Mergnat X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=10092; i=amergnat@baylibre.com; h=from:subject:message-id; bh=rupMHCo4ov9trVUAGySMN2xWWd+DYicdRaX3eev6dnk=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBmFUWsOUxDkfb5Y6lEXLcqiv/Q4r3YM0QpDXUzDn10 19y3N96JAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZhVFrAAKCRArRkmdfjHURectD/ 9s0QdsZOWYWPWRTbuAWsfsKjlECL2HPlJkV0BC33MQ6nzp49VKIfcVeDSsP7AXEo/p5/+YZu+PGlc6 Av4NyWFNyj+xgpn9hVrwPViIoD5XmF2opMUKfgpiYuhahZx2b2zVWOtCZEhfP66nS9pIaHxQRrrYph PMBEklKT3PZVF0HwXEPDH7NWRUfcrjsW8QTp3ooP+Nnv0etcz3qnAv9kGSUczTv5uUT4jp6dXZnOFn /aJKweOIkR64gAo9e4ldIhPVFNklZPZWfSIxwKY79m3Zy5FauGRK5uVhV8UH/111cnSaTEf2NLBrqE PvAjnQxTv5nfh2qXXF+9p4kjji5DyPhPqRMPZDuR+HoPGcs8X2D7P7oQZeQz3zRZBVv7Fywf2eqTHy fgr3ZxyMPd6cVdrNqHStauwRbKwadgLUMWm44pSyFEYqMZx2MWRlDvht8xWarmwjBe7svrc7ZQu47F FiTZTENiWfevkdVAhav0yRPz8tg2/ELu2kT2y0CtzuBYlPKvX+Wf1yLc06fk9gtpgwbuFy27t6V+M8 nlaf/ICE1mZBgiFjgDlBNbOuyergt2DjpL4lVu6nttjhwDk9Fl5EDtsPXRIlCKfu9FzMplEBSexMl7 78Upemv9Hyn7fcnoGq14wIa8AfeSxbxUP2lpQ9+ftMf7Gqos8U3xzsLfBbHg== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 Add ADDA Device Audio Interface support for MT8365 SoC. Signed-off-by: Alexandre Mergnat --- sound/soc/mediatek/mt8365/mt8365-dai-adda.c | 315 ++++++++++++++++++++++++= ++++ 1 file changed, 315 insertions(+) diff --git a/sound/soc/mediatek/mt8365/mt8365-dai-adda.c b/sound/soc/mediat= ek/mt8365/mt8365-dai-adda.c new file mode 100644 index 000000000000..65d45010ac90 --- /dev/null +++ b/sound/soc/mediatek/mt8365/mt8365-dai-adda.c @@ -0,0 +1,315 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Mediatek 8365 ALSA SoC Audio DAI ADDA Control + * + * Copyright (c) 2024 MediaTek Inc. + * Authors: Jia Zeng + * Alexandre Mergnat + */ + +#include +#include +#include +#include "mt8365-afe-clk.h" +#include "mt8365-afe-common.h" +#include "../common/mtk-dai-adda-common.h" + +static int adda_afe_on_ref_cnt; + +/* DAI Drivers */ + +static int mt8365_dai_set_adda_out(struct mtk_base_afe *afe, unsigned int = rate) +{ + unsigned int val; + + switch (rate) { + case 8000: + val =3D AFE_ADDA_DL_VOICE_DATA; + break; + case 16000: + val =3D AFE_ADDA_DL_VOICE_DATA; + break; + default: + val =3D 0; + } + + val |=3D FIELD_PREP(AFE_ADDA_DL_SAMPLING_RATE, + mtk_adda_dl_rate_transform(afe, rate)); + val |=3D AFE_ADDA_DL_8X_UPSAMPLE | + AFE_ADDA_DL_MUTE_OFF_CH1 | + AFE_ADDA_DL_MUTE_OFF_CH2 | + AFE_ADDA_DL_DEGRADE_GAIN; + + regmap_update_bits(afe->regmap, AFE_ADDA_PREDIS_CON0, 0xffffffff, 0); + regmap_update_bits(afe->regmap, AFE_ADDA_PREDIS_CON1, 0xffffffff, 0); + regmap_update_bits(afe->regmap, AFE_ADDA_DL_SRC2_CON0, 0xffffffff, val); + /* SA suggest apply -0.3db to audio/speech path */ + regmap_update_bits(afe->regmap, AFE_ADDA_DL_SRC2_CON1, + 0xffffffff, 0xf74f0000); + /* SA suggest use default value for sdm */ + regmap_update_bits(afe->regmap, AFE_ADDA_DL_SDM_DCCOMP_CON, + 0xffffffff, 0x0700701e); + + return 0; +} + +static int mt8365_dai_set_adda_in(struct mtk_base_afe *afe, unsigned int r= ate) +{ + unsigned int val; + + val =3D FIELD_PREP(AFE_ADDA_UL_SAMPLING_RATE, + mtk_adda_ul_rate_transform(afe, rate)); + regmap_update_bits(afe->regmap, AFE_ADDA_UL_SRC_CON0, + AFE_ADDA_UL_SAMPLING_RATE, val); + /* Using Internal ADC */ + regmap_update_bits(afe->regmap, AFE_ADDA_TOP_CON0, 0x1, 0x0); + + return 0; +} + +int mt8365_dai_enable_adda_on(struct mtk_base_afe *afe) +{ + unsigned long flags; + struct mt8365_afe_private *afe_priv =3D afe->platform_priv; + + spin_lock_irqsave(&afe_priv->afe_ctrl_lock, flags); + + adda_afe_on_ref_cnt++; + if (adda_afe_on_ref_cnt =3D=3D 1) + regmap_update_bits(afe->regmap, AFE_ADDA_UL_DL_CON0, + AFE_ADDA_UL_DL_ADDA_AFE_ON, + AFE_ADDA_UL_DL_ADDA_AFE_ON); + + spin_unlock_irqrestore(&afe_priv->afe_ctrl_lock, flags); + + return 0; +} + +int mt8365_dai_disable_adda_on(struct mtk_base_afe *afe) +{ + unsigned long flags; + struct mt8365_afe_private *afe_priv =3D afe->platform_priv; + + spin_lock_irqsave(&afe_priv->afe_ctrl_lock, flags); + + adda_afe_on_ref_cnt--; + if (adda_afe_on_ref_cnt =3D=3D 0) + regmap_update_bits(afe->regmap, AFE_ADDA_UL_DL_CON0, + AFE_ADDA_UL_DL_ADDA_AFE_ON, + ~AFE_ADDA_UL_DL_ADDA_AFE_ON); + else if (adda_afe_on_ref_cnt < 0) + adda_afe_on_ref_cnt =3D 0; + + spin_unlock_irqrestore(&afe_priv->afe_ctrl_lock, flags); + + return 0; +} + +static void mt8365_dai_set_adda_out_enable(struct mtk_base_afe *afe, + bool enable) +{ + regmap_update_bits(afe->regmap, AFE_ADDA_DL_SRC2_CON0, 0x1, enable); + + if (enable) + mt8365_dai_enable_adda_on(afe); + else + mt8365_dai_disable_adda_on(afe); +} + +static void mt8365_dai_set_adda_in_enable(struct mtk_base_afe *afe, bool e= nable) +{ + if (enable) { + regmap_update_bits(afe->regmap, AFE_ADDA_UL_SRC_CON0, 0x1, 0x1); + mt8365_dai_enable_adda_on(afe); + /* enable aud_pad_top fifo */ + regmap_update_bits(afe->regmap, AFE_AUD_PAD_TOP, + 0xffffffff, 0x31); + } else { + /* disable aud_pad_top fifo */ + regmap_update_bits(afe->regmap, AFE_AUD_PAD_TOP, + 0xffffffff, 0x30); + regmap_update_bits(afe->regmap, AFE_ADDA_UL_SRC_CON0, 0x1, 0x0); + /* de suggest disable ADDA_UL_SRC at least wait 125us */ + usleep_range(150, 300); + mt8365_dai_disable_adda_on(afe); + } +} + +static int mt8365_dai_int_adda_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe =3D snd_soc_dai_get_drvdata(dai); + unsigned int stream =3D substream->stream; + + mt8365_afe_enable_main_clk(afe); + + if (stream =3D=3D SNDRV_PCM_STREAM_PLAYBACK) { + mt8365_afe_enable_top_cg(afe, MT8365_TOP_CG_DAC); + mt8365_afe_enable_top_cg(afe, MT8365_TOP_CG_DAC_PREDIS); + } else if (stream =3D=3D SNDRV_PCM_STREAM_CAPTURE) { + mt8365_afe_enable_top_cg(afe, MT8365_TOP_CG_ADC); + } + + return 0; +} + +static void mt8365_dai_int_adda_shutdown(struct snd_pcm_substream *substre= am, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe =3D snd_soc_dai_get_drvdata(dai); + struct mt8365_afe_private *afe_priv =3D afe->platform_priv; + struct mt8365_be_dai_data *be =3D + &afe_priv->be_data[dai->id - MT8365_AFE_BACKEND_BASE]; + unsigned int stream =3D substream->stream; + + if (be->prepared[stream]) { + if (stream =3D=3D SNDRV_PCM_STREAM_PLAYBACK) { + mt8365_dai_set_adda_out_enable(afe, false); + mt8365_afe_set_i2s_out_enable(afe, false); + } else { + mt8365_dai_set_adda_in_enable(afe, false); + } + be->prepared[stream] =3D false; + } + + if (stream =3D=3D SNDRV_PCM_STREAM_PLAYBACK) { + mt8365_afe_disable_top_cg(afe, MT8365_TOP_CG_DAC_PREDIS); + mt8365_afe_disable_top_cg(afe, MT8365_TOP_CG_DAC); + } else if (stream =3D=3D SNDRV_PCM_STREAM_CAPTURE) { + mt8365_afe_disable_top_cg(afe, MT8365_TOP_CG_ADC); + } + + mt8365_afe_disable_main_clk(afe); +} + +static int mt8365_dai_int_adda_prepare(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe =3D snd_soc_dai_get_drvdata(dai); + struct mt8365_afe_private *afe_priv =3D afe->platform_priv; + struct mt8365_be_dai_data *be =3D + &afe_priv->be_data[dai->id - MT8365_AFE_BACKEND_BASE]; + unsigned int rate =3D substream->runtime->rate; + int bit_width =3D snd_pcm_format_width(substream->runtime->format); + int ret; + + dev_info(afe->dev, "%s '%s' rate =3D %u\n", __func__, + snd_pcm_stream_str(substream), rate); + + if (be->prepared[substream->stream]) { + dev_info(afe->dev, "%s '%s' prepared already\n", + __func__, snd_pcm_stream_str(substream)); + return 0; + } + + if (substream->stream =3D=3D SNDRV_PCM_STREAM_PLAYBACK) { + ret =3D mt8365_dai_set_adda_out(afe, rate); + if (ret) + return ret; + + ret =3D mt8365_afe_set_i2s_out(afe, rate, bit_width); + if (ret) + return ret; + + mt8365_dai_set_adda_out_enable(afe, true); + mt8365_afe_set_i2s_out_enable(afe, true); + } else { + ret =3D mt8365_dai_set_adda_in(afe, rate); + if (ret) + return ret; + + mt8365_dai_set_adda_in_enable(afe, true); + } + be->prepared[substream->stream] =3D true; + return 0; +} + +static const struct snd_soc_dai_ops mt8365_afe_int_adda_ops =3D { + .startup =3D mt8365_dai_int_adda_startup, + .shutdown =3D mt8365_dai_int_adda_shutdown, + .prepare =3D mt8365_dai_int_adda_prepare, +}; + +static struct snd_soc_dai_driver mtk_dai_adda_driver[] =3D { + { + .name =3D "INT ADDA", + .id =3D MT8365_AFE_IO_INT_ADDA, + .playback =3D { + .stream_name =3D "INT ADDA Playback", + .channels_min =3D 1, + .channels_max =3D 2, + .rates =3D SNDRV_PCM_RATE_8000_48000, + .formats =3D SNDRV_PCM_FMTBIT_S16_LE, + }, + .capture =3D { + .stream_name =3D "INT ADDA Capture", + .channels_min =3D 1, + .channels_max =3D 2, + .rates =3D SNDRV_PCM_RATE_16000 | + SNDRV_PCM_RATE_32000 | + SNDRV_PCM_RATE_48000, + .formats =3D SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S32_LE, + }, + .ops =3D &mt8365_afe_int_adda_ops, + } +}; + +/* DAI Controls */ + +static const struct snd_kcontrol_new mtk_adda_dl_ch1_mix[] =3D { + SOC_DAPM_SINGLE_AUTODISABLE("GAIN1_OUT_CH1 Switch", AFE_CONN3, + 10, 1, 0), +}; + +static const struct snd_kcontrol_new mtk_adda_dl_ch2_mix[] =3D { + SOC_DAPM_SINGLE_AUTODISABLE("GAIN1_OUT_CH2 Switch", AFE_CONN4, + 11, 1, 0), +}; + +static const struct snd_kcontrol_new int_adda_o03_o04_enable_ctl =3D + SOC_DAPM_SINGLE_VIRT("Switch", 1); + +/* DAI widget */ + +static const struct snd_soc_dapm_widget mtk_dai_adda_widgets[] =3D { + SND_SOC_DAPM_SWITCH("INT ADDA O03_O04", SND_SOC_NOPM, 0, 0, + &int_adda_o03_o04_enable_ctl), + /* inter-connections */ + SND_SOC_DAPM_MIXER("ADDA_DL_CH1", SND_SOC_NOPM, 0, 0, + mtk_adda_dl_ch1_mix, + ARRAY_SIZE(mtk_adda_dl_ch1_mix)), + SND_SOC_DAPM_MIXER("ADDA_DL_CH2", SND_SOC_NOPM, 0, 0, + mtk_adda_dl_ch2_mix, + ARRAY_SIZE(mtk_adda_dl_ch2_mix)), +}; + +/* DAI route */ + +static const struct snd_soc_dapm_route mtk_dai_adda_routes[] =3D { + {"INT ADDA O03_O04", "Switch", "O03"}, + {"INT ADDA O03_O04", "Switch", "O04"}, + {"INT ADDA Playback", NULL, "INT ADDA O03_O04"}, + {"INT ADDA Playback", NULL, "ADDA_DL_CH1"}, + {"INT ADDA Playback", NULL, "ADDA_DL_CH2"}, + {"AIN Mux", "INT ADC", "INT ADDA Capture"}, + {"ADDA_DL_CH1", "GAIN1_OUT_CH1", "Hostless FM DL"}, + {"ADDA_DL_CH2", "GAIN1_OUT_CH2", "Hostless FM DL"}, +}; + +int mt8365_dai_adda_register(struct mtk_base_afe *afe) +{ + struct mtk_base_afe_dai *dai; + + dai =3D devm_kzalloc(afe->dev, sizeof(*dai), GFP_KERNEL); + if (!dai) + return -ENOMEM; + list_add(&dai->list, &afe->sub_dais); + dai->dai_drivers =3D mtk_dai_adda_driver; + dai->num_dai_drivers =3D ARRAY_SIZE(mtk_dai_adda_driver); + dai->dapm_widgets =3D mtk_dai_adda_widgets; + dai->num_dapm_widgets =3D ARRAY_SIZE(mtk_dai_adda_widgets); + dai->dapm_routes =3D mtk_dai_adda_routes; + dai->num_dapm_routes =3D ARRAY_SIZE(mtk_dai_adda_routes); + return 0; +} --=20 2.25.1