From nobody Sun Feb 8 16:50:30 2026 Received: from mail-oi1-f172.google.com (mail-oi1-f172.google.com [209.85.167.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3FCED12E68; Sun, 25 Feb 2024 06:53:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708844022; cv=none; b=R+7cnkco/cJJNup9s7q+Y5mASBCjs4JgUP1+Scghgkff8xxHNxpgU7aT1UFGVnXgOlzemu99i5fNGEsiGdSmxvjdqRvHq/0mWYrw90RS0IE4sr0XHP7AqMIz3WL0vzhEEwm9hpTZK+N511PI/CK/AyUMrW6mmSvBnZ7emtfqOJ4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708844022; c=relaxed/simple; bh=SJoZesSDN/LALIUDBjyV8uFC+wiNMiRGnhe3tt2Pajw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=QEkWWDlM0EAebBTpEeAdCh8+lWjBZvoKbESlBe9jWoO5gupi0Ll3xlD+1IdOiEtMMsn+P9+B6/RD3RD69PoStEBLlTqNr6aMR0XFm7TPBfN/oZulNLrnGQrS5su4MF4+NO7R6kATFH3RYwZJhFYuORR5ByB4pI9qUEQVeE9q2a8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=Gy4EzBgS; arc=none smtp.client-ip=209.85.167.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Gy4EzBgS" Received: by mail-oi1-f172.google.com with SMTP id 5614622812f47-3c19bc08f96so283632b6e.2; Sat, 24 Feb 2024 22:53:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1708844019; x=1709448819; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=nfC2VSJt15jT4AO8jfaCdio/v9SjA+Lz75n1oo/iM9s=; b=Gy4EzBgS0xKBan7sj3VfrEEhQ41ji4+FUYgmE/f9Un8/PKdNaWH41bO1FKgtLcLLZO vVzG9DCzzZulIYgOrgcnqgc+YKQJf3UDGvTbDxvzQjpUCahUIPXAn4G30CshM3DCZtxT kVYUpEGAJsoyXRVkdLS513IK5iUCh+x+S5ouWtnP0Vii/iQq97l7+7msf+22KlRJdBJw JS/HlB7fgQCt9Ii4Gm9A+8HLctps5h8eZVE7jtL0MXFEagQv+ZJqj5bz9iTy2uYGxlJR P9lnEl+OE7Q1pM/BRRq5+BVRuNush6g5nyNX9RaRPMmW72ainT/vqy/OzuVKmfJrkU4U NyqA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1708844019; x=1709448819; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=nfC2VSJt15jT4AO8jfaCdio/v9SjA+Lz75n1oo/iM9s=; b=LIN4z2leW8Ee5Uf0tSrx+Kgagp0+s6SqyNNmEXg65q1aUfRy6BqUc7Hjy4SxH/nZfD vW2U5MJX0PMTP9mA7nnEd29ZE2LZrrgO+s6kc9khY5BBttqk7EViH6yVS5sLuWNi/X10 Wpx3CSymf02SC+lzddCYlqZlijZ/jewdS6W8DZHb7Jc7xARnAFc5WoM45BKgGQoSwXyz EZ4TAllRP/oEh2QTGv9ghgzEwbZRJj+YsZQoG6/Pka6SCCcMl811oVs+xkNQ0f1Bq9rD Dixl9yVvrTkm9swe1LQUkLh+xDQharYeriBOmH9xeO04tJIGE1ieEE40SkpBBXuknras 7Zlg== X-Forwarded-Encrypted: i=1; AJvYcCXG6lQ77Qmix8KTytMZ79+TrBlObSyeLTa1xnGsCF+X5E1gTzeuOsEKj3bRsjodCqS1/8RgakbMoz5N7tgtgRIgdxl5yEe/P/zovpUP X-Gm-Message-State: AOJu0YxJJ8KoTbtlYgOCIpnt2uYdfTTBc0mfsypRK5iigJnGt0FU8+IH AHhuThQ06xMW0eknmjXRxPJ0qajPk6dF0FTHnA2gtZuX/KXU6lPnTkQ3aC40Q9ulrA== X-Google-Smtp-Source: AGHT+IFO1OVDxrDX34JjXyzmx+x7QBYgFvQBuW91eF8G4wU6VRMctcuPzw78XFh+l+tT4nb1En5Phw== X-Received: by 2002:a05:6808:4487:b0:3bf:bf81:c700 with SMTP id eq7-20020a056808448700b003bfbf81c700mr6721106oib.16.1708844018966; Sat, 24 Feb 2024 22:53:38 -0800 (PST) Received: from localhost.localdomain ([171.218.176.26]) by smtp.gmail.com with ESMTPSA id p18-20020a056a0026d200b006e45b910a98sm1930313pfw.6.2024.02.24.22.53.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 24 Feb 2024 22:53:38 -0800 (PST) From: David Yang To: linux-clk@vger.kernel.org Cc: Yang Xiwen , David Yang , Michael Turquette , Stephen Boyd , linux-kernel@vger.kernel.org Subject: [PATCH v7 06/13] clk: hisilicon: hi3559a: Use helper functions Date: Sun, 25 Feb 2024 14:52:21 +0800 Message-ID: <20240225065234.413687-7-mmyangfl@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240225065234.413687-1-mmyangfl@gmail.com> References: <20240225065234.413687-1-mmyangfl@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use common helper functions and register clks with a single of_device_id data. Signed-off-by: David Yang --- drivers/clk/hisilicon/clk-hi3559a.c | 231 +++++----------------------- 1 file changed, 37 insertions(+), 194 deletions(-) diff --git a/drivers/clk/hisilicon/clk-hi3559a.c b/drivers/clk/hisilicon/cl= k-hi3559a.c index ff4ca0edce06..5d3b36c90886 100644 --- a/drivers/clk/hisilicon/clk-hi3559a.c +++ b/drivers/clk/hisilicon/clk-hi3559a.c @@ -11,7 +11,6 @@ #include #include #include -#include =20 #include =20 @@ -452,21 +451,23 @@ static const struct clk_ops hisi_clk_pll_ops =3D { .recalc_rate =3D clk_pll_recalc_rate, }; =20 -static void hisi_clk_register_pll(struct hi3559av100_pll_clock *clks, - int nums, struct hisi_clock_data *data, struct device *dev) +static int +hisi_clk_register_pll(struct device *dev, const void *clocks, + size_t num, struct hisi_clock_data *data) { + const struct hi3559av100_pll_clock *clks =3D clocks; void __iomem *base =3D data->base; struct hi3559av100_clk_pll *p_clk =3D NULL; struct clk *clk =3D NULL; struct clk_init_data init; int i; =20 - p_clk =3D devm_kzalloc(dev, sizeof(*p_clk) * nums, GFP_KERNEL); + p_clk =3D devm_kzalloc(dev, sizeof(*p_clk) * num, GFP_KERNEL); =20 if (!p_clk) - return; + return -ENOMEM; =20 - for (i =3D 0; i < nums; i++) { + for (i =3D 0; i < num; i++) { init.name =3D clks[i].name; init.flags =3D 0; init.parent_names =3D @@ -494,78 +495,27 @@ static void hisi_clk_register_pll(struct hi3559av100_= pll_clock *clks, devm_kfree(dev, p_clk); dev_err(dev, "%s: failed to register clock %s\n", __func__, clks[i].name); - continue; + return PTR_ERR(clk); } =20 data->clk_data.clks[clks[i].id] =3D clk; p_clk++; } -} - -static struct hisi_clock_data *hi3559av100_clk_register( - struct platform_device *pdev) -{ - struct hisi_clock_data *clk_data; - int ret; - - clk_data =3D hisi_clk_alloc(pdev, HI3559AV100_CRG_NR_CLKS); - if (!clk_data) - return ERR_PTR(-ENOMEM); - - ret =3D hisi_clk_register_fixed_rate(hi3559av100_fixed_rate_clks_crg, - ARRAY_SIZE(hi3559av100_fixed_rate_clks_crg), clk_data); - if (ret) - return ERR_PTR(ret); - - hisi_clk_register_pll(hi3559av100_pll_clks, - ARRAY_SIZE(hi3559av100_pll_clks), clk_data, &pdev->dev); - - ret =3D hisi_clk_register_mux(hi3559av100_mux_clks_crg, - ARRAY_SIZE(hi3559av100_mux_clks_crg), clk_data); - if (ret) - goto unregister_fixed_rate; - - ret =3D hisi_clk_register_gate(hi3559av100_gate_clks, - ARRAY_SIZE(hi3559av100_gate_clks), clk_data); - if (ret) - goto unregister_mux; - - ret =3D of_clk_add_provider(pdev->dev.of_node, - of_clk_src_onecell_get, &clk_data->clk_data); - if (ret) - goto unregister_gate; - - return clk_data; - -unregister_gate: - hisi_clk_unregister_gate(hi3559av100_gate_clks, - ARRAY_SIZE(hi3559av100_gate_clks), clk_data); -unregister_mux: - hisi_clk_unregister_mux(hi3559av100_mux_clks_crg, - ARRAY_SIZE(hi3559av100_mux_clks_crg), clk_data); -unregister_fixed_rate: - hisi_clk_unregister_fixed_rate(hi3559av100_fixed_rate_clks_crg, - ARRAY_SIZE(hi3559av100_fixed_rate_clks_crg), clk_data); - return ERR_PTR(ret); -} =20 -static void hi3559av100_clk_unregister(struct platform_device *pdev) -{ - struct hisi_crg_dev *crg =3D platform_get_drvdata(pdev); - - of_clk_del_provider(pdev->dev.of_node); - - hisi_clk_unregister_gate(hi3559av100_gate_clks, - ARRAY_SIZE(hi3559av100_gate_clks), crg->clk_data); - hisi_clk_unregister_mux(hi3559av100_mux_clks_crg, - ARRAY_SIZE(hi3559av100_mux_clks_crg), crg->clk_data); - hisi_clk_unregister_fixed_rate(hi3559av100_fixed_rate_clks_crg, - ARRAY_SIZE(hi3559av100_fixed_rate_clks_crg), crg->clk_data); + return 0; } =20 -static const struct hisi_crg_funcs hi3559av100_crg_funcs =3D { - .register_clks =3D hi3559av100_clk_register, - .unregister_clks =3D hi3559av100_clk_unregister, +static const struct hisi_clocks hi3559av100_clks =3D { + .nr =3D HI3559AV100_CRG_NR_CLKS, + .fixed_rate_clks =3D hi3559av100_fixed_rate_clks_crg, + .fixed_rate_clks_num =3D ARRAY_SIZE(hi3559av100_fixed_rate_clks_crg), + .mux_clks =3D hi3559av100_mux_clks_crg, + .mux_clks_num =3D ARRAY_SIZE(hi3559av100_mux_clks_crg), + .gate_clks =3D hi3559av100_gate_clks, + .gate_clks_num =3D ARRAY_SIZE(hi3559av100_gate_clks), + .customized_clks =3D hi3559av100_pll_clks, + .customized_clks_num =3D ARRAY_SIZE(hi3559av100_pll_clks), + .clk_register_customized =3D hisi_clk_register_pll, }; =20 static struct hisi_fixed_rate_clock hi3559av100_shub_fixed_rate_clks[] =3D= { @@ -673,7 +623,7 @@ static struct hisi_gate_clock hi3559av100_shub_gate_clk= s[] =3D { }, }; =20 -static int hi3559av100_shub_default_clk_set(void) +static int hi3559av100_shub_default_clk_set(struct device *dev, struct his= i_clock_data *data) { void __iomem *crg_base; unsigned int val; @@ -696,148 +646,41 @@ static int hi3559av100_shub_default_clk_set(void) return 0; } =20 -static struct hisi_clock_data *hi3559av100_shub_clk_register( - struct platform_device *pdev) -{ - struct hisi_clock_data *clk_data =3D NULL; - int ret; - - hi3559av100_shub_default_clk_set(); - - clk_data =3D hisi_clk_alloc(pdev, HI3559AV100_SHUB_NR_CLKS); - if (!clk_data) - return ERR_PTR(-ENOMEM); - - ret =3D hisi_clk_register_fixed_rate(hi3559av100_shub_fixed_rate_clks, - ARRAY_SIZE(hi3559av100_shub_fixed_rate_clks), clk_data); - if (ret) - return ERR_PTR(ret); - - ret =3D hisi_clk_register_mux(hi3559av100_shub_mux_clks, - ARRAY_SIZE(hi3559av100_shub_mux_clks), clk_data); - if (ret) - goto unregister_fixed_rate; - - ret =3D hisi_clk_register_divider(hi3559av100_shub_div_clks, - ARRAY_SIZE(hi3559av100_shub_div_clks), clk_data); - if (ret) - goto unregister_mux; - - ret =3D hisi_clk_register_gate(hi3559av100_shub_gate_clks, - ARRAY_SIZE(hi3559av100_shub_gate_clks), clk_data); - if (ret) - goto unregister_factor; - - ret =3D of_clk_add_provider(pdev->dev.of_node, - of_clk_src_onecell_get, &clk_data->clk_data); - if (ret) - goto unregister_gate; - - return clk_data; - -unregister_gate: - hisi_clk_unregister_gate(hi3559av100_shub_gate_clks, - ARRAY_SIZE(hi3559av100_shub_gate_clks), clk_data); -unregister_factor: - hisi_clk_unregister_divider(hi3559av100_shub_div_clks, - ARRAY_SIZE(hi3559av100_shub_div_clks), clk_data); -unregister_mux: - hisi_clk_unregister_mux(hi3559av100_shub_mux_clks, - ARRAY_SIZE(hi3559av100_shub_mux_clks), clk_data); -unregister_fixed_rate: - hisi_clk_unregister_fixed_rate(hi3559av100_shub_fixed_rate_clks, - ARRAY_SIZE(hi3559av100_shub_fixed_rate_clks), clk_data); - return ERR_PTR(ret); -} - -static void hi3559av100_shub_clk_unregister(struct platform_device *pdev) -{ - struct hisi_crg_dev *crg =3D platform_get_drvdata(pdev); - - of_clk_del_provider(pdev->dev.of_node); - - hisi_clk_unregister_gate(hi3559av100_shub_gate_clks, - ARRAY_SIZE(hi3559av100_shub_gate_clks), crg->clk_data); - hisi_clk_unregister_divider(hi3559av100_shub_div_clks, - ARRAY_SIZE(hi3559av100_shub_div_clks), crg->clk_data); - hisi_clk_unregister_mux(hi3559av100_shub_mux_clks, - ARRAY_SIZE(hi3559av100_shub_mux_clks), crg->clk_data); - hisi_clk_unregister_fixed_rate(hi3559av100_shub_fixed_rate_clks, - ARRAY_SIZE(hi3559av100_shub_fixed_rate_clks), crg->clk_data); -} - -static const struct hisi_crg_funcs hi3559av100_shub_crg_funcs =3D { - .register_clks =3D hi3559av100_shub_clk_register, - .unregister_clks =3D hi3559av100_shub_clk_unregister, +static const struct hisi_clocks hi3559av100_shub_clks =3D { + .nr =3D HI3559AV100_SHUB_NR_CLKS, + .prologue =3D hi3559av100_shub_default_clk_set, + .fixed_rate_clks =3D hi3559av100_shub_fixed_rate_clks, + .fixed_rate_clks_num =3D ARRAY_SIZE(hi3559av100_shub_fixed_rate_clks), + .mux_clks =3D hi3559av100_shub_mux_clks, + .mux_clks_num =3D ARRAY_SIZE(hi3559av100_shub_mux_clks), + .divider_clks =3D hi3559av100_shub_div_clks, + .divider_clks_num =3D ARRAY_SIZE(hi3559av100_shub_div_clks), + .gate_clks =3D hi3559av100_shub_gate_clks, + .gate_clks_num =3D ARRAY_SIZE(hi3559av100_shub_gate_clks), }; =20 static const struct of_device_id hi3559av100_crg_match_table[] =3D { { .compatible =3D "hisilicon,hi3559av100-clock", - .data =3D &hi3559av100_crg_funcs + .data =3D &hi3559av100_clks }, { .compatible =3D "hisilicon,hi3559av100-shub-clock", - .data =3D &hi3559av100_shub_crg_funcs + .data =3D &hi3559av100_shub_clks }, { } }; MODULE_DEVICE_TABLE(of, hi3559av100_crg_match_table); =20 -static int hi3559av100_crg_probe(struct platform_device *pdev) -{ - struct hisi_crg_dev *crg; - - crg =3D devm_kmalloc(&pdev->dev, sizeof(*crg), GFP_KERNEL); - if (!crg) - return -ENOMEM; - - crg->funcs =3D of_device_get_match_data(&pdev->dev); - if (!crg->funcs) - return -ENOENT; - - crg->rstc =3D hisi_reset_init(pdev); - if (!crg->rstc) - return -ENOMEM; - - crg->clk_data =3D crg->funcs->register_clks(pdev); - if (IS_ERR(crg->clk_data)) { - hisi_reset_exit(crg->rstc); - return PTR_ERR(crg->clk_data); - } - - platform_set_drvdata(pdev, crg); - return 0; -} - -static void hi3559av100_crg_remove(struct platform_device *pdev) -{ - struct hisi_crg_dev *crg =3D platform_get_drvdata(pdev); - - hisi_reset_exit(crg->rstc); - crg->funcs->unregister_clks(pdev); -} - static struct platform_driver hi3559av100_crg_driver =3D { - .probe =3D hi3559av100_crg_probe, - .remove_new =3D hi3559av100_crg_remove, + .probe =3D hisi_crg_probe, + .remove_new =3D hisi_crg_remove, .driver =3D { .name =3D "hi3559av100-clock", .of_match_table =3D hi3559av100_crg_match_table, }, }; =20 -static int __init hi3559av100_crg_init(void) -{ - return platform_driver_register(&hi3559av100_crg_driver); -} -core_initcall(hi3559av100_crg_init); - -static void __exit hi3559av100_crg_exit(void) -{ - platform_driver_unregister(&hi3559av100_crg_driver); -} -module_exit(hi3559av100_crg_exit); - +module_platform_driver(hi3559av100_crg_driver); =20 MODULE_DESCRIPTION("HiSilicon Hi3559AV100 CRG Driver"); --=20 2.43.0