From nobody Tue Dec 16 11:04:33 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5F5974CE05; Sat, 24 Feb 2024 21:33:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708810393; cv=none; b=tCHzzGM9Lp9KQF/3z+ufj0EUEAeiS/aws7q7JKRXobC3UMNb25TeS0myacL48wzB5moalIBksClZ6WektcjHWT4h+F7iSgbjPttAJ4OUoPxagH0VzrHvsFzDRB3mozXiLrUNMbxLIpsZbfq+FiLvT2os/cvHR/hkMDZlwaeO5XM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708810393; c=relaxed/simple; bh=resC3EdVnr1VmQ6d66ZukTMXBA464nmyoeCuIzkpf5w=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=lVwJ0J+DlPOtfyiAPk0cZeXshr1cQlAxEMYG682MB8pzIHNpqnPDRu6oB03JT1prF8N9CS18/o+tx3SZjzmiJirJhIFIWtUymlS1TrTApkhKJFW9imXLxslqRo9ALI7/VwOF/Oh0aA749xovagswZsLhYnZRQrzoYgN+zhlhOyM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=JPOybeRd; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="JPOybeRd" Received: by smtp.kernel.org (Postfix) with ESMTPSA id A736FC433F1; Sat, 24 Feb 2024 21:33:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1708810393; bh=resC3EdVnr1VmQ6d66ZukTMXBA464nmyoeCuIzkpf5w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=JPOybeRds0Qt65lU/4uJq8ds7lQNbzHHcZrAV5IewIbkhg/WIyvinkLYU4gEzhyuO Kjq0Vt1ZlQruOUR1Bf/W3EgBzMtRd/hOUlIl8xB1XdTsuQdGxhWGR/XKiMzy9tpx4S XncUEXBo8MYXLOB9kO3ZrQinGvyMfDo1NLRlihYOgp/BVLp78XRwfyRkM3HS5cDYuN K5oE5leNx78314oKb/i3XcLHDlh1bwF6O/6BA8Diq+Xfbegg9rZpi054MHgvFJFKxh d7MHaiajc2nKHbBrXPv2cyMbbY6wlUbkfXgyaUCfjeAYCzfqWkcvOyjOoyU4nw+K9V 6BfUEDsqborug== Received: by mercury (Postfix, from userid 1000) id DF31B1060C06; Sat, 24 Feb 2024 22:33:09 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring Subject: [PATCH v4 01/16] dt-bindings: pinctrl: fsl,imx6ul-pinctrl: convert to YAML Date: Sat, 24 Feb 2024 22:29:33 +0100 Message-ID: <20240224213240.1854709-2-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240224213240.1854709-1-sre@kernel.org> References: <20240224213240.1854709-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Convert i.MX6UL pinctrl bindings to YAML. Reviewed-by: Linus Walleij Reviewed-by: Rob Herring Signed-off-by: Sebastian Reichel --- .../bindings/pinctrl/fsl,imx6ul-pinctrl.txt | 37 ------ .../bindings/pinctrl/fsl,imx6ul-pinctrl.yaml | 116 ++++++++++++++++++ 2 files changed, 116 insertions(+), 37 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pi= nctrl.txt create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pi= nctrl.yaml diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.t= xt b/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt deleted file mode 100644 index 7ca4f6118d9a..000000000000 --- a/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt +++ /dev/null @@ -1,37 +0,0 @@ -* Freescale i.MX6 UltraLite IOMUX Controller - -Please refer to fsl,imx-pinctrl.txt in this directory for common binding p= art -and usage. - -Required properties: -- compatible: "fsl,imx6ul-iomuxc" for main IOMUX controller or - "fsl,imx6ull-iomuxc-snvs" for i.MX 6ULL's SNVS IOMUX controller. -- fsl,pins: each entry consists of 6 integers and represents the mux and c= onfig - setting for one pin. The first 5 integers are specified using a PIN_FUNC_ID macro, which can be found in - imx6ul-pinfunc.h under device tree source folder. The last integer CONF= IG is - the pad setting value like pull-up on this pin. Please refer to i.MX6 U= ltraLite - Reference Manual for detailed CONFIG settings. - -CONFIG bits definition: -PAD_CTL_HYS (1 << 16) -PAD_CTL_PUS_100K_DOWN (0 << 14) -PAD_CTL_PUS_47K_UP (1 << 14) -PAD_CTL_PUS_100K_UP (2 << 14) -PAD_CTL_PUS_22K_UP (3 << 14) -PAD_CTL_PUE (1 << 13) -PAD_CTL_PKE (1 << 12) -PAD_CTL_ODE (1 << 11) -PAD_CTL_SPEED_LOW (0 << 6) -PAD_CTL_SPEED_MED (1 << 6) -PAD_CTL_SPEED_HIGH (3 << 6) -PAD_CTL_DSE_DISABLE (0 << 3) -PAD_CTL_DSE_260ohm (1 << 3) -PAD_CTL_DSE_130ohm (2 << 3) -PAD_CTL_DSE_87ohm (3 << 3) -PAD_CTL_DSE_65ohm (4 << 3) -PAD_CTL_DSE_52ohm (5 << 3) -PAD_CTL_DSE_43ohm (6 << 3) -PAD_CTL_DSE_37ohm (7 << 3) -PAD_CTL_SRE_FAST (1 << 0) -PAD_CTL_SRE_SLOW (0 << 0) diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.y= aml b/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.yaml new file mode 100644 index 000000000000..906b264a9e3c --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.yaml @@ -0,0 +1,116 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/fsl,imx6ul-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale IMX6UL IOMUX Controller + +maintainers: + - Dong Aisheng + +description: + Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this dir= ectory + for common binding part and usage. + +allOf: + - $ref: pinctrl.yaml# + +properties: + compatible: + enum: + - fsl,imx6ul-iomuxc + - fsl,imx6ull-iomuxc-snvs + + reg: + maxItems: 1 + +# Client device subnode's properties +patternProperties: + 'grp$': + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configura= tion. + Client device subnodes use below standard properties. + + properties: + fsl,pins: + description: + each entry consists of 6 integers and represents the mux and con= fig + setting for one pin. The first 5 integers are specified using a PIN_FUNC_ID macro, whic= h can + be found in . The last integ= er + CONFIG is the pad setting value like pull-up on this pin. Please + refer to i.MX6UL Reference Manual for detailed CONFIG settings. + $ref: /schemas/types.yaml#/definitions/uint32-matrix + items: + items: + - description: | + "mux_reg" indicates the offset of mux register. + - description: | + "conf_reg" indicates the offset of pad configuration regis= ter. + - description: | + "input_reg" indicates the offset of select input register. + - description: | + "mux_val" indicates the mux value to be applied. + - description: | + "input_val" indicates the select input value to be applied. + - description: | + "pad_setting" indicates the pad configuration value to be = applied: + PAD_CTL_HYS (1 << 16) + PAD_CTL_PUS_100K_DOWN (0 << 14) + PAD_CTL_PUS_47K_UP (1 << 14) + PAD_CTL_PUS_100K_UP (2 << 14) + PAD_CTL_PUS_22K_UP (3 << 14) + PAD_CTL_PUE (1 << 13) + PAD_CTL_PKE (1 << 12) + PAD_CTL_ODE (1 << 11) + PAD_CTL_SPEED_LOW (0 << 6) + PAD_CTL_SPEED_MED (1 << 6) + PAD_CTL_SPEED_HIGH (3 << 6) + PAD_CTL_DSE_DISABLE (0 << 3) + PAD_CTL_DSE_260ohm (1 << 3) + PAD_CTL_DSE_130ohm (2 << 3) + PAD_CTL_DSE_87ohm (3 << 3) + PAD_CTL_DSE_65ohm (4 << 3) + PAD_CTL_DSE_52ohm (5 << 3) + PAD_CTL_DSE_43ohm (6 << 3) + PAD_CTL_DSE_37ohm (7 << 3) + PAD_CTL_SRE_FAST (1 << 0) + PAD_CTL_SRE_SLOW (0 << 0) + + required: + - fsl,pins + + additionalProperties: false + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + iomuxc: pinctrl@20e0000 { + compatible =3D "fsl,imx6ul-iomuxc"; + reg =3D <0x020e0000 0x4000>; + + mux_uart: uartgrp { + fsl,pins =3D < + 0x0084 0x0310 0x0000 0 0 0x1b0b1 + 0x0088 0x0314 0x0624 0 3 0x1b0b1 + >; + }; + }; + - | + iomuxc_snvs: pinctrl@2290000 { + compatible =3D "fsl,imx6ull-iomuxc-snvs"; + reg =3D <0x02290000 0x4000>; + + pinctrl_snvs_usbc_det: snvsusbcdetgrp { + fsl,pins =3D < + 0x0010 0x0054 0x0000 0x5 0x0 0x130b0 + >; + }; + }; --=20 2.43.0 From nobody Tue Dec 16 11:04:33 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AA3674D58A; Sat, 24 Feb 2024 21:33:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708810393; cv=none; b=GISiV2Vk3X1my1CibLtNTgkT9waq9Q0snzOK5ozbeJOqxv8kml1quPLQ3y/NrLjpfNvjUEbT4CWXttQOHENY5LTwFWN+3J82auFWGfAR065GVCCCPN7peQrhs+J2B7aRCx2LwJm97ZETUANHfBCxo7PQn3M5UakglPiRNF+ghrE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708810393; c=relaxed/simple; bh=snnR1gu7w8P9G0LSlc7qZ8AC7qVf+H2XXxGnseGSLOA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=l588XkW8d93uKmTuUuZ5bOj1ylrmI2T5oK3NeKvOuJoRaA5XOt4CrMgXHXcjWfdxRVE9pgwV9vcx6F05osBt4c8QCFzKvpS8RsNKaiQmA2Vhrw8H49vZmRSYYJ2MIwvJbH5W2f7XmAI+NpU5zVN2iqk4psuYOeIwuZ4MfaPpkX8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=kqyAltnU; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="kqyAltnU" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D95B9C43394; Sat, 24 Feb 2024 21:33:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1708810393; bh=snnR1gu7w8P9G0LSlc7qZ8AC7qVf+H2XXxGnseGSLOA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kqyAltnUfQbgJrDsIFpty7TUqzKP3H9/RP/BOD8p4zJbGNZvtY0TVBg4AdUfNaue+ ynb3+xRZZ1wp5RupDO0rvHOdRAGrIIrcz5aAOpI7aSeYC3hTDgcJrK5YEsikZBezvQ lLK22NfnPrVqO0QOJeLrVpEjEhXKTbHp9wtjUqr0HG1Gmd+EQN0ySI7iwn9lg35WnX AHezQuXPKqvdJ8HIXJTi0Pvl2bZRAm+xLFewqAuNbR8fiZTZXfvW2pDVDbr/ov3EV2 N/GTqIDnW3uhTH8jeZlnhEGgGtsCDYP74kh3TQfUB7H9MIiIrP4mpwqAt3guS3ICtv XI+FhXK+s/cGw== Received: by mercury (Postfix, from userid 1000) id E5B391060D95; Sat, 24 Feb 2024 22:33:09 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 02/16] dt-bindings: bus: imx-weim: convert to YAML Date: Sat, 24 Feb 2024 22:29:34 +0100 Message-ID: <20240224213240.1854709-3-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240224213240.1854709-1-sre@kernel.org> References: <20240224213240.1854709-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Convert the i.MX Wireless External Interface Module binding to YAML. Signed-off-by: Sebastian Reichel --- .../devicetree/bindings/bus/imx-weim.txt | 117 ---------- .../fsl/fsl,imx-weim-peripherals.yaml | 31 +++ .../memory-controllers/fsl/fsl,imx-weim.yaml | 204 ++++++++++++++++++ .../mc-peripheral-props.yaml | 1 + .../fieldbus/arcx,anybus-controller.txt | 2 +- 5 files changed, 237 insertions(+), 118 deletions(-) delete mode 100644 Documentation/devicetree/bindings/bus/imx-weim.txt create mode 100644 Documentation/devicetree/bindings/memory-controllers/fs= l/fsl,imx-weim-peripherals.yaml create mode 100644 Documentation/devicetree/bindings/memory-controllers/fs= l/fsl,imx-weim.yaml diff --git a/Documentation/devicetree/bindings/bus/imx-weim.txt b/Documenta= tion/devicetree/bindings/bus/imx-weim.txt deleted file mode 100644 index e7f502070d77..000000000000 --- a/Documentation/devicetree/bindings/bus/imx-weim.txt +++ /dev/null @@ -1,117 +0,0 @@ -Device tree bindings for i.MX Wireless External Interface Module (WEIM) - -The term "wireless" does not imply that the WEIM is literally an interface -without wires. It simply means that this module was originally designed for -wireless and mobile applications that use low-power technology. - -The actual devices are instantiated from the child nodes of a WEIM node. - -Required properties: - - - compatible: Should contain one of the following: - "fsl,imx1-weim" - "fsl,imx27-weim" - "fsl,imx51-weim" - "fsl,imx50-weim" - "fsl,imx6q-weim" - - reg: A resource specifier for the register space - (see the example below) - - clocks: the clock, see the example below. - - #address-cells: Must be set to 2 to allow memory address translation - - #size-cells: Must be set to 1 to allow CS address passing - - ranges: Must be set up to reflect the memory layout with four - integer values for each chip-select line in use: - - 0 - -Optional properties: - - - fsl,weim-cs-gpr: For "fsl,imx50-weim" and "fsl,imx6q-weim" type of - devices, it should be the phandle to the system General - Purpose Register controller that contains WEIM CS GPR - register, e.g. IOMUXC_GPR1 on i.MX6Q. IOMUXC_GPR1[11:0] - should be set up as one of the following 4 possible - values depending on the CS space configuration. - - IOMUXC_GPR1[11:0] CS0 CS1 CS2 CS3 - --------------------------------------------- - 05 128M 0M 0M 0M - 033 64M 64M 0M 0M - 0113 64M 32M 32M 0M - 01111 32M 32M 32M 32M - - In case that the property is absent, the reset value or - what bootloader sets up in IOMUXC_GPR1[11:0] will be - used. - - - fsl,burst-clk-enable For "fsl,imx50-weim" and "fsl,imx6q-weim" type of - devices, the presence of this property indicates that - the weim bus should operate in Burst Clock Mode. - - - fsl,continuous-burst-clk Make Burst Clock to output continuous clock. - Without this option Burst Clock will output clock - only when necessary. This takes effect only if - "fsl,burst-clk-enable" is set. - -Timing property for child nodes. It is mandatory, not optional. - - - fsl,weim-cs-timing: The timing array, contains timing values for the - child node. We get the CS indexes from the address - ranges in the child node's "reg" property. - The number of registers depends on the selected chip: - For i.MX1, i.MX21 ("fsl,imx1-weim") there are two - registers: CSxU, CSxL. - For i.MX25, i.MX27, i.MX31 and i.MX35 ("fsl,imx27-weim") - there are three registers: CSCRxU, CSCRxL, CSCRxA. - For i.MX50, i.MX53 ("fsl,imx50-weim"), - i.MX51 ("fsl,imx51-weim") and i.MX6Q ("fsl,imx6q-weim") - there are six registers: CSxGCR1, CSxGCR2, CSxRCR1, - CSxRCR2, CSxWCR1, CSxWCR2. - -Example for an imx6q-sabreauto board, the NOR flash connected to the WEIM: - - weim: weim@21b8000 { - compatible =3D "fsl,imx6q-weim"; - reg =3D <0x021b8000 0x4000>; - clocks =3D <&clks 196>; - #address-cells =3D <2>; - #size-cells =3D <1>; - ranges =3D <0 0 0x08000000 0x08000000>; - fsl,weim-cs-gpr =3D <&gpr>; - - nor@0,0 { - compatible =3D "cfi-flash"; - reg =3D <0 0 0x02000000>; - #address-cells =3D <1>; - #size-cells =3D <1>; - bank-width =3D <2>; - fsl,weim-cs-timing =3D <0x00620081 0x00000001 0x1c022000 - 0x0000c000 0x1404a38e 0x00000000>; - }; - }; - -Example for an imx6q-based board, a multi-chipselect device connected to W= EIM: - -In this case, both chip select 0 and 1 will be configured with the same ti= ming -array values. - - weim: weim@21b8000 { - compatible =3D "fsl,imx6q-weim"; - reg =3D <0x021b8000 0x4000>; - clocks =3D <&clks 196>; - #address-cells =3D <2>; - #size-cells =3D <1>; - ranges =3D <0 0 0x08000000 0x02000000 - 1 0 0x0a000000 0x02000000 - 2 0 0x0c000000 0x02000000 - 3 0 0x0e000000 0x02000000>; - fsl,weim-cs-gpr =3D <&gpr>; - - acme@0 { - compatible =3D "acme,whatever"; - reg =3D <0 0 0x100>, <0 0x400000 0x800>, - <1 0x400000 0x800>; - fsl,weim-cs-timing =3D <0x024400b1 0x00001010 0x20081100 - 0x00000000 0xa0000240 0x00000000>; - }; - }; diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,i= mx-weim-peripherals.yaml b/Documentation/devicetree/bindings/memory-control= lers/fsl/fsl,imx-weim-peripherals.yaml new file mode 100644 index 000000000000..82fc5f4a1ed6 --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim= -peripherals.yaml @@ -0,0 +1,31 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,imx-weim-per= ipherals.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: i.MX WEIM Bus Peripheral Nodes + +maintainers: + - Shawn Guo + - Sascha Hauer + +description: + This binding is meant for the child nodes of the WEIM node. The node + represents any device connected to the WEIM bus. It may be a Flash chip, + RAM chip or Ethernet controller, etc. These properties are meant for + configuring the WEIM settings/timings and will accompany the bindings + supported by the respective device. + +properties: + reg: true + + fsl,weim-cs-timing: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: + Timing values for the child node. + minItems: 2 + maxItems: 6 + +# the WEIM child will have its own native properties +additionalProperties: true diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,i= mx-weim.yaml b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl= ,imx-weim.yaml new file mode 100644 index 000000000000..3f40ca5b13f6 --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim= .yaml @@ -0,0 +1,204 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,imx-weim.yam= l# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: i.MX Wireless External Interface Module (WEIM) + +maintainers: + - Shawn Guo + - Sascha Hauer + +description: + The term "wireless" does not imply that the WEIM is literally an interfa= ce + without wires. It simply means that this module was originally designed = for + wireless and mobile applications that use low-power technology. The actu= al + devices are instantiated from the child nodes of a WEIM node. + +properties: + $nodename: + pattern: "^memory-controller@[0-9a-f]+$" + + compatible: + oneOf: + - enum: + - fsl,imx1-weim + - fsl,imx27-weim + - fsl,imx50-weim + - fsl,imx51-weim + - fsl,imx6q-weim + - items: + - enum: + - fsl,imx31-weim + - fsl,imx35-weim + - const: fsl,imx27-weim + - items: + - enum: + - fsl,imx6sx-weim + - fsl,imx6ul-weim + - const: fsl,imx6q-weim + + "#address-cells": + const: 2 + + "#size-cells": + const: 1 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + interrupts: + maxItems: 1 + + ranges: true + + fsl,weim-cs-gpr: + $ref: /schemas/types.yaml#/definitions/phandle + description: | + Phandle to the system General Purpose Register controller that conta= ins + WEIM CS GPR register, e.g. IOMUXC_GPR1 on i.MX6Q. IOMUXC_GPR1[11:0] + should be set up as one of the following 4 possible values depending= on + the CS space configuration. + + IOMUXC_GPR1[11:0] CS0 CS1 CS2 CS3 + --------------------------------------------- + 05 128M 0M 0M 0M + 033 64M 64M 0M 0M + 0113 64M 32M 32M 0M + 01111 32M 32M 32M 32M + + In case that the property is absent, the reset value or what bootloa= der + sets up in IOMUXC_GPR1[11:0] will be used. + + fsl,burst-clk-enable: + type: boolean + description: + The presence of this property indicates that the weim bus should ope= rate + in Burst Clock Mode. + + fsl,continuous-burst-clk: + type: boolean + description: + Make Burst Clock to output continuous clock. Without this option Bur= st + Clock will output clock only when necessary. + +patternProperties: + "^.*@[0-7],[0-9a-f]+$": + type: object + description: Devices attached to chip selects are represented as subno= des. + $ref: fsl,imx-weim-peripherals.yaml + additionalProperties: true + required: + - fsl,weim-cs-timing + +required: + - compatible + - reg + - clocks + - "#address-cells" + - "#size-cells" + - ranges + +allOf: + - if: + properties: + compatible: + not: + contains: + enum: + - fsl,imx50-weim + - fsl,imx6q-weim + then: + properties: + fsl,weim-cs-gpr: false + fsl,burst-clk-enable: false + - if: + not: + required: + - fsl,burst-clk-enable + then: + properties: + fsl,continuous-burst-clk: false + - if: + properties: + compatible: + contains: + const: fsl,imx1-weim + then: + patternProperties: + "^.*@[0-7],[0-9a-f]+$": + properties: + fsl,weim-cs-timing: + items: + items: + - description: CSxU + - description: CSxL + - if: + properties: + compatible: + contains: + enum: + - fsl,imx27-weim + - fsl,imx31-weim + - fsl,imx35-weim + then: + patternProperties: + "^.*@[0-7],[0-9a-f]+$": + properties: + fsl,weim-cs-timing: + items: + items: + - description: CSCRxU + - description: CSCRxL + - description: CSCRxA + - if: + properties: + compatible: + contains: + enum: + - fsl,imx50-weim + - fsl,imx51-weim + - fsl,imx6q-weim + - fsl,imx6sx-weim + - fsl,imx6ul-weim + then: + patternProperties: + "^.*@[0-7],[0-9a-f]+$": + properties: + fsl,weim-cs-timing: + items: + items: + - description: CSxGCR1 + - description: CSxGCR2 + - description: CSxRCR1 + - description: CSxRCR2 + - description: CSxWCR1 + - description: CSxWCR2 + +additionalProperties: false + +examples: + - | + memory-controller@21b8000 { + compatible =3D "fsl,imx6q-weim"; + reg =3D <0x021b8000 0x4000>; + clocks =3D <&clks 196>; + #address-cells =3D <2>; + #size-cells =3D <1>; + ranges =3D <0 0 0x08000000 0x08000000>; + fsl,weim-cs-gpr =3D <&gpr>; + + flash@0,0 { + compatible =3D "cfi-flash"; + reg =3D <0 0 0x02000000>; + #address-cells =3D <1>; + #size-cells =3D <1>; + bank-width =3D <2>; + fsl,weim-cs-timing =3D <0x00620081 0x00000001 0x1c022000 + 0x0000c000 0x1404a38e 0x00000000>; + }; + }; diff --git a/Documentation/devicetree/bindings/memory-controllers/mc-periph= eral-props.yaml b/Documentation/devicetree/bindings/memory-controllers/mc-p= eripheral-props.yaml index 8d9dae15ade0..00deeb09f87d 100644 --- a/Documentation/devicetree/bindings/memory-controllers/mc-peripheral-pr= ops.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/mc-peripheral-pr= ops.yaml @@ -37,5 +37,6 @@ allOf: - $ref: ingenic,nemc-peripherals.yaml# - $ref: intel,ixp4xx-expansion-peripheral-props.yaml# - $ref: ti,gpmc-child.yaml# + - $ref: fsl/fsl,imx-weim-peripherals.yaml =20 additionalProperties: true diff --git a/drivers/staging/fieldbus/Documentation/devicetree/bindings/fie= ldbus/arcx,anybus-controller.txt b/drivers/staging/fieldbus/Documentation/d= evicetree/bindings/fieldbus/arcx,anybus-controller.txt index b1f9474f36d5..f34a95611645 100644 --- a/drivers/staging/fieldbus/Documentation/devicetree/bindings/fieldbus/a= rcx,anybus-controller.txt +++ b/drivers/staging/fieldbus/Documentation/devicetree/bindings/fieldbus/a= rcx,anybus-controller.txt @@ -48,7 +48,7 @@ Example of usage: ----------------- =20 This example places the bridge on top of the i.MX WEIM parallel bus, see: -Documentation/devicetree/bindings/bus/imx-weim.txt +Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim.yaml =20 &weim { controller@0,0 { --=20 2.43.0 From nobody Tue Dec 16 11:04:33 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5F5064CDFB; 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charset="utf-8" Convert the i.MX6UL touchscreen DT binding to YAML. Reviewed-by: Rob Herring Signed-off-by: Sebastian Reichel --- .../input/touchscreen/fsl,imx6ul-tsc.yaml | 97 +++++++++++++++++++ .../bindings/input/touchscreen/imx6ul_tsc.txt | 38 -------- 2 files changed, 97 insertions(+), 38 deletions(-) create mode 100644 Documentation/devicetree/bindings/input/touchscreen/fsl= ,imx6ul-tsc.yaml delete mode 100644 Documentation/devicetree/bindings/input/touchscreen/imx= 6ul_tsc.txt diff --git a/Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul= -tsc.yaml b/Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul-= tsc.yaml new file mode 100644 index 000000000000..678756ad0f92 --- /dev/null +++ b/Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul-tsc.ya= ml @@ -0,0 +1,97 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/touchscreen/fsl,imx6ul-tsc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX6UL Touch Controller + +maintainers: + - Haibo Chen + - Shawn Guo + - Sascha Hauer + +properties: + compatible: + const: fsl,imx6ul-tsc + + reg: + items: + - description: touch controller address + - description: ADC2 address + + interrupts: + items: + - description: touch controller address + - description: ADC2 address + + clocks: + maxItems: 2 + + clock-names: + items: + - const: tsc + - const: adc + + xnur-gpios: + maxItems: 1 + description: + The X- gpio this controller connect to. This xnur-gpio returns to + low once the finger leave the touch screen (The last touch event + the touch controller capture). + + measure-delay-time: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The value of measure delay time. Before X-axis or Y-axis measurement, + the screen need some time before even potential distribution ready. + default: 0xffff + minimum: 0 + maximum: 0xffffff + + pre-charge-time: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The touch screen need some time to precharge. + default: 0xfff + minimum: 0 + maximum: 0xffffffff + + touchscreen-average-samples: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Number of data samples which are averaged for each read. + enum: [ 1, 4, 8, 16, 32 ] + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - xnur-gpios + +allOf: + - $ref: touchscreen.yaml# + +additionalProperties: false + +examples: + - | + #include + #include + #include + touchscreen@2040000 { + compatible =3D "fsl,imx6ul-tsc"; + reg =3D <0x02040000 0x4000>, <0x0219c000 0x4000>; + interrupts =3D , + ; + clocks =3D <&clks IMX6UL_CLK_IPG>, + <&clks IMX6UL_CLK_ADC2>; + clock-names =3D "tsc", "adc"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_tsc>; + xnur-gpios =3D <&gpio1 3 GPIO_ACTIVE_LOW>; + measure-delay-time =3D <0xfff>; + pre-charge-time =3D <0xffff>; + touchscreen-average-samples =3D <32>; + }; diff --git a/Documentation/devicetree/bindings/input/touchscreen/imx6ul_tsc= .txt b/Documentation/devicetree/bindings/input/touchscreen/imx6ul_tsc.txt deleted file mode 100644 index 164915004424..000000000000 --- a/Documentation/devicetree/bindings/input/touchscreen/imx6ul_tsc.txt +++ /dev/null @@ -1,38 +0,0 @@ -* Freescale i.MX6UL Touch Controller - -Required properties: -- compatible: must be "fsl,imx6ul-tsc". -- reg: this touch controller address and the ADC2 address. -- interrupts: the interrupt of this touch controller and ADC2. -- clocks: the root clock of touch controller and ADC2. -- clock-names; must be "tsc" and "adc". -- xnur-gpio: the X- gpio this controller connect to. - This xnur-gpio returns to low once the finger leave the touch screen (The - last touch event the touch controller capture). - -Optional properties: -- measure-delay-time: the value of measure delay time. - Before X-axis or Y-axis measurement, the screen need some time before - even potential distribution ready. - This value depends on the touch screen. -- pre-charge-time: the touch screen need some time to precharge. - This value depends on the touch screen. -- touchscreen-average-samples: Number of data samples which are averaged f= or - each read. Valid values are 1, 4, 8, 16 and 32. - -Example: - tsc: tsc@2040000 { - compatible =3D "fsl,imx6ul-tsc"; - reg =3D <0x02040000 0x4000>, <0x0219c000 0x4000>; - interrupts =3D , - ; - clocks =3D <&clks IMX6UL_CLK_IPG>, - <&clks IMX6UL_CLK_ADC2>; - clock-names =3D "tsc", "adc"; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_tsc>; - xnur-gpio =3D <&gpio1 3 GPIO_ACTIVE_LOW>; - measure-delay-time =3D <0xfff>; - pre-charge-time =3D <0xffff>; - touchscreen-average-samples =3D <32>; - }; --=20 2.43.0 From nobody Tue Dec 16 11:04:33 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5F4E24CDEB; Sat, 24 Feb 2024 21:33:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708810393; cv=none; b=ZM4ZAKWgxHrLXZlAfa7UcOgUPb4tq7hg9G9zfZMiP8dPf1L1vzYFUMEJGB5Cv587elZ5pAzA3rEInonzu8NuZqRsl5N8uVW67yCgiP5HCNi1ioXCD4/q+RT1aQ9FM66PKpDY9/LlashCpTK3Rx7DaAKQ5dPGWHRODhf7kp5lTGw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708810393; c=relaxed/simple; bh=W7KyzBkyJPOjERPAmGBasbk62LFaM6Pz/kkeIkNL5bU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=BD3FV8zPPqR36YTmRZVkRjYvoaQhOZWDywxbPrB3PW1kss0whyZAxxmkZOGOko++rzBNsAF3H/4AUXX1ZgEUHkpryjoTR5aj0Riug8nTXtryARh+oUlTx9FJZTSQ+pEE/+aCTS11jVtTQRw+KF4630+A78Wa2vckJHXHpAoD3fA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=cS//nZPz; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="cS//nZPz" Received: by smtp.kernel.org (Postfix) with ESMTPSA id A9979C43399; Sat, 24 Feb 2024 21:33:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1708810392; bh=W7KyzBkyJPOjERPAmGBasbk62LFaM6Pz/kkeIkNL5bU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cS//nZPzG66uQ5fnFFWvxFPVCLfNAXoJAucgA0zR+hHsMdFV4Zd3n8Jk9REyzL3JC nAM3WoaS9FVB+fM+EJfrTUP66U6EI1fZQsq4rvqwZINQgdBucsromq3dyg2oxEyAX5 +I1hTMxdVOXZD/GwdajO1OarKW8MMiMGwwnhRMEGTGR5HxxagU1x0cUghLkw3j1Rfd OpVrki2L1NfT+uHmSrENviv99C7n1xgsegAxX5tKRqPYjJZKSVgXGYZPDgjUimIi+2 fjuqcwk+mSIEBBz0uYwEYaOb3wgt15yveSxqtcHh/O3vlGEhwNkFsQUH57Csz6v+hQ HXxcxcVUPor1g== Received: by mercury (Postfix, from userid 1000) id F36951060DFB; Sat, 24 Feb 2024 22:33:09 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski Subject: [PATCH v4 04/16] dt-bindings: soc: imx: fsl,imx-anatop: add binding Date: Sat, 24 Feb 2024 22:29:36 +0100 Message-ID: <20240224213240.1854709-5-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240224213240.1854709-1-sre@kernel.org> References: <20240224213240.1854709-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add missing binding for i.MX anatop syscon. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel --- .../bindings/soc/imx/fsl,imx-anatop.yaml | 128 ++++++++++++++++++ 1 file changed, 128 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx-anato= p.yaml diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx-anatop.yaml = b/Documentation/devicetree/bindings/soc/imx/fsl,imx-anatop.yaml new file mode 100644 index 000000000000..5a59e3470510 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx-anatop.yaml @@ -0,0 +1,128 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/imx/fsl,imx-anatop.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ANATOP register + +maintainers: + - Shawn Guo + - Sascha Hauer + +properties: + compatible: + oneOf: + - items: + - enum: + - fsl,imx6sl-anatop + - fsl,imx6sll-anatop + - fsl,imx6sx-anatop + - fsl,imx6ul-anatop + - fsl,imx7d-anatop + - const: fsl,imx6q-anatop + - const: syscon + - const: simple-mfd + - items: + - const: fsl,imx6q-anatop + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + + interrupts: + items: + - description: Temperature sensor event + - description: Brown-out event on either of the support regulators + - description: Brown-out event on either the core, gpu or soc regula= tors + + tempmon: + type: object + unevaluatedProperties: false + $ref: /schemas/thermal/imx-thermal.yaml + +patternProperties: + "regulator-((3p0)|(vddcore)|(vddsoc))$": + type: object + unevaluatedProperties: false + $ref: /schemas/regulator/anatop-regulator.yaml + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include + #include + + anatop: anatop@20c8000 { + compatible =3D "fsl,imx6ul-anatop", "fsl,imx6q-anatop", + "syscon", "simple-mfd"; + reg =3D <0x020c8000 0x1000>; + interrupts =3D , + , + ; + + reg_3p0: regulator-3p0 { + compatible =3D "fsl,anatop-regulator"; + regulator-name =3D "vdd3p0"; + regulator-min-microvolt =3D <2625000>; + regulator-max-microvolt =3D <3400000>; + anatop-reg-offset =3D <0x120>; + anatop-vol-bit-shift =3D <8>; + anatop-vol-bit-width =3D <5>; + anatop-min-bit-val =3D <0>; + anatop-min-voltage =3D <2625000>; + anatop-max-voltage =3D <3400000>; + anatop-enable-bit =3D <0>; + }; + + reg_arm: regulator-vddcore { + compatible =3D "fsl,anatop-regulator"; + regulator-name =3D "cpu"; + regulator-min-microvolt =3D <725000>; + regulator-max-microvolt =3D <1450000>; + regulator-always-on; + anatop-reg-offset =3D <0x140>; + anatop-vol-bit-shift =3D <0>; + anatop-vol-bit-width =3D <5>; + anatop-delay-reg-offset =3D <0x170>; + anatop-delay-bit-shift =3D <24>; + anatop-delay-bit-width =3D <2>; + anatop-min-bit-val =3D <1>; + anatop-min-voltage =3D <725000>; + anatop-max-voltage =3D <1450000>; + }; + + reg_soc: regulator-vddsoc { + compatible =3D "fsl,anatop-regulator"; + regulator-name =3D "vddsoc"; + regulator-min-microvolt =3D <725000>; + regulator-max-microvolt =3D <1450000>; + regulator-always-on; + anatop-reg-offset =3D <0x140>; + anatop-vol-bit-shift =3D <18>; + anatop-vol-bit-width =3D <5>; + anatop-delay-reg-offset =3D <0x170>; + anatop-delay-bit-shift =3D <28>; + anatop-delay-bit-width =3D <2>; + anatop-min-bit-val =3D <1>; + anatop-min-voltage =3D <725000>; + anatop-max-voltage =3D <1450000>; + }; + + tempmon: tempmon { + compatible =3D "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon"; + interrupt-parent =3D <&gpc>; + interrupts =3D ; + fsl,tempmon =3D <&anatop>; + nvmem-cells =3D <&tempmon_calib>, <&tempmon_temp_grade>; + nvmem-cell-names =3D "calib", "temp_grade"; + clocks =3D <&clks IMX6UL_CLK_PLL3_USB_OTG>; + #thermal-sensor-cells =3D <0>; + }; + }; --=20 2.43.0 From nobody Tue Dec 16 11:04:33 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E93CF4EB5D; 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charset="utf-8" Add compatibles used by different i.MX6 variants to the i.MX IOMUX Controller GPR binding. Acked-by: Rob Herring Signed-off-by: Sebastian Reichel --- .../bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.y= aml b/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml index 1da1b758b4ae..8451cb4dd87c 100644 --- a/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml @@ -17,7 +17,23 @@ properties: compatible: oneOf: - items: - - const: fsl,imx8mq-iomuxc-gpr + - enum: + - fsl,imx6q-iomuxc-gpr + - fsl,imx8mq-iomuxc-gpr + - const: syscon + - const: simple-mfd + - items: + - enum: + - fsl,imx6sl-iomuxc-gpr + - fsl,imx6sll-iomuxc-gpr + - fsl,imx6ul-iomuxc-gpr + - const: fsl,imx6q-iomuxc-gpr + - const: syscon + - items: + - enum: + - fsl,imx6sx-iomuxc-gpr + - fsl,imx7d-iomuxc-gpr + - const: fsl,imx6q-iomuxc-gpr - const: syscon - const: simple-mfd - items: --=20 2.43.0 From nobody Tue Dec 16 11:04:33 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E939C4EB5C; Sat, 24 Feb 2024 21:33:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708810396; cv=none; b=lpYxPqXuc5Jw9C6Tm8iwD0OnMSBFnH+AEhMWKhE+7qAqeYEjD9qhud2d3ruXLd7CewyBCWV2jxXIAmQ+N9QqkUWCMaXQ+LECjM38Yqh1dAiZHzw5McC6dxKnqqwDmO8hB4tlaLAzVExxINe15FX0GQoX8r1Y/CkapSzN/XXDhYo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708810396; c=relaxed/simple; bh=rUmJV8kGaEHJUfJDmv7OgUPHvh7znQWSM5zbc3u5TGM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Y3ma53HtXkZ1+1pkHPCgEpxav4jv1OCzky39rvVTAPe/9HwFOOB28OfSXoYzHfjTMtF1wMpxRBhhQFhogVsqK54Jv/1YV/jAkGDADy5GtT2XUxq4fLolI97yZ4ICsa6bAIlHRawMHb3uHv+Gko0ZLFBtFmbNKBXElCZRFC11vY4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=klIfjP51; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="klIfjP51" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 52AAEC433C7; Sat, 24 Feb 2024 21:33:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1708810395; bh=rUmJV8kGaEHJUfJDmv7OgUPHvh7znQWSM5zbc3u5TGM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=klIfjP51Mh7RZ5+C2clA7j6wOd8d2GqenlD+9Sj0PrJbzd4Gx9rUa0Z7vvuRvBGwM wTDCO2+P0V5h0WB60rZhl1w4zimDGNDWdxs5pqw78g4cEEdkzF8riw5F8fAg2NiHFr zDuRuEsqgRTAiBVRxGRUeCqZY2/+bAbJuGTbSw6IRoVXb+LsoSo6V+tcMsqu8KoXxz m/UwvHZolhMi4wEz4ftPABo6ehmHE9/CeSB1haa4e2Tw3x4rFbC7kcrfvPgIgmTTbQ JQBHQMcu2OflRbe5c7UYm91oEWDqHU1SMyRIjd3e+XLYUcm3qPYf1r/egqbNmkmwAu uhCM5FC3cg4mg== Received: by mercury (Postfix, from userid 1000) id 0B5B11060E89; Sat, 24 Feb 2024 22:33:10 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski Subject: [PATCH v4 06/16] dt-bindings: lcdif: Do not require power-domains for i.MX6ULL Date: Sat, 24 Feb 2024 22:29:38 +0100 Message-ID: <20240224213240.1854709-7-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240224213240.1854709-1-sre@kernel.org> References: <20240224213240.1854709-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" i.MX6UL(L) uses "fsl,imx6sx-lcdif" as fallback compatible string, but has only very lightweight DISPLAY power domain. Its DISPLAY power domain is not supported by the binding / Linux kernel at the moment. Since the current setup is working, let's remove the power-domain from being required for that platform to fix the warning printed by CHECK_DTBS=3Dy. Fixes: f62678a77d58 ("dt-bindings: mxsfb: Document i.MX8M/i.MX6SX/i.MX6SL p= ower-domains property") Acked-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel Reviewed-by: Fabio Estevam --- Documentation/devicetree/bindings/display/fsl,lcdif.yaml | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/fsl,lcdif.yaml b/Doc= umentation/devicetree/bindings/display/fsl,lcdif.yaml index 1c2be8d6f633..0681fc49aa1b 100644 --- a/Documentation/devicetree/bindings/display/fsl,lcdif.yaml +++ b/Documentation/devicetree/bindings/display/fsl,lcdif.yaml @@ -120,13 +120,19 @@ allOf: maxItems: 1 clock-names: maxItems: 1 + - if: + properties: + compatible: + const: fsl,imx6sx-lcdif + then: + required: + - power-domains - if: properties: compatible: contains: enum: - fsl,imx6sl-lcdif - - fsl,imx6sx-lcdif - fsl,imx8mm-lcdif - fsl,imx8mn-lcdif - fsl,imx8mp-lcdif --=20 2.43.0 From nobody Tue Dec 16 11:04:33 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1CA5F4F5ED; Sat, 24 Feb 2024 21:33:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708810396; cv=none; b=m86L4nbOuFkr0sUf0pN8CkksE8MdroidcIgoZE86TT8IxpKB+Qyox3/hblvnW2COAx5cgsZdBLMxSprxVn+BPOUU4AcmSzTHJFMXOVBcfUjJ6k0lUhsVDbc6u13oSHpVoJDU7K0CrYHYWTPl39WT7lwLcmaweLw2i0YY2+gjcHU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708810396; c=relaxed/simple; bh=2Rf/qADjPS/HdwZc3ACrJCkDkpnzYWtpsvVoZxBWBCU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=DinkkFt9rmuOu4hsIjAoXF+INPb2C+2LgFIJmiXlYlGJ/eBFdESMmcCB07l/sua4q0nlB+BtBKkW6WK+2t3KBbN6f7dv/o1MMYcv/t1/yUnN+8MAwXbHObEMz+PeGHUhxExH63eXcRIeH8jz9qxBucaFjLNiSluml3PsBkgd9KA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=mfXazH5Z; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="mfXazH5Z" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8C7FAC43330; Sat, 24 Feb 2024 21:33:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1708810395; bh=2Rf/qADjPS/HdwZc3ACrJCkDkpnzYWtpsvVoZxBWBCU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mfXazH5ZaXAKDEC3vp03BtrTcweiBVZ768aSCQofqYk2nxHRnf6V3AEfufcoUY3TZ ycXH/chm7+O91E2a/G+1r1r45ZjnK4/ZNu+LyNVwxL2MDiqVC5zbC/kQLEmCHhhrXd Kb2sAQwfcfpCf5OP5pbAMGp+gI9XSYhtQ2hrdOyGF7VCwARWBBa8idAGFszKr/Ic+d itKK46+9jBauzJz9F0LozMRnlXSXaWYugpbGHsdy0IvZeOYqB39eOFbj1TK2GuDc3V makOBfdjkT6mxQabYXC660u78LcpyvCPMOBNxQlT15bIO07/d8+wohhl2nz5xrTXfy 9reRJnO1InQyw== Received: by mercury (Postfix, from userid 1000) id 11FFD1060E8C; Sat, 24 Feb 2024 22:33:10 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Michael Yackavage , Krzysztof Kozlowski Subject: [PATCH v4 07/16] dt-bindings: fsl-imx-sdma: fix HDMI audio index Date: Sat, 24 Feb 2024 22:29:39 +0100 Message-ID: <20240224213240.1854709-8-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240224213240.1854709-1-sre@kernel.org> References: <20240224213240.1854709-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" HDMI Audio has been added to the DT binding documentation with an incorrect index. DT and the driver use index 26. This happened, because the binding is missing MULTI_SAI type, which is using index 25. Reported-by: Michael Yackavage Fixes: 7bdbd87d4008 ("dt-bindings: fsl-imx-sdma: Convert imx sdma to DT sch= ema") Acked-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel --- Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml b/Docu= mentation/devicetree/bindings/dma/fsl,imx-sdma.yaml index b95dd8db5a30..37135fa024f9 100644 --- a/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml +++ b/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml @@ -92,7 +92,8 @@ properties: description: needs firmware more than ver 2 - Shared ASRC: 23 - SAI: 24 - - HDMI Audio: 25 + - Multi SAI: 25 + - HDMI Audio: 26 =20 The third cell: transfer priority ID enum: --=20 2.43.0 From nobody Tue Dec 16 11:04:33 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CC9D84EB4A; Sat, 24 Feb 2024 21:33:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708810395; cv=none; b=GOad8wGkmONz6kfbn2w1Dcsdwl14KYVGUn0ctu0aIN7W5w7B5Q49M71CpbhSSPKoc9qOdvj15ZMUXhiLbFkUouzuJAP83x9AiK37a7njG2hLfoH/NNBG3lZN+g5ABMQbmcBoUlHJ3ducPWynoFBU7oflwBsLTwL4HO+uy88QOHI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708810395; c=relaxed/simple; bh=vtAZITKGgVXHTJ0/cBoLL4qU11MSmOF3yKsVn/EyOdc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=RUka9QhYv1b76C/bgoKueA1NVCjyYWRt2CLK7c34y8WU0Wma7YKMRDCXtrjGmLxorvPAsimYxadZ7GuL0cjMkrz34ymsXvHz5AEkR2FqHJFgLIMtSwB4Eclv4d+w0dv1XWVHRLDbxRHbfgYNxLcagu8stPJua5TbRTqewqQxJuw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=lJqBmAWr; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="lJqBmAWr" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 860BDC4166A; Sat, 24 Feb 2024 21:33:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1708810395; bh=vtAZITKGgVXHTJ0/cBoLL4qU11MSmOF3yKsVn/EyOdc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=lJqBmAWrapxM2cfz/pKBJptZdGYYRaNf49wb9t4mfQMY3Zx5fAf5T1Qet0kfXnpio ShYfW5UrBL3vQUezyDJF1RVQ3GRy3Lxtr/PevXKKdRYRhWCdhydake3+8sO3t3L84b U5MWVDZt9Xammuf4oXgQDDQK3Kz3PSv20AEyw+yy65b7OfBoPEqBUQLe92mRFhdeiN U6b4j0rSQfc9CHMgdpJr4Wd64EkCjytGF2RF1JYYtCKxpJ2M1+RX6RmQ/Tk7DuNF8g eSakqUSQ5Vo9IDKit+w6ccqG1QBDAz5b70rvWxr3cIst5rgIM2rYY1WHzptXDRqtl9 166ggc+KHDVCw== Received: by mercury (Postfix, from userid 1000) id 1940E1060E90; Sat, 24 Feb 2024 22:33:10 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski Subject: [PATCH v4 08/16] ARM: dts: imx6ull: fix pinctrl node name Date: Sat, 24 Feb 2024 22:29:40 +0100 Message-ID: <20240224213240.1854709-9-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240224213240.1854709-1-sre@kernel.org> References: <20240224213240.1854709-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" pinctrl node name must be either pinctrl or pinmux. Reviewed-by: Linus Walleij Reviewed-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel --- arch/arm/boot/dts/nxp/imx/imx6ull.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull.dtsi b/arch/arm/boot/dts/nxp= /imx/imx6ull.dtsi index 2bccd45e9fc2..8a1776067ecc 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ull.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ull.dtsi @@ -75,7 +75,7 @@ rngb: rng@2284000 { clocks =3D <&clks IMX6UL_CLK_DUMMY>; }; =20 - iomuxc_snvs: iomuxc-snvs@2290000 { + iomuxc_snvs: pinctrl@2290000 { compatible =3D "fsl,imx6ull-iomuxc-snvs"; reg =3D <0x02290000 0x4000>; }; --=20 2.43.0 From nobody Tue Dec 16 11:04:33 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 48FDE4F61C; Sat, 24 Feb 2024 21:33:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708810396; cv=none; b=nDw/ZTipAbppE+s6CMZL3FTZEn7njsdTwWJqyO3UR4LnYED18v8s2R1m4qUYF+Xvc5js/QFpVQX33lcVJ3iwBwSErNGe3+DfiRbHbMJWnU+G8/emiwPPHYFhPDjYdwm2NXRW6NpIOrXLccMcwqXSB1NCc4SKsIYhe3t4enB0uhA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708810396; c=relaxed/simple; bh=pSvctDHxVCaAu+4cZjOT/I3a/3LHsGScFSRvh9RHyIQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=W6y5z4+dsH1mgU+bknNA8rxeM69UzYTOBp2diQb9Q/b71jro0n9Fmo9XfKL4EqzD8uVOvxYstO3j6Evcz7MthQUq2Rn9MyYPAyCpiMfc3NulpzbjqUSm5JU2sORoE/uzBjJ8qtU9tu52QMLCMb/w5OIeZDNwg1osa7Yu+3at7hg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ZpZhjaDg; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ZpZhjaDg" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9C405C116B1; Sat, 24 Feb 2024 21:33:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1708810395; bh=pSvctDHxVCaAu+4cZjOT/I3a/3LHsGScFSRvh9RHyIQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZpZhjaDg2p6x8qlEwryPeYVabJEhfdTsCKKHfi2OfK28kH1vqNiJQZuhx3maJFfpx IIQ3w9tfNW5ZH8eMwKCyI4YLT6pXEjsyJOPvZNrgc/tkbgFETMfspcowjrtK3cnAbJ cSQOQrNBKOSvQhkSh+YZDvuld/28VQpqQuzXcnaXg0bGWhmjjKiBhAaEv7Jmya2Z7P FN8e5/xJ0EOYgVZgs96mMsTe3FLcP8bcq1PQYjTJaolcedu2lRUXLrBNfYHDNe8Wz6 rLpmitjWUgqE/NWZzBnZjhsG6QLKGDbuI/gHvBcOyc5iq78i2FrX7CisLDIAM9efQ+ UaBEmuzotF2Jg== Received: by mercury (Postfix, from userid 1000) id 207071060EF3; Sat, 24 Feb 2024 22:33:10 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 09/16] ARM: dts: imx6ul: Remove fsl,anatop from usbotg1 Date: Sat, 24 Feb 2024 22:29:41 +0100 Message-ID: <20240224213240.1854709-10-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240224213240.1854709-1-sre@kernel.org> References: <20240224213240.1854709-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" fsl,anatop should only be added to the usbphy nodes. Signed-off-by: Sebastian Reichel --- arch/arm/boot/dts/nxp/imx/imx6ul.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi b/arch/arm/boot/dts/nxp/= imx/imx6ul.dtsi index a27a7554c2e7..9eb4eee0c272 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi @@ -855,7 +855,6 @@ usbotg1: usb@2184000 { clocks =3D <&clks IMX6UL_CLK_USBOH3>; fsl,usbphy =3D <&usbphy1>; fsl,usbmisc =3D <&usbmisc 0>; - fsl,anatop =3D <&anatop>; ahb-burst-config =3D <0x0>; tx-burst-size-dword =3D <0x10>; rx-burst-size-dword =3D <0x10>; --=20 2.43.0 From nobody Tue Dec 16 11:04:33 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E93F04EB5E; Sat, 24 Feb 2024 21:33:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; 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Sat, 24 Feb 2024 21:33:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1708810395; bh=jWTFkWLAfHQn/N4QeNXzUQZEB7hyrlDD3WfPhQ90sdk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GNTIYTLp21L8vVOD+pJU45PCPk9yav+0yCRZ1m8oA2vuxEhxF+QdPp5cY8Y0HkXkP WRNa6tv5Rk8XBPOxpdLOxf49zOhnIzDV0ZCNUkMPN/6cowFCsHgADNFfkxuY2WK7rV JUDpoPqOabMrgnUak6BK8SKlZE5LaqxHH2yRZld8DaNhaw3otnFDsd10EKJ9KZPMip 63FZ82IsBWI0vmySro3dbaySU2TV8ph/lfsiDLwSNZyyQ4Zi7PDsYrJXGFqkE0ffV9 e8rPVY+rq9g19UwqBDw8Vzy56UdDtIQRCTYoCXWq162s8FLkx2PfGU0JC3hEsOwYGs kUY4UrnwZAH4Q== Received: by mercury (Postfix, from userid 1000) id 26F261060EF5; Sat, 24 Feb 2024 22:33:10 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 10/16] ARM: dts: imx6ul: add missing #thermal-sensor-cells Date: Sat, 24 Feb 2024 22:29:42 +0100 Message-ID: <20240224213240.1854709-11-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240224213240.1854709-1-sre@kernel.org> References: <20240224213240.1854709-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Fix the following warning found via CHECK_DTBS: tempmon: '#thermal-sensor-cells' is a required property Signed-off-by: Sebastian Reichel --- arch/arm/boot/dts/nxp/imx/imx6ul.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi b/arch/arm/boot/dts/nxp/= imx/imx6ul.dtsi index 9eb4eee0c272..45b7605ac381 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi @@ -638,6 +638,7 @@ tempmon: tempmon { nvmem-cells =3D <&tempmon_calib>, <&tempmon_temp_grade>; nvmem-cell-names =3D "calib", "temp_grade"; clocks =3D <&clks IMX6UL_CLK_PLL3_USB_OTG>; + #thermal-sensor-cells =3D <0>; }; }; =20 --=20 2.43.0 From nobody Tue Dec 16 11:04:33 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 702474F8A2; Sat, 24 Feb 2024 21:33:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Sat, 24 Feb 2024 21:33:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1708810396; bh=bcNrHCs+XtlQKvFbrrcQck8fBVrNGGG/DApCkyizqTE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=MNTeXz1++vNGxPu0EtncbVDZLEfkG+xF08te7wLpbTIceU8Yoc1Smc61P6H6QE7rf uj5bktZBApzk6Mr/nCR9N1r+p/yC+h/BG036mzDwnYXUnl2vKkfzln3CmyNPD4UK5c kwwzFe2qRRwgQHjKEdwjRp09zqhbY3At0q3vmOZS7ccJ4LNGRTgDKQ60VEX7p73wD2 yQmtXQCs0s+B66hc4I4cY7Dg4c5lJfCU3dyygCPhYHT1YcgStT+bKrSULmWG/e60WP wdGuWBkKoAE4/ytK+z4GTJYKMzxzC5AHMKXOmFslFRLcOLbtw00lLUW5h6E0S59GLQ DtoPrGFsQYCaQ== Received: by mercury (Postfix, from userid 1000) id 2D0261060EFA; Sat, 24 Feb 2024 22:33:10 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski Subject: [PATCH v4 11/16] ARM: dts: nxp: imx6ul: xnur-gpio -> xnur-gpios Date: Sat, 24 Feb 2024 22:29:43 +0100 Message-ID: <20240224213240.1854709-12-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240224213240.1854709-1-sre@kernel.org> References: <20240224213240.1854709-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Replace all "xnur-gpio" with "xnur-gpios" in the i.MX6UL(L) Touchscreen node, since the -gpio suffix is deprecated. All known implementations of this binding can handle -gpio and -gpios since day 1, so this should be fully backwards compatible. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel --- arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts | 2 +- arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6ull-dhcom-som.dtsi | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi b/arch/arm/boo= t/dts/nxp/imx/imx6ul-14x14-evk.dtsi index 2ac40d69425b..f10f0525490b 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi @@ -321,7 +321,7 @@ &snvs_pwrkey { &tsc { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_tsc>; - xnur-gpio =3D <&gpio1 3 GPIO_ACTIVE_LOW>; + xnur-gpios =3D <&gpio1 3 GPIO_ACTIVE_LOW>; measure-delay-time =3D <0xffff>; pre-charge-time =3D <0xfff>; status =3D "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts b/arch/arm/boot/dts/= nxp/imx/imx6ul-geam.dts index 875ae699c5cb..2ca18f3dad0a 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts @@ -203,7 +203,7 @@ &pwm8 { &tsc { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_tsc>; - xnur-gpio =3D <&gpio1 3 GPIO_ACTIVE_LOW>; + xnur-gpios =3D <&gpio1 3 GPIO_ACTIVE_LOW>; }; =20 &sai2 { diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi b/arc= h/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi index 18cac19aa9b0..af337f18a266 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi @@ -156,7 +156,7 @@ &snvs_pwrkey { &tsc { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_tsc>; - xnur-gpio =3D <&gpio1 3 GPIO_ACTIVE_LOW>; + xnur-gpios =3D <&gpio1 3 GPIO_ACTIVE_LOW>; measure-delay-time =3D <0xffff>; pre-charge-time =3D <0xffff>; status =3D "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-dhcom-som.dtsi b/arch/arm/bo= ot/dts/nxp/imx/imx6ull-dhcom-som.dtsi index 830b5a5064f2..6d2163250b5d 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ull-dhcom-som.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-dhcom-som.dtsi @@ -273,7 +273,7 @@ &tsc { pinctrl-names =3D "default"; pre-charge-time =3D <0xfff>; touchscreen-average-samples =3D <32>; - xnur-gpio =3D <&gpio1 3 GPIO_ACTIVE_LOW>; + xnur-gpios =3D <&gpio1 3 GPIO_ACTIVE_LOW>; }; =20 /* DHCOM UART1 */ --=20 2.43.0 From nobody Tue Dec 16 11:04:33 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6434E4F895; Sat, 24 Feb 2024 21:33:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708810396; cv=none; b=s429co1snvxgdbI4qi1eZLuhHA4UCIASB7vG/8DJ+CPV5DJuN5IuqTtF4bS27HC4M/XxXRo77p6ZiwGeWL+oozA/GHHO0xR2r36zHmgyJrzG82znJbvRLwH4+LrOaoT/fOr61bTxu+xi6j4aQQi0mwg7JcBt9gSJ+d0GUM4QBpw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708810396; c=relaxed/simple; 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Sat, 24 Feb 2024 22:33:10 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski Subject: [PATCH v4 12/16] ARM: dts: nxp: imx6ul: fix touchscreen node name Date: Sat, 24 Feb 2024 22:29:44 +0100 Message-ID: <20240224213240.1854709-13-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240224213240.1854709-1-sre@kernel.org> References: <20240224213240.1854709-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The canonical node name for touchscreens is "touchscreen", so update the i.MX6UL "tsc" node accordingly. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel --- arch/arm/boot/dts/nxp/imx/imx6ul.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi b/arch/arm/boot/dts/nxp/= imx/imx6ul.dtsi index 45b7605ac381..8aa365f837ca 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi @@ -370,7 +370,7 @@ asrc: asrc@2034000 { }; }; =20 - tsc: tsc@2040000 { + tsc: touchscreen@2040000 { compatible =3D "fsl,imx6ul-tsc"; reg =3D <0x02040000 0x4000>, <0x0219c000 0x4000>; interrupts =3D , --=20 2.43.0 From nobody Tue Dec 16 11:04:33 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 490284F61D; Sat, 24 Feb 2024 21:33:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708810396; cv=none; b=LRf9y9ofVgHG7btx0wqLkRpaQcUkPsluVK97I6eoIo/nHOFQM3O8TqOhsHzFj7MHwR9gVf4UZXVJ7t+geJ5n0N3rWfQTslSsCXxvlxty8ozFCbHrH73eT6EMtDNjWBYBY07P4OfIPGW6UepbH8+6Kq6AxzoT7l+tFZcmE9zQN0I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708810396; c=relaxed/simple; bh=L9B9Wlbx9dWT/gnx1LSt+W/JhAQ8gYcV4FnLbg2y+wo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=D+bnK1JphCaW+9dChP9C68XCTV71aE60maepe/gG5QBt4QGeDxbTaJMJCIiTCW7WCEVT7Q8a/1ngsAWPW+/UWkuZH9d8N9YXmwglHkutFryGCbLg/9MC3vN0dbAxJ7CSCq2/KVKtOFcAJ0n4aLhlzSuqqF5+rx9b7/iiJvVYtB0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=W/tFzk+F; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="W/tFzk+F" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 97546C43601; Sat, 24 Feb 2024 21:33:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1708810395; bh=L9B9Wlbx9dWT/gnx1LSt+W/JhAQ8gYcV4FnLbg2y+wo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=W/tFzk+FX99anNf1BhDEl554BaxFGW4vheKl1zxQ92nWGe/dmVdVnpu4q4Dujpcpf QSIUFzmK7J2HM/a52Mj7SK022ostSt2RstvwjuNHUKGdKIoet4vHmooCl9J9wHT1Aq J7QE4+4L79L1U5BViQfHVVmAoyZCnV/gru/NFHaMAQOhVX7MoryFBLYmBX77S8F3xs +AFDPxRwyxVLGvNug/8eJ26KhTcDPBRmlWJ30YGKJSCMxoT0yt77EYMvT4S1jFcD47 2DCBXSWWzIS97I/4v98Ed6TVWkv8dfIJkOCfimDkcRdUt/KZj8mVgehQ1nVhERumVp Z7jaavjHMgT+w== Received: by mercury (Postfix, from userid 1000) id 39964106113D; Sat, 24 Feb 2024 22:33:10 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski Subject: [PATCH v4 13/16] ARM: dts: nxp: imx: fix weim node name Date: Sat, 24 Feb 2024 22:29:45 +0100 Message-ID: <20240224213240.1854709-14-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240224213240.1854709-1-sre@kernel.org> References: <20240224213240.1854709-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" DT node names should be generic, so replace "weim" node name with "memory-controller" in all i.MX SoC DT files. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel --- arch/arm/boot/dts/nxp/imx/imx1.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx27.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx31.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx35.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx51.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6sl.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6sx.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6ul.dtsi | 2 +- 9 files changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx1.dtsi b/arch/arm/boot/dts/nxp/im= x/imx1.dtsi index 1ac10965fdfd..389ecb1ebf8f 100644 --- a/arch/arm/boot/dts/nxp/imx/imx1.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx1.dtsi @@ -251,7 +251,7 @@ gpio4: gpio@21c300 { }; }; =20 - weim: weim@220000 { + weim: memory-controller@220000 { #address-cells =3D <2>; #size-cells =3D <1>; compatible =3D "fsl,imx1-weim"; diff --git a/arch/arm/boot/dts/nxp/imx/imx27.dtsi b/arch/arm/boot/dts/nxp/i= mx/imx27.dtsi index ec472695c71e..ec3ccc8f4095 100644 --- a/arch/arm/boot/dts/nxp/imx/imx27.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx27.dtsi @@ -568,7 +568,7 @@ nfc: nand-controller@d8000000 { status =3D "disabled"; }; =20 - weim: weim@d8002000 { + weim: memory-controller@d8002000 { #address-cells =3D <2>; #size-cells =3D <1>; compatible =3D "fsl,imx27-weim"; diff --git a/arch/arm/boot/dts/nxp/imx/imx31.dtsi b/arch/arm/boot/dts/nxp/i= mx/imx31.dtsi index e1ae7c175f7d..00006c90d9a7 100644 --- a/arch/arm/boot/dts/nxp/imx/imx31.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx31.dtsi @@ -352,7 +352,7 @@ nfc: nand@b8000000 { status =3D "disabled"; }; =20 - weim: weim@b8002000 { + weim: memory-controller@b8002000 { compatible =3D "fsl,imx31-weim", "fsl,imx27-weim"; reg =3D <0xb8002000 0x1000>; clocks =3D <&clks 56>; diff --git a/arch/arm/boot/dts/nxp/imx/imx35.dtsi b/arch/arm/boot/dts/nxp/i= mx/imx35.dtsi index 2d20e5541acc..442dc15677b8 100644 --- a/arch/arm/boot/dts/nxp/imx/imx35.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx35.dtsi @@ -374,7 +374,7 @@ nfc: nand@bb000000 { status =3D "disabled"; }; =20 - weim: weim@b8002000 { + weim: memory-controller@b8002000 { #address-cells =3D <2>; #size-cells =3D <1>; clocks =3D <&clks 0>; diff --git a/arch/arm/boot/dts/nxp/imx/imx51.dtsi b/arch/arm/boot/dts/nxp/i= mx/imx51.dtsi index c96d6311dfa7..4efce49022e4 100644 --- a/arch/arm/boot/dts/nxp/imx/imx51.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx51.dtsi @@ -578,7 +578,7 @@ m4if: m4if@83fd8000 { reg =3D <0x83fd8000 0x1000>; }; =20 - weim: weim@83fda000 { + weim: memory-controller@83fda000 { #address-cells =3D <2>; #size-cells =3D <1>; compatible =3D "fsl,imx51-weim"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi b/arch/arm/boot/dts/nxp= /imx/imx6qdl.dtsi index 81142c523fa8..8431b8a994f4 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi @@ -1158,7 +1158,7 @@ mmdc1: memory-controller@21b4000 { /* MMDC1 */ status =3D "disabled"; }; =20 - weim: weim@21b8000 { + weim: memory-controller@21b8000 { #address-cells =3D <2>; #size-cells =3D <1>; compatible =3D "fsl,imx6q-weim"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6sl.dtsi b/arch/arm/boot/dts/nxp/= imx/imx6sl.dtsi index 28111efb19a6..6aa61235e39e 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6sl.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6sl.dtsi @@ -949,7 +949,7 @@ rngb: rngb@21b4000 { clocks =3D <&clks IMX6SL_CLK_DUMMY>; }; =20 - weim: weim@21b8000 { + weim: memory-controller@21b8000 { #address-cells =3D <2>; #size-cells =3D <1>; reg =3D <0x021b8000 0x4000>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi b/arch/arm/boot/dts/nxp/= imx/imx6sx.dtsi index df3a375f0a3e..0de359d62a47 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi @@ -1107,7 +1107,7 @@ fec2: ethernet@21b4000 { status =3D "disabled"; }; =20 - weim: weim@21b8000 { + weim: memory-controller@21b8000 { #address-cells =3D <2>; #size-cells =3D <1>; compatible =3D "fsl,imx6sx-weim", "fsl,imx6q-weim"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi b/arch/arm/boot/dts/nxp/= imx/imx6ul.dtsi index 8aa365f837ca..aeb7e07fd309 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi @@ -975,7 +975,7 @@ memory-controller@21b0000 { clocks =3D <&clks IMX6UL_CLK_MMDC_P0_IPG>; }; =20 - weim: weim@21b8000 { + weim: memory-controller@21b8000 { #address-cells =3D <2>; #size-cells =3D <1>; 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Sat, 24 Feb 2024 22:33:10 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski Subject: [PATCH v4 14/16] dt-bindings: vendor-prefixes: add UNI-T Date: Sat, 24 Feb 2024 22:29:46 +0100 Message-ID: <20240224213240.1854709-15-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240224213240.1854709-1-sre@kernel.org> References: <20240224213240.1854709-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Uni-Trend Technology is a manufacturer of measurement and testing tools. Acked-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Docum= entation/devicetree/bindings/vendor-prefixes.yaml index 1a0dc04f1db4..e945e76696c2 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1484,6 +1484,8 @@ patternProperties: description: Ufi Space Co., Ltd. "^ugoos,.*": description: Ugoos Industrial Co., Ltd. + "^uni-t,.*": + description: Uni-Trend Technology (China) Co., Ltd. "^uniwest,.*": description: United Western Technologies Corp (UniWest) "^upisemi,.*": --=20 2.43.0 From nobody Tue Dec 16 11:04:33 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BBDFA53391; Sat, 24 Feb 2024 21:33:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708810398; cv=none; b=aMkigSyh8pHm8MBaTQLtoGfU88pXejJK5wtU/fh7I/DOYs46bDH4gRiOH4QVW/24zXGHsOJlK54m3xc+PiOXv4zj6i7CpFGVwDb8LsWdfllSBRF+Ga0Xor3/LucovKjELDLs5n2x84E6drP9jqB2pa9vtVtvpWzo8KiV29+gjBI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708810398; c=relaxed/simple; bh=JzqwkQRLgk7k3EhjNENSRph/tpijOyPkAp/qgI/FbTw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=I/iwbPnp0vsWWRPBw2yNmLPYQ3BvfyTbGEL3Yoc/pFrHamHYk1Ik2p+o25RTMryn4LEE8Vw81wI322iAu05P6urHTW4iFWCY/S1CufJ2ruHK3gncpBxUGhnf7DrkS8+L5w72qnfrBdjDq+TZHmUIsCuvcerhMCtrUFF2AI90gu4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=NRqOpcrv; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="NRqOpcrv" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 32E8FC43141; Sat, 24 Feb 2024 21:33:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1708810398; bh=JzqwkQRLgk7k3EhjNENSRph/tpijOyPkAp/qgI/FbTw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NRqOpcrv68im30SahywHhKVh6UtBgd42RFGW9T6/sGbZvlO7CrHGkrhIAPwdJ8xCz 43QAE1TqS0ArwKg/Q59pcrUlNF35ulQ5NoswD/jqnhnrjZYify1u1IthNs9UemjuLc ztqrCTvSxnKGpxjwMJdLJCBMeOn7jgbE293aIfz9Qyri7mmHFb1eQdR+9U4KnHjK7O Ou86Hr5ikvRIf41oDc+Z66sqysNm9iKSVa8uLy9IPLxMyeTT3ieaUahIZc27NaKSLq cWTsCKJl6wcPwZBt2ztpOE6ZgPLpXuzS646ZyR2lYX2gXxPkF6GjE1+0L/JAY+sgAA s4VBlH7kgS/hg== Received: by mercury (Postfix, from userid 1000) id 45B681061142; Sat, 24 Feb 2024 22:33:10 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski Subject: [PATCH v4 15/16] dt-bindings: arm: add UNI-T UTi260B Date: Sat, 24 Feb 2024 22:29:47 +0100 Message-ID: <20240224213240.1854709-16-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240224213240.1854709-1-sre@kernel.org> References: <20240224213240.1854709-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add compatible value for i.MX6ULL based UNI-T UTi260B thermal camera. Acked-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel --- Documentation/devicetree/bindings/arm/fsl.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation= /devicetree/bindings/arm/fsl.yaml index 228dcc5c7d6f..7b65f9c9c1a5 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -708,6 +708,7 @@ properties: - toradex,colibri-imx6ull # Colibri iMX6ULL Modules - toradex,colibri-imx6ull-emmc # Colibri iMX6ULL 1GB (eMMC) = Module - toradex,colibri-imx6ull-wifi # Colibri iMX6ULL Wi-Fi / BT = Modules + - uni-t,uti260b # UNI-T UTi260B Thermal Camera - const: fsl,imx6ull =20 - description: i.MX6ULL Armadeus Systems OPOS6ULDev Board --=20 2.43.0 From nobody Tue Dec 16 11:04:33 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 013C24CE09; Sat, 24 Feb 2024 21:33:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708810399; cv=none; b=kT4EoQ3/f+FrBQ0Ph/I409CfqzL1ioGWwTWUkGm2wLZtIfbrRiwAXeGtv87VLDUNrkGfKltQH1xwa77JP56Yl/jZzHXDVvIh9c0M3gxsYfruiI3DLv0AoIlDMcPO/Up7z/nT63svc7lrtYd8TtCexSYcMXYkTmp5o7F0/g+w3u0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708810399; c=relaxed/simple; bh=N31IZjQXsK4G49dvuF9O8a4vrfSOWIexVKIPhJlQQJE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=LRFvZPe7SnPrPMJ8Wwa8cSCHkaGwMisIweRVxqMhLTroIyXqtdkGfYMQcVrvo5a2sxPScc7KLb9/QSlO2ua3D0IQgWGQP6j7V29jbttDaxF/w5IPtxrAf59Ah97JlDsuYfl2QPw6ZHDUhlSASgA5sanvQN0ys1E1x9hC2Ytc0fI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ctL8U6p6; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ctL8U6p6" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 331EBC4166A; Sat, 24 Feb 2024 21:33:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1708810398; bh=N31IZjQXsK4G49dvuF9O8a4vrfSOWIexVKIPhJlQQJE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ctL8U6p6zoerF20OnI8y9EqjRzb2XxLCnmGciJh9IdgbaDl+t0eLu+joq3W1JsPgS g3c989nTG8K488XvKOyRtP51+l4Hf4FN/dPNYOh0LGXdV/lmfcUZODYdfoo+WZnAOq zpAufUBtlbqkcRBgsBJAmMioKfqGJ3JLGNDqpgBFGsOSU93iTQ6Pznaj5jkDr0qGAQ QjPvcGQApMCxSumKp1tmht9P9Z4JbeQ2igd5Vpc3EI+qY4ITl6CKaBl1y5AAwAPb47 zpWV0BgtonrNjCfV0j/CSwGX6BfmIUdaQFkdGscmJDQ7uCjSKL+b58MtPtuXc3j8h2 OoDvzzL/FfJdg== Received: by mercury (Postfix, from userid 1000) id 4CD7D1061145; Sat, 24 Feb 2024 22:33:10 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Stefan Wahren Subject: [PATCH v4 16/16] ARM: dts: imx6ull-uti260b: Add board Date: Sat, 24 Feb 2024 22:29:48 +0100 Message-ID: <20240224213240.1854709-17-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240224213240.1854709-1-sre@kernel.org> References: <20240224213240.1854709-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add UNI-T UTi260b thermal camera board. Reviewed-by: Stefan Wahren Signed-off-by: Sebastian Reichel Reviewed-by: Fabio Estevam --- arch/arm/boot/dts/nxp/imx/Makefile | 1 + arch/arm/boot/dts/nxp/imx/imx6ull-uti260b.dts | 567 ++++++++++++++++++ 2 files changed, 568 insertions(+) create mode 100644 arch/arm/boot/dts/nxp/imx/imx6ull-uti260b.dts diff --git a/arch/arm/boot/dts/nxp/imx/Makefile b/arch/arm/boot/dts/nxp/imx= /Makefile index a724d1a7a9a0..47350cf3ddeb 100644 --- a/arch/arm/boot/dts/nxp/imx/Makefile +++ b/arch/arm/boot/dts/nxp/imx/Makefile @@ -349,6 +349,7 @@ dtb-$(CONFIG_SOC_IMX6UL) +=3D \ imx6ull-tarragon-slavext.dtb \ imx6ull-tqma6ull2-mba6ulx.dtb \ imx6ull-tqma6ull2l-mba6ulx.dtb \ + imx6ull-uti260b.dtb \ imx6ulz-14x14-evk.dtb \ imx6ulz-bsh-smm-m2.dtb dtb-$(CONFIG_SOC_IMX7D) +=3D \ diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-uti260b.dts b/arch/arm/boot/= dts/nxp/imx/imx6ull-uti260b.dts new file mode 100644 index 000000000000..8f6f092363b7 --- /dev/null +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-uti260b.dts @@ -0,0 +1,567 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// Copyright (C) 2022-2024 Sebastian Reichel + +/dts-v1/; +#include "imx6ull.dtsi" +#include +#include +#include +#include + +/ { + model =3D "UNI-T UTi260B Thermal Camera"; + compatible =3D "uni-t,uti260b", "fsl,imx6ull"; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + memory@80000000 { + device_type =3D "memory"; + reg =3D <0x80000000 0x20000000>; + }; + + leds { + compatible =3D "gpio-leds"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_led_ctrl>; + + led { + color =3D ; + function =3D LED_FUNCTION_FLASH; + gpios =3D <&gpio2 2 GPIO_ACTIVE_HIGH>; + default-state =3D "off"; + }; + }; + + gpio-keys { + compatible =3D "gpio-keys"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_gpio_keys>; + autorepeat; + + up-key { + label =3D "Up"; + gpios =3D <&gpio2 11 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + down-key { + label =3D "Down"; + gpios =3D <&gpio2 12 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + left-key { + label =3D "Left"; + gpios =3D <&gpio2 13 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + right-key { + label =3D "Right"; + gpios =3D <&gpio2 10 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + ok-key { + label =3D "Ok"; + gpios =3D <&gpio2 9 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + return-key { + label =3D "Return"; + gpios =3D <&gpio2 15 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + play-key { + label =3D "Media"; + gpios =3D <&gpio2 8 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + trigger-key { + label =3D "Trigger"; + gpios =3D <&gpio2 14 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + power-key { + label =3D "Power"; + gpios =3D <&gpio2 3 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + light-key { + label =3D "Light"; + gpios =3D <&gpio2 1 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + }; + + panel_backlight: backlight { + compatible =3D "pwm-backlight"; + brightness-levels =3D <0 4 8 16 32 64 128 255>; + default-brightness-level =3D <6>; + enable-gpios =3D <&gpio1 9 GPIO_ACTIVE_LOW>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_backlight_enable>; + power-supply =3D <®_vsd>; + pwms =3D <&pwm1 0 50000 0>; + }; + + reg_vsd: regulator-vsd { + compatible =3D "regulator-fixed"; + regulator-name =3D "VSD_3V3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + }; + + reg_vref: regulator-vref-4v2 { + compatible =3D "regulator-fixed"; + regulator-name =3D "VREF_4V2"; + regulator-min-microvolt =3D <4200000>; + regulator-max-microvolt =3D <4200000>; + }; + + tp5000: charger { + compatible =3D "gpio-charger"; + charger-type =3D "usb-sdp"; + gpios =3D <&gpio1 1 GPIO_ACTIVE_LOW>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_charger_stat1>; + }; + + battery: battery { + compatible =3D "simple-battery"; + /* generic 26650 battery */ + device-chemistry =3D "lithium-ion"; + charge-full-design-microamp-hours =3D <5000000>; + voltage-max-design-microvolt =3D <4200000>; + voltage-min-design-microvolt =3D <3300000>; + }; + + fuel-gauge { + compatible =3D "adc-battery"; + charged-gpios =3D <&gpio1 2 GPIO_ACTIVE_LOW>; + io-channel-names =3D "voltage"; + io-channels =3D <&adc1 7>; + monitored-battery =3D <&battery>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_charger_stat2>; + power-supplies =3D <&tp5000>; + }; + + poweroff { + compatible =3D "gpio-poweroff"; + gpios =3D <&gpio2 4 GPIO_ACTIVE_LOW>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_poweroff>; + }; +}; + +&gpio1 { + ir-reset-hog { + gpio-hog; + gpios =3D <3 GPIO_ACTIVE_LOW>; + line-name =3D "ir-reset-gpio"; + output-low; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_ir_reset>; + }; +}; + +&gpio2 { + /* configuring this to output-high results in poweroff */ + power-en-hog { + gpio-hog; + gpios =3D <6 GPIO_ACTIVE_HIGH>; + line-name =3D "power-en-gpio"; + output-low; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_poweroff2>; + }; +}; + +&ecspi3 { + cs-gpios =3D <&gpio1 20 GPIO_ACTIVE_LOW>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_spi3>; + status =3D "okay"; + + panel@0 { + compatible =3D "inanbo,t28cp45tn89-v17"; + reg =3D <0>; + backlight =3D <&panel_backlight>; + power-supply =3D <®_vsd>; + spi-cpha; + spi-cpol; + spi-max-frequency =3D <1000000>; + spi-rx-bus-width =3D <0>; + + port { + panel_in: endpoint { + remote-endpoint =3D <&display_out>; + }; + }; + }; +}; + +&uart1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_uart>; + status =3D "okay"; +}; + +&pwm1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_pwm>; + status =3D "okay"; +}; + +&i2c1 { + clock-frequency =3D <100000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_i2c1>; + status =3D "okay"; + + camera@21 { + compatible =3D "galaxycore,gc0308"; + reg =3D <0x21>; + clocks =3D <&clks IMX6UL_CLK_CSI>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_gc0308>; + powerdown-gpios =3D <&gpio1 5 GPIO_ACTIVE_HIGH>; + reset-gpios =3D <&gpio1 6 GPIO_ACTIVE_LOW>; + vdd28-supply =3D <®_vsd>; + + port { + gc0308_to_parallel: endpoint { + remote-endpoint =3D <¶llel_from_gc0308>; + bus-width =3D <8>; + data-shift =3D <2>; /* lines 9:2 are used */ + hsync-active =3D <1>; /* active high */ + vsync-active =3D <1>; /* active high */ + data-active =3D <1>; /* active high */ + pclk-sample =3D <1>; /* sample on rising edge */ + }; + }; + }; +}; + +&csi { + status =3D "okay"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_csi>; + + port { + parallel_from_gc0308: endpoint { + remote-endpoint =3D <&gc0308_to_parallel>; + }; + }; +}; + +&i2c2 { + clock-frequency =3D <100000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_i2c2>; + status =3D "okay"; + + rtc@51 { + compatible =3D "nxp,pcf8563"; + reg =3D <0x51>; + }; +}; + +&lcdif { + assigned-clocks =3D <&clks IMX6UL_CLK_LCDIF_PRE_SEL>; + assigned-clock-parents =3D <&clks IMX6UL_CLK_PLL5_VIDEO_DIV>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_lcd_data>, <&mux_lcd_ctrl>; + status =3D "okay"; + + port { + display_out: endpoint { + remote-endpoint =3D <&panel_in>; + }; + }; +}; + +&usdhc1 { + /* MicroSD */ + cd-gpios =3D <&gpio1 19 GPIO_ACTIVE_LOW>; + keep-power-in-suspend; + no-1-8-v; + pinctrl-names =3D "default", "state_100mhz", "state_200mhz"; + pinctrl-0 =3D <&mux_sdhc1>, <&mux_sdhc1_cd>; + pinctrl-1 =3D <&mux_sdhc1_100mhz>, <&mux_sdhc1_cd>; + pinctrl-2 =3D <&mux_sdhc1_200mhz>, <&mux_sdhc1_cd>; + wakeup-source; + vmmc-supply =3D <®_vsd>; + status =3D "okay"; +}; + +&usdhc2 { + /* eMMC */ + keep-power-in-suspend; + no-1-8-v; + non-removable; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_sdhc2>; + wakeup-source; + status =3D "okay"; +}; + +&wdog1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_wdog>; +}; + +&adc1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_adc>; + vref-supply =3D <®_vref>; + #io-channel-cells =3D <1>; + status =3D "okay"; +}; + +&usbotg1 { + /* USB-C connector */ + disable-over-current; + dr_mode =3D "otg"; + status =3D "okay"; +}; + +&usbotg2 { + /* thermal sensor */ + disable-over-current; + dr_mode =3D "host"; + status =3D "okay"; +}; + +&usbphy1 { + fsl,tx-d-cal =3D <106>; +}; + +&usbphy2 { + fsl,tx-d-cal =3D <106>; +}; + +&iomuxc { + mux_ir_reset: irresetgrp { + fsl,pins =3D < + MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0x3008 + >; + }; + + mux_poweroff: poweroffgrp { + fsl,pins =3D < + MX6UL_PAD_ENET1_TX_DATA1__GPIO2_IO04 0x3008 + >; + }; + + mux_poweroff2: poweroff2grp { + fsl,pins =3D < + MX6UL_PAD_ENET1_TX_CLK__GPIO2_IO06 0x3008 + >; + }; + + mux_charger_stat1: charger1grp { + fsl,pins =3D < + MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0x3008 + >; + }; + + mux_charger_stat2: charger2grp { + fsl,pins =3D < + MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0x3008 + >; + }; + + mux_wdog: wdoggrp { + fsl,pins =3D < + MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0x30b0 + >; + }; + + mux_sdhc1_cd: sdhc1-cd-grp { + fsl,pins =3D < + MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059 + >; + }; + + mux_sdhc1: sdhc1grp { + fsl,pins =3D < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10071 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 + >; + }; + + mux_sdhc1_100mhz: sdhc1-100mhz-grp { + fsl,pins =3D < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x170b9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 + >; + }; + + mux_sdhc1_200mhz: sdhc1-200mhz-grp { + fsl,pins =3D < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x170f9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9 + >; + }; + + mux_sdhc2: sdhc2grp { + fsl,pins =3D < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059 + >; + }; + + mux_i2c1: i2c1grp { + fsl,pins =3D < + MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 + MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0 + >; + }; + + mux_i2c2: i2c2grp { + fsl,pins =3D < + MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001f8a8 + MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001f8a8 + >; + }; + + mux_uart: uartgrp { + fsl,pins =3D < + MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 + MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 + >; + }; + + mux_gpio_keys: gpiokeygrp { + fsl,pins =3D < + MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11 0x3008 + MX6UL_PAD_ENET2_TX_DATA1__GPIO2_IO12 0x3008 + MX6UL_PAD_ENET2_TX_EN__GPIO2_IO13 0x3008 + MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10 0x3008 + MX6UL_PAD_ENET2_RX_DATA1__GPIO2_IO09 0x3008 + MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15 0x3008 + MX6UL_PAD_ENET2_RX_DATA0__GPIO2_IO08 0x3008 + MX6UL_PAD_ENET2_TX_CLK__GPIO2_IO14 0x3008 + MX6UL_PAD_ENET1_TX_DATA0__GPIO2_IO03 0x3008 + MX6UL_PAD_ENET1_RX_DATA1__GPIO2_IO01 0x3008 + >; + }; + + mux_led_ctrl: ledctrlgrp { + fsl,pins =3D < + MX6UL_PAD_ENET1_RX_EN__GPIO2_IO02 0x3008 + >; + }; + + mux_adc: adcgrp { + fsl,pins =3D < + MX6UL_PAD_GPIO1_IO07__GPIO1_IO07 0xb0 + >; + }; + + mux_pwm: pwm1grp { + fsl,pins =3D < + MX6UL_PAD_GPIO1_IO08__PWM1_OUT 0x110b0 + >; + }; + + mux_backlight_enable: blenablegrp { + fsl,pins =3D < + MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x3008 + >; + }; + + mux_lcd_data: lcdifdatgrp { + fsl,pins =3D < + MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79 + MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79 + MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79 + MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79 + MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79 + MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79 + MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79 + MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79 + MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79 + MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79 + MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79 + MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79 + MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79 + MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79 + MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79 + MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79 + MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79 + MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79 + >; + }; + + mux_lcd_ctrl: lcdifctrlgrp { + fsl,pins =3D < + MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79 + MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79 + MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79 + MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79 + >; + }; + + mux_csi: csi1grp { + fsl,pins =3D < + MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088 + MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088 + MX6UL_PAD_CSI_HSYNC__CSI_HSYNC 0x1b088 + MX6UL_PAD_CSI_DATA00__CSI_DATA02 0x1b088 + MX6UL_PAD_CSI_DATA01__CSI_DATA03 0x1b088 + MX6UL_PAD_CSI_DATA02__CSI_DATA04 0x1b088 + MX6UL_PAD_CSI_DATA03__CSI_DATA05 0x1b088 + MX6UL_PAD_CSI_DATA04__CSI_DATA06 0x1b088 + MX6UL_PAD_CSI_DATA05__CSI_DATA07 0x1b088 + MX6UL_PAD_CSI_DATA06__CSI_DATA08 0x1b088 + MX6UL_PAD_CSI_DATA07__CSI_DATA09 0x1b088 + >; + }; + + mux_gc0308: gc0308grp { + fsl,pins =3D < + MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1e038 + MX6UL_PAD_GPIO1_IO05__GPIO1_IO05 0x1b088 + MX6UL_PAD_GPIO1_IO06__GPIO1_IO06 0x1b088 + >; + }; + + + mux_spi3: ecspi3grp { + fsl,pins =3D < + MX6UL_PAD_UART2_CTS_B__ECSPI3_MOSI 0x100b1 + MX6UL_PAD_UART2_RX_DATA__ECSPI3_SCLK 0x100b1 + MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20 0x3008 + >; + }; +}; --=20 2.43.0