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So introduce the helper get_max_msg_size. Reviewed-by: Cristian Marussi Signed-off-by: Peng Fan --- drivers/firmware/arm_scmi/driver.c | 15 +++++++++++++++ drivers/firmware/arm_scmi/protocols.h | 2 ++ 2 files changed, 17 insertions(+) diff --git a/drivers/firmware/arm_scmi/driver.c b/drivers/firmware/arm_scmi= /driver.c index 34d77802c990..6f059a585896 100644 --- a/drivers/firmware/arm_scmi/driver.c +++ b/drivers/firmware/arm_scmi/driver.c @@ -1488,6 +1488,20 @@ static int scmi_common_extended_name_get(const struc= t scmi_protocol_handle *ph, return ret; } =20 +/** + * scmi_common_get_max_msg_size - Get maximum message size + * @ph: A protocol handle reference. + * + * Return: Maximum message size for the current protocol. + */ +static int scmi_common_get_max_msg_size(const struct scmi_protocol_handle = *ph) +{ + const struct scmi_protocol_instance *pi =3D ph_to_pi(ph); + struct scmi_info *info =3D handle_to_scmi_info(pi->handle); + + return info->desc->max_msg_size; +} + /** * struct scmi_iterator - Iterator descriptor * @msg: A reference to the message TX buffer; filled by @prepare_message = with @@ -1796,6 +1810,7 @@ static int scmi_protocol_msg_check(const struct scmi_= protocol_handle *ph, =20 static const struct scmi_proto_helpers_ops helpers_ops =3D { .extended_name_get =3D scmi_common_extended_name_get, + .get_max_msg_size =3D scmi_common_get_max_msg_size, .iter_response_init =3D scmi_iterator_init, .iter_response_run =3D scmi_iterator_run, .protocol_msg_check =3D scmi_protocol_msg_check, diff --git a/drivers/firmware/arm_scmi/protocols.h b/drivers/firmware/arm_s= cmi/protocols.h index 693019fff0f6..9c8edb1aa901 100644 --- a/drivers/firmware/arm_scmi/protocols.h +++ b/drivers/firmware/arm_scmi/protocols.h @@ -257,6 +257,7 @@ struct scmi_fc_info { * @fastchannel_init: A common helper used to initialize FC descriptors by * gathering FC descriptions from the SCMI platform server. * @fastchannel_db_ring: A common helper to ring a FC doorbell. + * @get_max_msg_size: A common helper to get the maximum message size. */ struct scmi_proto_helpers_ops { int (*extended_name_get)(const struct scmi_protocol_handle *ph, @@ -275,6 +276,7 @@ struct scmi_proto_helpers_ops { void __iomem **p_addr, struct scmi_fc_db_info **p_db); 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Reviewed-by: Rob Herring Reviewed-by: Linus Walleij Signed-off-by: Peng Fan --- .../devicetree/bindings/firmware/arm,scmi.yaml | 50 ++++++++++++++++++= ++++ 1 file changed, 50 insertions(+) diff --git a/Documentation/devicetree/bindings/firmware/arm,scmi.yaml b/Doc= umentation/devicetree/bindings/firmware/arm,scmi.yaml index 4591523b51a0..bba4a37de6b4 100644 --- a/Documentation/devicetree/bindings/firmware/arm,scmi.yaml +++ b/Documentation/devicetree/bindings/firmware/arm,scmi.yaml @@ -247,6 +247,37 @@ properties: reg: const: 0x18 =20 + protocol@19: + type: object + allOf: + - $ref: '#/$defs/protocol-node' + - $ref: /schemas/pinctrl/pinctrl.yaml + + unevaluatedProperties: false + + properties: + reg: + const: 0x19 + + patternProperties: + '-pins$': + type: object + allOf: + - $ref: /schemas/pinctrl/pincfg-node.yaml# + - $ref: /schemas/pinctrl/pinmux-node.yaml# + unevaluatedProperties: false + + description: + A pin multiplexing sub-node describe how to configure a + set of pins is some desired function. + A single sub-node may define several pin configurations. + This sub-node is using default pinctrl bindings to configure + pin multiplexing and using SCMI protocol to apply specified + configuration using SCMI protocol. + + required: + - reg + additionalProperties: false =20 $defs: @@ -401,6 +432,25 @@ examples: scmi_powercap: protocol@18 { reg =3D <0x18>; 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Fri, 23 Feb 2024 01:08:55 +0000 From: "Peng Fan (OSS)" Date: Fri, 23 Feb 2024 09:16:40 +0800 Subject: [PATCH v4 3/4] firmware: arm_scmi: Add SCMI v3.2 pincontrol protocol basic support Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240223-pinctrl-scmi-v4-3-10eb5a379274@nxp.com> References: <20240223-pinctrl-scmi-v4-0-10eb5a379274@nxp.com> In-Reply-To: <20240223-pinctrl-scmi-v4-0-10eb5a379274@nxp.com> To: Sudeep Holla , Cristian Marussi , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Oleksii Moisieiev , Linus Walleij , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, AKASHI Takahiro , Peng Fan X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1708651021; l=28800; i=peng.fan@nxp.com; s=20230812; h=from:subject:message-id; bh=zGkqCflIrU5dFL1Z2SpIbBd2M2OSAueCQy5mW9LNH3g=; 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Reviewed-by: Cristian Marussi Tested-by: Cristian Marussi Reviewed-by: Linus Walleij Signed-off-by: Oleksii Moisieiev Co-developed-by: Peng Fan Signed-off-by: Peng Fan --- drivers/firmware/arm_scmi/Makefile | 1 + drivers/firmware/arm_scmi/driver.c | 2 + drivers/firmware/arm_scmi/pinctrl.c | 908 ++++++++++++++++++++++++++++++= ++++ drivers/firmware/arm_scmi/protocols.h | 1 + include/linux/scmi_protocol.h | 75 +++ 5 files changed, 987 insertions(+) diff --git a/drivers/firmware/arm_scmi/Makefile b/drivers/firmware/arm_scmi= /Makefile index a7bc4796519c..8e3874ff1544 100644 --- a/drivers/firmware/arm_scmi/Makefile +++ b/drivers/firmware/arm_scmi/Makefile @@ -11,6 +11,7 @@ scmi-transport-$(CONFIG_ARM_SCMI_HAVE_MSG) +=3D msg.o scmi-transport-$(CONFIG_ARM_SCMI_TRANSPORT_VIRTIO) +=3D virtio.o scmi-transport-$(CONFIG_ARM_SCMI_TRANSPORT_OPTEE) +=3D optee.o scmi-protocols-y =3D base.o clock.o perf.o power.o reset.o sensors.o syste= m.o voltage.o powercap.o +scmi-protocols-y +=3D pinctrl.o scmi-module-objs :=3D $(scmi-driver-y) $(scmi-protocols-y) $(scmi-transpor= t-y) =20 obj-$(CONFIG_ARM_SCMI_PROTOCOL) +=3D scmi-core.o diff --git a/drivers/firmware/arm_scmi/driver.c b/drivers/firmware/arm_scmi= /driver.c index 6f059a585896..1a4123758b2d 100644 --- a/drivers/firmware/arm_scmi/driver.c +++ b/drivers/firmware/arm_scmi/driver.c @@ -3139,6 +3139,7 @@ static int __init scmi_driver_init(void) scmi_voltage_register(); scmi_system_register(); scmi_powercap_register(); + scmi_pinctrl_register(); =20 return platform_driver_register(&scmi_driver); } @@ -3156,6 +3157,7 @@ static void __exit scmi_driver_exit(void) scmi_voltage_unregister(); scmi_system_unregister(); scmi_powercap_unregister(); + scmi_pinctrl_unregister(); =20 scmi_transports_exit(); =20 diff --git a/drivers/firmware/arm_scmi/pinctrl.c b/drivers/firmware/arm_scm= i/pinctrl.c new file mode 100644 index 000000000000..0fcfa4269473 --- /dev/null +++ b/drivers/firmware/arm_scmi/pinctrl.c @@ -0,0 +1,908 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * System Control and Management Interface (SCMI) Pinctrl Protocol + * + * Copyright (C) 2024 EPAM + * Copyright 2024 NXP + */ + +#include +#include +#include + +#include "common.h" +#include "protocols.h" + +/* Updated only after ALL the mandatory features for that version are merg= ed */ +#define SCMI_PROTOCOL_SUPPORTED_VERSION 0x0 + +#define REG_TYPE_BITS GENMASK(9, 8) +#define REG_CONFIG GENMASK(7, 0) + +#define GET_GROUPS_NR(x) le32_get_bits((x), GENMASK(31, 16)) +#define GET_PINS_NR(x) le32_get_bits((x), GENMASK(15, 0)) +#define GET_FUNCTIONS_NR(x) le32_get_bits((x), GENMASK(15, 0)) + +#define EXT_NAME_FLAG(x) le32_get_bits((x), BIT(31)) +#define NUM_ELEMS(x) le32_get_bits((x), GENMASK(15, 0)) + +#define REMAINING(x) le32_get_bits((x), GENMASK(31, 16)) +#define RETURNED(x) le32_get_bits((x), GENMASK(11, 0)) + +enum scmi_pinctrl_protocol_cmd { + PINCTRL_ATTRIBUTES =3D 0x3, + PINCTRL_LIST_ASSOCIATIONS =3D 0x4, + PINCTRL_CONFIG_GET =3D 0x5, + PINCTRL_CONFIG_SET =3D 0x6, + PINCTRL_FUNCTION_SELECT =3D 0x7, + PINCTRL_REQUEST =3D 0x8, + PINCTRL_RELEASE =3D 0x9, + PINCTRL_NAME_GET =3D 0xa, + PINCTRL_SET_PERMISSIONS =3D 0xb +}; + +struct scmi_msg_conf_set { + __le32 identifier; + __le32 attributes; + __le32 configs[]; +}; + +struct scmi_msg_conf_get { + __le32 identifier; + __le32 attributes; +}; + +struct scmi_resp_conf_get { + __le32 num_configs; + __le32 configs[]; +}; + +struct scmi_msg_pinctrl_protocol_attributes { + __le32 attributes_low; + __le32 attributes_high; +}; + +struct scmi_msg_pinctrl_attributes { + __le32 identifier; + __le32 flags; +}; + +struct scmi_resp_pinctrl_attributes { + __le32 attributes; + u8 name[SCMI_SHORT_NAME_MAX_SIZE]; +}; + +struct scmi_msg_pinctrl_list_assoc { + __le32 identifier; + __le32 flags; + __le32 index; +}; + +struct scmi_resp_pinctrl_list_assoc { + __le32 flags; + __le16 array[]; +}; + +struct scmi_msg_func_set { + __le32 identifier; + __le32 function_id; + __le32 flags; +}; + +struct scmi_msg_request { + __le32 identifier; + __le32 flags; +}; + +struct scmi_group_info { + char name[SCMI_MAX_STR_SIZE]; + bool present; + unsigned int *group_pins; + unsigned int nr_pins; +}; + +struct scmi_function_info { + char name[SCMI_MAX_STR_SIZE]; + bool present; + unsigned int *groups; + unsigned int nr_groups; +}; + +struct scmi_pin_info { + char name[SCMI_MAX_STR_SIZE]; + bool present; +}; + +struct scmi_pinctrl_info { + u32 version; + int nr_groups; + int nr_functions; + int nr_pins; + struct scmi_group_info *groups; + struct scmi_function_info *functions; + struct scmi_pin_info *pins; +}; + +static int scmi_pinctrl_attributes_get(const struct scmi_protocol_handle *= ph, + struct scmi_pinctrl_info *pi) +{ + int ret; + struct scmi_xfer *t; + struct scmi_msg_pinctrl_protocol_attributes *attr; + + ret =3D ph->xops->xfer_get_init(ph, PROTOCOL_ATTRIBUTES, 0, sizeof(*attr), + &t); + if (ret) + return ret; + + attr =3D t->rx.buf; + + ret =3D ph->xops->do_xfer(ph, t); + if (!ret) { + pi->nr_functions =3D GET_FUNCTIONS_NR(attr->attributes_high); + pi->nr_groups =3D GET_GROUPS_NR(attr->attributes_low); + pi->nr_pins =3D GET_PINS_NR(attr->attributes_low); + } + + ph->xops->xfer_put(ph, t); + return ret; +} + +static int scmi_pinctrl_count_get(const struct scmi_protocol_handle *ph, + enum scmi_pinctrl_selector_type type) +{ + struct scmi_pinctrl_info *pi =3D ph->get_priv(ph); + + switch (type) { + case PIN_TYPE: + return pi->nr_pins; + case GROUP_TYPE: + return pi->nr_groups; + case FUNCTION_TYPE: + return pi->nr_functions; + default: + return -EINVAL; + } +} + +static int scmi_pinctrl_validate_id(const struct scmi_protocol_handle *ph, + u32 identifier, + enum scmi_pinctrl_selector_type type) +{ + int value; + + value =3D scmi_pinctrl_count_get(ph, type); + if (value < 0) + return value; + + if (identifier >=3D value) + return -EINVAL; + + return 0; +} + +static int scmi_pinctrl_attributes(const struct scmi_protocol_handle *ph, + enum scmi_pinctrl_selector_type type, + u32 selector, char *name, + unsigned int *n_elems) +{ + int ret; + struct scmi_xfer *t; + struct scmi_msg_pinctrl_attributes *tx; + struct scmi_resp_pinctrl_attributes *rx; + + if (!name) + return -EINVAL; + + ret =3D scmi_pinctrl_validate_id(ph, selector, type); + if (ret) + return ret; + + ret =3D ph->xops->xfer_get_init(ph, PINCTRL_ATTRIBUTES, sizeof(*tx), + sizeof(*rx), &t); + if (ret) + return ret; + + tx =3D t->tx.buf; + rx =3D t->rx.buf; + tx->identifier =3D cpu_to_le32(selector); + tx->flags =3D cpu_to_le32(type); + + ret =3D ph->xops->do_xfer(ph, t); + if (!ret) { + if (n_elems) + *n_elems =3D NUM_ELEMS(rx->attributes); + + strscpy(name, rx->name, SCMI_SHORT_NAME_MAX_SIZE); + } + + ph->xops->xfer_put(ph, t); + + /* + * If supported overwrite short name with the extended one; + * on error just carry on and use already provided short name. + */ + if (!ret && EXT_NAME_FLAG(rx->attributes)) + ph->hops->extended_name_get(ph, PINCTRL_NAME_GET, selector, + (u32 *)&type, name, + SCMI_MAX_STR_SIZE); + return ret; +} + +struct scmi_pinctrl_ipriv { + u32 selector; + enum scmi_pinctrl_selector_type type; + unsigned int *array; +}; + +static void iter_pinctrl_assoc_prepare_message(void *message, + unsigned int desc_index, + const void *priv) +{ + struct scmi_msg_pinctrl_list_assoc *msg =3D message; + const struct scmi_pinctrl_ipriv *p =3D priv; + + msg->identifier =3D cpu_to_le32(p->selector); + msg->flags =3D cpu_to_le32(p->type); + /* Set the number of OPPs to be skipped/already read */ + msg->index =3D cpu_to_le32(desc_index); +} + +static int iter_pinctrl_assoc_update_state(struct scmi_iterator_state *st, + const void *response, void *priv) +{ + const struct scmi_resp_pinctrl_list_assoc *r =3D response; + + st->num_returned =3D RETURNED(r->flags); + st->num_remaining =3D REMAINING(r->flags); + + return 0; +} + +static int +iter_pinctrl_assoc_process_response(const struct scmi_protocol_handle *ph, + const void *response, + struct scmi_iterator_state *st, void *priv) +{ + const struct scmi_resp_pinctrl_list_assoc *r =3D response; + struct scmi_pinctrl_ipriv *p =3D priv; + + p->array[st->desc_index + st->loop_idx] =3D + le16_to_cpu(r->array[st->loop_idx]); + + return 0; +} + +static int scmi_pinctrl_list_associations(const struct scmi_protocol_handl= e *ph, + u32 selector, + enum scmi_pinctrl_selector_type type, + u16 size, unsigned int *array) +{ + int ret; + void *iter; + struct scmi_iterator_ops ops =3D { + .prepare_message =3D iter_pinctrl_assoc_prepare_message, + .update_state =3D iter_pinctrl_assoc_update_state, + .process_response =3D iter_pinctrl_assoc_process_response, + }; + struct scmi_pinctrl_ipriv ipriv =3D { + .selector =3D selector, + .type =3D type, + .array =3D array, + }; + + if (!array || !size || type =3D=3D PIN_TYPE) + return -EINVAL; + + ret =3D scmi_pinctrl_validate_id(ph, selector, type); + if (ret) + return ret; + + iter =3D ph->hops->iter_response_init(ph, &ops, size, + PINCTRL_LIST_ASSOCIATIONS, + sizeof(struct scmi_msg_pinctrl_list_assoc), + &ipriv); + + if (IS_ERR(iter)) + return PTR_ERR(iter); + + return ph->hops->iter_response_run(iter); +} + +struct scmi_conf_get_ipriv { + u32 selector; + enum scmi_pinctrl_selector_type type; + u8 all; + enum scmi_pinctrl_conf_type *config_types; + u32 *config_values; +}; + +static void iter_pinctrl_conf_get_prepare_message(void *message, + unsigned int desc_index, + const void *priv) +{ + struct scmi_msg_conf_get *msg =3D message; + const struct scmi_conf_get_ipriv *p =3D priv; + u32 attributes; + + attributes =3D FIELD_PREP(BIT(18), p->all) | + FIELD_PREP(GENMASK(17, 16), p->type); + + if (p->all) + attributes |=3D FIELD_PREP(GENMASK(15, 8), desc_index); + else + attributes |=3D FIELD_PREP(GENMASK(7, 0), p->config_types[0]); + + msg->attributes =3D cpu_to_le32(attributes); + msg->identifier =3D cpu_to_le32(p->selector); +} + +static int iter_pinctrl_conf_get_update_state(struct scmi_iterator_state *= st, + const void *response, void *priv) +{ + const struct scmi_resp_conf_get *r =3D response; + struct scmi_conf_get_ipriv *p =3D priv; + + if (!p->all) { + st->num_returned =3D 1; + st->num_remaining =3D 0; + } else { + st->num_returned =3D le32_get_bits(r->num_configs, GENMASK(7, 0)); + st->num_remaining =3D le32_get_bits(r->num_configs, + GENMASK(31, 24)); + } + + return 0; +} + +static int +iter_pinctrl_conf_get_process_response(const struct scmi_protocol_handle *= ph, + const void *response, + struct scmi_iterator_state *st, + void *priv) +{ + const struct scmi_resp_conf_get *r =3D response; + struct scmi_conf_get_ipriv *p =3D priv; + + if (!p->all) { + if (p->config_types[0] !=3D + le32_get_bits(r->configs[st->loop_idx * 2], GENMASK(7, 0))) + return -EINVAL; + } else { + p->config_types[st->desc_index + st->loop_idx] =3D + le32_get_bits(r->configs[st->loop_idx * 2], + GENMASK(7, 0)); + } + + p->config_values[st->desc_index + st->loop_idx] =3D + le32_to_cpu(r->configs[st->loop_idx * 2 + 1]); + + return 0; +} + +static int +scmi_pinctrl_config_get(const struct scmi_protocol_handle *ph, u32 selecto= r, + enum scmi_pinctrl_selector_type type, + enum scmi_pinctrl_conf_type config_type, + u32 *config_value) +{ + int ret; + void *iter; + struct scmi_iterator_ops ops =3D { + .prepare_message =3D iter_pinctrl_conf_get_prepare_message, + .update_state =3D iter_pinctrl_conf_get_update_state, + .process_response =3D iter_pinctrl_conf_get_process_response, + }; + struct scmi_conf_get_ipriv ipriv =3D { + .selector =3D selector, + .type =3D type, + .all =3D 0, + .config_types =3D &config_type, + .config_values =3D config_value, + }; + + if (!config_value || type =3D=3D FUNCTION_TYPE) + return -EINVAL; + + ret =3D scmi_pinctrl_validate_id(ph, selector, type); + if (ret) + return ret; + + iter =3D ph->hops->iter_response_init(ph, &ops, 1, PINCTRL_CONFIG_GET, + sizeof(struct scmi_msg_conf_get), + &ipriv); + + if (IS_ERR(iter)) + return PTR_ERR(iter); + + return ph->hops->iter_response_run(iter); +} + +static int +scmi_pinctrl_config_set(const struct scmi_protocol_handle *ph, u32 selecto= r, + enum scmi_pinctrl_selector_type type, + unsigned int nr_configs, + enum scmi_pinctrl_conf_type *config_type, + u32 *config_value) +{ + struct scmi_xfer *t; + struct scmi_msg_conf_set *tx; + u32 attributes; + int ret, i; + unsigned int configs_in_chunk, conf_num =3D 0; + unsigned int chunk; + int max_msg_size =3D ph->hops->get_max_msg_size(ph); + + if (!config_type || !config_value || type =3D=3D FUNCTION_TYPE) + return -EINVAL; + + ret =3D scmi_pinctrl_validate_id(ph, selector, type); + if (ret) + return ret; + + configs_in_chunk =3D (max_msg_size - sizeof(*tx)) / (sizeof(__le32) * 2); + while (conf_num < nr_configs) { + chunk =3D (nr_configs - conf_num > configs_in_chunk) ? + configs_in_chunk : nr_configs - conf_num; + + ret =3D ph->xops->xfer_get_init(ph, PINCTRL_CONFIG_SET, + sizeof(*tx) + + chunk * 2 * sizeof(__le32), + 0, &t); + if (ret) + return ret; + + tx =3D t->tx.buf; + tx->identifier =3D cpu_to_le32(selector); + attributes =3D FIELD_PREP(GENMASK(1, 0), type) | + FIELD_PREP(GENMASK(9, 2), chunk); + tx->attributes =3D cpu_to_le32(attributes); + + for (i =3D 0; i < chunk; i++) { + tx->configs[i * 2] =3D + cpu_to_le32(config_type[conf_num + i]); + tx->configs[i * 2 + 1] =3D + cpu_to_le32(config_value[conf_num + i]); + } + + ret =3D ph->xops->do_xfer(ph, t); + + ph->xops->xfer_put(ph, t); + + if (ret) + break; + + conf_num +=3D chunk; + } + + return ret; +} + +static int scmi_pinctrl_function_select(const struct scmi_protocol_handle = *ph, + u32 identifier, + enum scmi_pinctrl_selector_type type, + u32 function_id) +{ + int ret; + struct scmi_xfer *t; + struct scmi_msg_func_set *tx; + + if (type =3D=3D FUNCTION_TYPE) + return -EINVAL; + + ret =3D scmi_pinctrl_validate_id(ph, identifier, type); + if (ret) + return ret; + + ret =3D ph->xops->xfer_get_init(ph, PINCTRL_FUNCTION_SELECT, sizeof(*tx), + 0, &t); + if (ret) + return ret; + + tx =3D t->tx.buf; + tx->identifier =3D cpu_to_le32(identifier); + tx->function_id =3D cpu_to_le32(function_id); + tx->flags =3D cpu_to_le32(type); + + ret =3D ph->xops->do_xfer(ph, t); + ph->xops->xfer_put(ph, t); + + return ret; +} + +static int scmi_pinctrl_request(const struct scmi_protocol_handle *ph, + u32 identifier, + enum scmi_pinctrl_selector_type type) +{ + int ret; + struct scmi_xfer *t; + struct scmi_msg_request *tx; + + if (type =3D=3D FUNCTION_TYPE) + return -EINVAL; + + ret =3D scmi_pinctrl_validate_id(ph, identifier, type); + if (ret) + return ret; + + ret =3D ph->xops->xfer_get_init(ph, PINCTRL_REQUEST, sizeof(*tx), 0, &t); + + tx =3D t->tx.buf; + tx->identifier =3D cpu_to_le32(identifier); + tx->flags =3D cpu_to_le32(type); + + ret =3D ph->xops->do_xfer(ph, t); + ph->xops->xfer_put(ph, t); + + return ret; +} + +static int scmi_pinctrl_pin_request(const struct scmi_protocol_handle *ph, + u32 pin) +{ + return scmi_pinctrl_request(ph, pin, PIN_TYPE); +} + +static int scmi_pinctrl_free(const struct scmi_protocol_handle *ph, + u32 identifier, + enum scmi_pinctrl_selector_type type) +{ + int ret; + struct scmi_xfer *t; + struct scmi_msg_request *tx; + + if (type =3D=3D FUNCTION_TYPE) + return -EINVAL; + + ret =3D scmi_pinctrl_validate_id(ph, identifier, type); + if (ret) + return ret; + + ret =3D ph->xops->xfer_get_init(ph, PINCTRL_RELEASE, sizeof(*tx), 0, &t); + + tx =3D t->tx.buf; + tx->identifier =3D cpu_to_le32(identifier); + tx->flags =3D cpu_to_le32(type); + + ret =3D ph->xops->do_xfer(ph, t); + ph->xops->xfer_put(ph, t); + + return ret; +} + +static int scmi_pinctrl_pin_free(const struct scmi_protocol_handle *ph, u3= 2 pin) +{ + return scmi_pinctrl_free(ph, pin, PIN_TYPE); +} + +static int scmi_pinctrl_get_group_info(const struct scmi_protocol_handle *= ph, + u32 selector, + struct scmi_group_info *group) +{ + int ret; + + if (!group) + return -EINVAL; + + ret =3D scmi_pinctrl_attributes(ph, GROUP_TYPE, selector, + group->name, + &group->nr_pins); + if (ret) + return ret; + + if (!group->nr_pins) { + dev_err(ph->dev, "Group %d has 0 elements", selector); + return -ENODATA; + } + + group->group_pins =3D kmalloc_array(group->nr_pins, + sizeof(*group->group_pins), + GFP_KERNEL); + if (!group->group_pins) + return -ENOMEM; + + ret =3D scmi_pinctrl_list_associations(ph, selector, GROUP_TYPE, + group->nr_pins, group->group_pins); + if (ret) { + kfree(group->group_pins); + return ret; + } + + group->present =3D true; + return 0; +} + +static int scmi_pinctrl_get_group_name(const struct scmi_protocol_handle *= ph, + u32 selector, const char **name) +{ + struct scmi_pinctrl_info *pi =3D ph->get_priv(ph); + + if (!name) + return -EINVAL; + + if (selector >=3D pi->nr_groups) + return -EINVAL; + + if (!pi->groups[selector].present) { + int ret; + + ret =3D scmi_pinctrl_get_group_info(ph, selector, + &pi->groups[selector]); + if (ret) + return ret; + } + + *name =3D pi->groups[selector].name; + + return 0; +} + +static int scmi_pinctrl_group_pins_get(const struct scmi_protocol_handle *= ph, + u32 selector, const unsigned int **pins, + unsigned int *nr_pins) +{ + struct scmi_pinctrl_info *pi =3D ph->get_priv(ph); + + if (!pins || !nr_pins) + return -EINVAL; + + if (selector >=3D pi->nr_groups) + return -EINVAL; + + if (!pi->groups[selector].present) { + int ret; + + ret =3D scmi_pinctrl_get_group_info(ph, selector, + &pi->groups[selector]); + if (ret) + return ret; + } + + *pins =3D pi->groups[selector].group_pins; + *nr_pins =3D pi->groups[selector].nr_pins; + + return 0; +} + +static int scmi_pinctrl_get_function_info(const struct scmi_protocol_handl= e *ph, + u32 selector, + struct scmi_function_info *func) +{ + int ret; + + if (!func) + return -EINVAL; + + ret =3D scmi_pinctrl_attributes(ph, FUNCTION_TYPE, selector, + func->name, + &func->nr_groups); + if (ret) + return ret; + + if (!func->nr_groups) { + dev_err(ph->dev, "Function %d has 0 elements", selector); + return -ENODATA; + } + + func->groups =3D kmalloc_array(func->nr_groups, sizeof(*func->groups), + GFP_KERNEL); + if (!func->groups) + return -ENOMEM; + + ret =3D scmi_pinctrl_list_associations(ph, selector, FUNCTION_TYPE, + func->nr_groups, func->groups); + if (ret) { + kfree(func->groups); + return ret; + } + + func->present =3D true; + return 0; +} + +static int scmi_pinctrl_get_function_name(const struct scmi_protocol_handl= e *ph, + u32 selector, const char **name) +{ + struct scmi_pinctrl_info *pi =3D ph->get_priv(ph); + + if (!name) + return -EINVAL; + + if (selector >=3D pi->nr_functions) + return -EINVAL; + + if (!pi->functions[selector].present) { + int ret; + + ret =3D scmi_pinctrl_get_function_info(ph, selector, + &pi->functions[selector]); + if (ret) + return ret; + } + + *name =3D pi->functions[selector].name; + return 0; +} + +static int +scmi_pinctrl_function_groups_get(const struct scmi_protocol_handle *ph, + u32 selector, unsigned int *nr_groups, + const unsigned int **groups) +{ + struct scmi_pinctrl_info *pi =3D ph->get_priv(ph); + + if (!groups || !nr_groups) + return -EINVAL; + + if (selector >=3D pi->nr_functions) + return -EINVAL; + + if (!pi->functions[selector].present) { + int ret; + + ret =3D scmi_pinctrl_get_function_info(ph, selector, + &pi->functions[selector]); + if (ret) + return ret; + } + + *groups =3D pi->functions[selector].groups; + *nr_groups =3D pi->functions[selector].nr_groups; + + return 0; +} + +static int scmi_pinctrl_mux_set(const struct scmi_protocol_handle *ph, + u32 selector, u32 group) +{ + return scmi_pinctrl_function_select(ph, group, GROUP_TYPE, + selector); +} + +static int scmi_pinctrl_get_pin_info(const struct scmi_protocol_handle *ph, + u32 selector, struct scmi_pin_info *pin) +{ + int ret; + + if (!pin) + return -EINVAL; + + ret =3D scmi_pinctrl_attributes(ph, PIN_TYPE, selector, + pin->name, NULL); + if (ret) + return ret; + + pin->present =3D true; + return 0; +} + +static int scmi_pinctrl_get_pin_name(const struct scmi_protocol_handle *ph, + u32 selector, const char **name) +{ + struct scmi_pinctrl_info *pi =3D ph->get_priv(ph); + + if (!name) + return -EINVAL; + + if (selector >=3D pi->nr_pins) + return -EINVAL; + + if (!pi->pins[selector].present) { + int ret; + + ret =3D scmi_pinctrl_get_pin_info(ph, selector, + &pi->pins[selector]); + if (ret) + return ret; + } + + *name =3D pi->pins[selector].name; + + return 0; +} + +static int scmi_pinctrl_name_get(const struct scmi_protocol_handle *ph, + u32 selector, + enum scmi_pinctrl_selector_type type, + const char **name) +{ + switch (type) { + case PIN_TYPE: + return scmi_pinctrl_get_pin_name(ph, selector, name); + case GROUP_TYPE: + return scmi_pinctrl_get_group_name(ph, selector, name); + case FUNCTION_TYPE: + return scmi_pinctrl_get_function_name(ph, selector, name); + default: + return -EINVAL; + } +} + +static const struct scmi_pinctrl_proto_ops pinctrl_proto_ops =3D { + .count_get =3D scmi_pinctrl_count_get, + .name_get =3D scmi_pinctrl_name_get, + .group_pins_get =3D scmi_pinctrl_group_pins_get, + .function_groups_get =3D scmi_pinctrl_function_groups_get, + .mux_set =3D scmi_pinctrl_mux_set, + .config_get =3D scmi_pinctrl_config_get, + .config_set =3D scmi_pinctrl_config_set, + .pin_request =3D scmi_pinctrl_pin_request, + .pin_free =3D scmi_pinctrl_pin_free, +}; + +static int scmi_pinctrl_protocol_init(const struct scmi_protocol_handle *p= h) +{ + int ret; + u32 version; + struct scmi_pinctrl_info *pinfo; + + ret =3D ph->xops->version_get(ph, &version); + if (ret) + return ret; + + dev_dbg(ph->dev, "Pinctrl Version %d.%d\n", + PROTOCOL_REV_MAJOR(version), PROTOCOL_REV_MINOR(version)); + + pinfo =3D devm_kzalloc(ph->dev, sizeof(*pinfo), GFP_KERNEL); + if (!pinfo) + return -ENOMEM; + + ret =3D scmi_pinctrl_attributes_get(ph, pinfo); + if (ret) + return ret; + + pinfo->pins =3D devm_kcalloc(ph->dev, pinfo->nr_pins, + sizeof(*pinfo->pins), + GFP_KERNEL); + if (!pinfo->pins) + return -ENOMEM; + + pinfo->groups =3D devm_kcalloc(ph->dev, pinfo->nr_groups, + sizeof(*pinfo->groups), + GFP_KERNEL); + if (!pinfo->groups) + return -ENOMEM; + + pinfo->functions =3D devm_kcalloc(ph->dev, pinfo->nr_functions, + sizeof(*pinfo->functions), + GFP_KERNEL); + if (!pinfo->functions) + return -ENOMEM; + + pinfo->version =3D version; + + return ph->set_priv(ph, pinfo, version); +} + +static int scmi_pinctrl_protocol_deinit(const struct scmi_protocol_handle = *ph) +{ + int i; + struct scmi_pinctrl_info *pi =3D ph->get_priv(ph); + + for (i =3D 0; i < pi->nr_groups; i++) { + if (pi->groups[i].present) { + kfree(pi->groups[i].group_pins); + pi->groups[i].present =3D false; + } + } + + for (i =3D 0; i < pi->nr_functions; i++) { + if (pi->functions[i].present) { + kfree(pi->functions[i].groups); + pi->functions[i].present =3D false; + } + } + + return 0; +} + +static const struct scmi_protocol scmi_pinctrl =3D { + .id =3D SCMI_PROTOCOL_PINCTRL, + .owner =3D THIS_MODULE, + .instance_init =3D &scmi_pinctrl_protocol_init, + .instance_deinit =3D &scmi_pinctrl_protocol_deinit, + .ops =3D &pinctrl_proto_ops, + .supported_version =3D SCMI_PROTOCOL_SUPPORTED_VERSION, +}; + +DEFINE_SCMI_PROTOCOL_REGISTER_UNREGISTER(pinctrl, scmi_pinctrl) diff --git a/drivers/firmware/arm_scmi/protocols.h b/drivers/firmware/arm_s= cmi/protocols.h index 9c8edb1aa901..f1cde7752187 100644 --- a/drivers/firmware/arm_scmi/protocols.h +++ b/drivers/firmware/arm_scmi/protocols.h @@ -353,6 +353,7 @@ void __exit scmi_##name##_unregister(void) \ DECLARE_SCMI_REGISTER_UNREGISTER(base); DECLARE_SCMI_REGISTER_UNREGISTER(clock); DECLARE_SCMI_REGISTER_UNREGISTER(perf); +DECLARE_SCMI_REGISTER_UNREGISTER(pinctrl); DECLARE_SCMI_REGISTER_UNREGISTER(power); DECLARE_SCMI_REGISTER_UNREGISTER(reset); DECLARE_SCMI_REGISTER_UNREGISTER(sensors); diff --git a/include/linux/scmi_protocol.h b/include/linux/scmi_protocol.h index 2ee94ff0320c..3fcc3ad15263 100644 --- a/include/linux/scmi_protocol.h +++ b/include/linux/scmi_protocol.h @@ -729,6 +729,80 @@ struct scmi_powercap_proto_ops { u32 *power_thresh_high); }; =20 +enum scmi_pinctrl_selector_type { + PIN_TYPE =3D 0, + GROUP_TYPE, + FUNCTION_TYPE, +}; + +enum scmi_pinctrl_conf_type { + SCMI_PIN_NONE =3D 0x0, + SCMI_PIN_BIAS_BUS_HOLD =3D 0x1, + SCMI_PIN_BIAS_DISABLE =3D 0x2, + SCMI_PIN_BIAS_HIGH_IMPEDANCE =3D 0x3, + SCMI_PIN_BIAS_PULL_UP =3D 0x4, + SCMI_PIN_BIAS_PULL_DEFAULT =3D 0x5, + SCMI_PIN_BIAS_PULL_DOWN =3D 0x6, + SCMI_PIN_DRIVE_OPEN_DRAIN =3D 0x7, + SCMI_PIN_DRIVE_OPEN_SOURCE =3D 0x8, + SCMI_PIN_DRIVE_PUSH_PULL =3D 0x9, + SCMI_PIN_DRIVE_STRENGTH =3D 0xA, + SCMI_PIN_INPUT_DEBOUNCE =3D 0xB, + SCMI_PIN_INPUT_MODE =3D 0xC, + SCMI_PIN_PULL_MODE =3D 0xD, + SCMI_PIN_INPUT_VALUE =3D 0xE, + SCMI_PIN_INPUT_SCHMITT =3D 0xF, + SCMI_PIN_LOW_POWER_MODE =3D 0x10, + SCMI_PIN_OUTPUT_MODE =3D 0x11, + SCMI_PIN_OUTPUT_VALUE =3D 0x12, + SCMI_PIN_POWER_SOURCE =3D 0x13, + SCMI_PIN_SLEW_RATE =3D 0x20, + SCMI_PIN_OEM_START =3D 0xC0, + SCMI_PIN_OEM_END =3D 0xFF, +}; + +/** + * struct scmi_pinctrl_proto_ops - represents the various operations provi= ded + * by SCMI Pinctrl Protocol + * + * @count_get: returns count of the registered elements in given type + * @name_get: returns name by index of given type + * @group_pins_get: returns the set of pins, assigned to the specified gro= up + * @function_groups_get: returns the set of groups, assigned to the specif= ied + * function + * @mux_set: set muxing function for groups of pins + * @config_get: returns configuration parameter for pin or group + * @config_set: sets the configuration parameter for pin or group + * @pin_request: aquire pin before selecting mux setting + * @pin_free: frees pin, acquired by request_pin call + */ +struct scmi_pinctrl_proto_ops { + int (*count_get)(const struct scmi_protocol_handle *ph, + enum scmi_pinctrl_selector_type type); + int (*name_get)(const struct scmi_protocol_handle *ph, u32 selector, + enum scmi_pinctrl_selector_type type, + const char **name); + int (*group_pins_get)(const struct scmi_protocol_handle *ph, + u32 selector, const unsigned int **pins, + unsigned int *nr_pins); + int (*function_groups_get)(const struct scmi_protocol_handle *ph, + u32 selector, unsigned int *nr_groups, + const unsigned int **groups); + int (*mux_set)(const struct scmi_protocol_handle *ph, u32 selector, + u32 group); + int (*config_get)(const struct scmi_protocol_handle *ph, u32 selector, + enum scmi_pinctrl_selector_type type, + enum scmi_pinctrl_conf_type config_type, + u32 *config_value); + int (*config_set)(const struct scmi_protocol_handle *ph, u32 selector, + enum scmi_pinctrl_selector_type type, + unsigned int nr_configs, + enum scmi_pinctrl_conf_type *config_type, + u32 *config_value); + int (*pin_request)(const struct scmi_protocol_handle *ph, u32 pin); + int (*pin_free)(const struct scmi_protocol_handle *ph, u32 pin); +}; + /** * struct scmi_notify_ops - represents notifications' operations provided= by * SCMI core @@ -836,6 +910,7 @@ enum scmi_std_protocol { SCMI_PROTOCOL_RESET =3D 0x16, SCMI_PROTOCOL_VOLTAGE =3D 0x17, SCMI_PROTOCOL_POWERCAP =3D 0x18, + SCMI_PROTOCOL_PINCTRL =3D 0x19, }; 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Reviewed-by: Cristian Marussi Tested-by: Cristian Marussi Reviewed-by: Linus Walleij Co-developed-by: Oleksii Moisieiev Signed-off-by: Oleksii Moisieiev Signed-off-by: Peng Fan --- MAINTAINERS | 1 + drivers/pinctrl/Kconfig | 11 + drivers/pinctrl/Makefile | 1 + drivers/pinctrl/pinctrl-scmi.c | 593 +++++++++++++++++++++++++++++++++++++= ++++ 4 files changed, 606 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index c042ca394893..851216ba59b0 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -21447,6 +21447,7 @@ F: drivers/clk/clk-sc[mp]i.c F: drivers/cpufreq/sc[mp]i-cpufreq.c F: drivers/firmware/arm_scmi/ F: drivers/firmware/arm_scpi.c +F: drivers/pinctrl/pinctrl-scmi.c F: drivers/pmdomain/arm/ F: drivers/powercap/arm_scmi_powercap.c F: drivers/regulator/scmi-regulator.c diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 8163a5983166..27b26e428f60 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -432,6 +432,17 @@ config PINCTRL_ROCKCHIP help This support pinctrl and GPIO driver for Rockchip SoCs. =20 +config PINCTRL_SCMI + tristate "Pinctrl driver using SCMI protocol interface" + depends on ARM_SCMI_PROTOCOL || COMPILE_TEST + select PINMUX + select GENERIC_PINCONF + help + This driver provides support for pinctrl which is controlled + by firmware that implements the SCMI interface. + It uses SCMI Message Protocol to interact with the + firmware providing all the pinctrl controls. + config PINCTRL_SINGLE tristate "One-register-per-pin type device tree based pinctrl driver" depends on OF diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile index 1071f301cc70..ba755ed2d46c 100644 --- a/drivers/pinctrl/Makefile +++ b/drivers/pinctrl/Makefile @@ -44,6 +44,7 @@ obj-$(CONFIG_PINCTRL_PIC32) +=3D pinctrl-pic32.o obj-$(CONFIG_PINCTRL_PISTACHIO) +=3D pinctrl-pistachio.o obj-$(CONFIG_PINCTRL_RK805) +=3D pinctrl-rk805.o obj-$(CONFIG_PINCTRL_ROCKCHIP) +=3D pinctrl-rockchip.o +obj-$(CONFIG_PINCTRL_SCMI) +=3D pinctrl-scmi.o obj-$(CONFIG_PINCTRL_SINGLE) +=3D pinctrl-single.o obj-$(CONFIG_PINCTRL_ST) +=3D pinctrl-st.o obj-$(CONFIG_PINCTRL_STMFX) +=3D pinctrl-stmfx.o diff --git a/drivers/pinctrl/pinctrl-scmi.c b/drivers/pinctrl/pinctrl-scmi.c new file mode 100644 index 000000000000..f2fef3fb85ae --- /dev/null +++ b/drivers/pinctrl/pinctrl-scmi.c @@ -0,0 +1,593 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * System Control and Power Interface (SCMI) Protocol based pinctrl driver + * + * Copyright (C) 2024 EPAM + * Copyright 2024 NXP + */ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "pinctrl-utils.h" +#include "core.h" +#include "pinconf.h" + +#define DRV_NAME "scmi-pinctrl" + +/* Define num configs, if not large than 4 use stack, else use kcalloc */ +#define SCMI_NUM_CONFIGS 4 + +static const struct scmi_pinctrl_proto_ops *pinctrl_ops; + +struct scmi_pinctrl_funcs { + unsigned int num_groups; + const char **groups; +}; + +struct scmi_pinctrl { + struct device *dev; + struct scmi_protocol_handle *ph; + struct pinctrl_dev *pctldev; + struct pinctrl_desc pctl_desc; + struct scmi_pinctrl_funcs *functions; + unsigned int nr_functions; + char **groups; + unsigned int nr_groups; + struct pinctrl_pin_desc *pins; + unsigned int nr_pins; +}; + +static int pinctrl_scmi_get_groups_count(struct pinctrl_dev *pctldev) +{ + struct scmi_pinctrl *pmx =3D pinctrl_dev_get_drvdata(pctldev); + + return pinctrl_ops->count_get(pmx->ph, GROUP_TYPE); +} + +static const char *pinctrl_scmi_get_group_name(struct pinctrl_dev *pctldev, + unsigned int selector) +{ + int ret; + const char *name; + struct scmi_pinctrl *pmx =3D pinctrl_dev_get_drvdata(pctldev); + + ret =3D pinctrl_ops->name_get(pmx->ph, selector, GROUP_TYPE, &name); + if (ret) { + dev_err(pmx->dev, "get name failed with err %d", ret); + return NULL; + } + + return name; +} + +static int pinctrl_scmi_get_group_pins(struct pinctrl_dev *pctldev, + unsigned int selector, + const unsigned int **pins, + unsigned int *num_pins) +{ + struct scmi_pinctrl *pmx =3D pinctrl_dev_get_drvdata(pctldev); + + return pinctrl_ops->group_pins_get(pmx->ph, selector, pins, num_pins); +} + +static const struct pinctrl_ops pinctrl_scmi_pinctrl_ops =3D { + .get_groups_count =3D pinctrl_scmi_get_groups_count, + .get_group_name =3D pinctrl_scmi_get_group_name, + .get_group_pins =3D pinctrl_scmi_get_group_pins, +#ifdef CONFIG_OF + .dt_node_to_map =3D pinconf_generic_dt_node_to_map_all, + .dt_free_map =3D pinconf_generic_dt_free_map, +#endif +}; + +static int pinctrl_scmi_get_functions_count(struct pinctrl_dev *pctldev) +{ + struct scmi_pinctrl *pmx =3D pinctrl_dev_get_drvdata(pctldev); + + return pinctrl_ops->count_get(pmx->ph, FUNCTION_TYPE); +} + +static const char *pinctrl_scmi_get_function_name(struct pinctrl_dev *pctl= dev, + unsigned int selector) +{ + int ret; + const char *name; + struct scmi_pinctrl *pmx =3D pinctrl_dev_get_drvdata(pctldev); + + ret =3D pinctrl_ops->name_get(pmx->ph, selector, FUNCTION_TYPE, &name); + if (ret) { + dev_err(pmx->dev, "get name failed with err %d", ret); + return NULL; + } + + return name; +} + +static int pinctrl_scmi_get_function_groups(struct pinctrl_dev *pctldev, + unsigned int selector, + const char * const **groups, + unsigned int * const num_groups) +{ + const unsigned int *group_ids; + int ret, i; + struct scmi_pinctrl *pmx =3D pinctrl_dev_get_drvdata(pctldev); + + if (!groups || !num_groups) + return -EINVAL; + + if (selector < pmx->nr_functions && + pmx->functions[selector].num_groups) { + *groups =3D (const char * const *)pmx->functions[selector].groups; + *num_groups =3D pmx->functions[selector].num_groups; + return 0; + } + + ret =3D pinctrl_ops->function_groups_get(pmx->ph, selector, + &pmx->functions[selector].num_groups, + &group_ids); + if (ret) { + dev_err(pmx->dev, "Unable to get function groups, err %d", ret); + return ret; + } + + *num_groups =3D pmx->functions[selector].num_groups; + if (!*num_groups) + return -EINVAL; + + pmx->functions[selector].groups =3D + devm_kcalloc(pmx->dev, *num_groups, + sizeof(*pmx->functions[selector].groups), + GFP_KERNEL); + if (!pmx->functions[selector].groups) + return -ENOMEM; + + for (i =3D 0; i < *num_groups; i++) { + pmx->functions[selector].groups[i] =3D + pinctrl_scmi_get_group_name(pmx->pctldev, + group_ids[i]); + if (!pmx->functions[selector].groups[i]) { + ret =3D -ENOMEM; + goto err_free; + } + } + + *groups =3D (const char * const *)pmx->functions[selector].groups; + + return 0; + +err_free: + devm_kfree(pmx->dev, pmx->functions[selector].groups); + + return ret; +} + +static int pinctrl_scmi_func_set_mux(struct pinctrl_dev *pctldev, + unsigned int selector, unsigned int group) +{ + struct scmi_pinctrl *pmx =3D pinctrl_dev_get_drvdata(pctldev); + + return pinctrl_ops->mux_set(pmx->ph, selector, group); +} + +static int pinctrl_scmi_request(struct pinctrl_dev *pctldev, + unsigned int offset) +{ + struct scmi_pinctrl *pmx =3D pinctrl_dev_get_drvdata(pctldev); + + return pinctrl_ops->pin_request(pmx->ph, offset); +} + +static int pinctrl_scmi_free(struct pinctrl_dev *pctldev, unsigned int off= set) +{ + struct scmi_pinctrl *pmx =3D pinctrl_dev_get_drvdata(pctldev); + + return pinctrl_ops->pin_free(pmx->ph, offset); +} + +static const struct pinmux_ops pinctrl_scmi_pinmux_ops =3D { + .request =3D pinctrl_scmi_request, + .free =3D pinctrl_scmi_free, + .get_functions_count =3D pinctrl_scmi_get_functions_count, + .get_function_name =3D pinctrl_scmi_get_function_name, + .get_function_groups =3D pinctrl_scmi_get_function_groups, + .set_mux =3D pinctrl_scmi_func_set_mux, +}; + +static int pinctrl_scmi_map_pinconf_type(enum pin_config_param param, + enum scmi_pinctrl_conf_type *type) +{ + u32 arg =3D param; + + switch (arg) { + case PIN_CONFIG_BIAS_BUS_HOLD: + *type =3D SCMI_PIN_BIAS_BUS_HOLD; + break; + case PIN_CONFIG_BIAS_DISABLE: + *type =3D SCMI_PIN_BIAS_DISABLE; + break; + case PIN_CONFIG_BIAS_HIGH_IMPEDANCE: + *type =3D SCMI_PIN_BIAS_HIGH_IMPEDANCE; + break; + case PIN_CONFIG_BIAS_PULL_DOWN: + *type =3D SCMI_PIN_BIAS_PULL_DOWN; + break; + case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT: + *type =3D SCMI_PIN_BIAS_PULL_DEFAULT; + break; + case PIN_CONFIG_BIAS_PULL_UP: + *type =3D SCMI_PIN_BIAS_PULL_UP; + break; + case PIN_CONFIG_DRIVE_OPEN_DRAIN: + *type =3D SCMI_PIN_DRIVE_OPEN_DRAIN; + break; + case PIN_CONFIG_DRIVE_OPEN_SOURCE: + *type =3D SCMI_PIN_DRIVE_OPEN_SOURCE; + break; + case PIN_CONFIG_DRIVE_PUSH_PULL: + *type =3D SCMI_PIN_DRIVE_PUSH_PULL; + break; + case PIN_CONFIG_DRIVE_STRENGTH: + *type =3D SCMI_PIN_DRIVE_STRENGTH; + break; + case PIN_CONFIG_DRIVE_STRENGTH_UA: + *type =3D SCMI_PIN_DRIVE_STRENGTH; + break; + case PIN_CONFIG_INPUT_DEBOUNCE: + *type =3D SCMI_PIN_INPUT_DEBOUNCE; + break; + case PIN_CONFIG_INPUT_ENABLE: + *type =3D SCMI_PIN_INPUT_MODE; + break; + case PIN_CONFIG_INPUT_SCHMITT: + *type =3D SCMI_PIN_INPUT_SCHMITT; + break; + case PIN_CONFIG_INPUT_SCHMITT_ENABLE: + *type =3D SCMI_PIN_INPUT_MODE; + break; + case PIN_CONFIG_MODE_LOW_POWER: + *type =3D SCMI_PIN_LOW_POWER_MODE; + break; + case PIN_CONFIG_OUTPUT: + *type =3D SCMI_PIN_OUTPUT_VALUE; + break; + case PIN_CONFIG_OUTPUT_ENABLE: + *type =3D SCMI_PIN_OUTPUT_MODE; + break; + case PIN_CONFIG_OUTPUT_IMPEDANCE_OHMS: + *type =3D SCMI_PIN_OUTPUT_VALUE; + break; + case PIN_CONFIG_POWER_SOURCE: + *type =3D SCMI_PIN_POWER_SOURCE; + break; + case PIN_CONFIG_SLEW_RATE: + *type =3D SCMI_PIN_SLEW_RATE; + break; + case SCMI_PIN_OEM_START ... SCMI_PIN_OEM_END: + *type =3D arg; + break; + default: + return -EOPNOTSUPP; + } + + return 0; +} + +static int pinctrl_scmi_pinconf_get(struct pinctrl_dev *pctldev, + unsigned int _pin, unsigned long *config) +{ + int ret; + struct scmi_pinctrl *pmx =3D pinctrl_dev_get_drvdata(pctldev); + enum pin_config_param config_type; + enum scmi_pinctrl_conf_type type; + u32 config_value; + + if (!config) + return -EINVAL; + + config_type =3D pinconf_to_config_param(*config); + + ret =3D pinctrl_scmi_map_pinconf_type(config_type, &type); + if (ret) { + dev_err(pmx->dev, "Error map pinconf_type %d\n", ret); + return ret; + } + + ret =3D pinctrl_ops->config_get(pmx->ph, _pin, PIN_TYPE, type, + &config_value); + if (ret) + return ret; + + *config =3D pinconf_to_config_packed(config_type, config_value); + + return 0; +} + +static int +pinctrl_scmi_alloc_configs(struct pinctrl_dev *pctldev, u32 num_configs, + u32 **p_config_value, + enum scmi_pinctrl_conf_type **p_config_type) +{ + if (num_configs <=3D SCMI_NUM_CONFIGS) + return 0; + + *p_config_value =3D kcalloc(num_configs, sizeof(u32), GFP_KERNEL); + *p_config_type =3D kcalloc(num_configs, + sizeof(enum scmi_pinctrl_conf_type), + GFP_KERNEL); + + if (!*p_config_value || !*p_config_type) { + kfree(*p_config_value); + kfree(*p_config_type); + return -ENOMEM; + } + + return 0; +} + +static void +pinctrl_scmi_free_configs(struct pinctrl_dev *pctldev, u32 num_configs, + u32 **p_config_value, + enum scmi_pinctrl_conf_type **p_config_type) +{ + if (num_configs <=3D SCMI_NUM_CONFIGS) + return; + + kfree(*p_config_value); + kfree(*p_config_type); +} + +static int pinctrl_scmi_pinconf_set(struct pinctrl_dev *pctldev, + unsigned int _pin, + unsigned long *configs, + unsigned int num_configs) +{ + int i, ret; + struct scmi_pinctrl *pmx =3D pinctrl_dev_get_drvdata(pctldev); + enum scmi_pinctrl_conf_type config_type[SCMI_NUM_CONFIGS]; + u32 config_value[SCMI_NUM_CONFIGS]; + enum scmi_pinctrl_conf_type *p_config_type =3D config_type; + u32 *p_config_value =3D config_value; + enum pin_config_param param; + + if (!configs || !num_configs) + return -EINVAL; + + ret =3D pinctrl_scmi_alloc_configs(pctldev, num_configs, &p_config_type, + &p_config_value); + if (ret) + return ret; + + for (i =3D 0; i < num_configs; i++) { + param =3D pinconf_to_config_param(configs[i]); + ret =3D pinctrl_scmi_map_pinconf_type(param, &p_config_type[i]); + if (ret) { + dev_err(pmx->dev, "Error map pinconf_type %d\n", ret); + goto free_config; + } + p_config_value[i] =3D pinconf_to_config_argument(configs[i]); + } + + ret =3D pinctrl_ops->config_set(pmx->ph, _pin, PIN_TYPE, num_configs, + p_config_type, p_config_value); + if (ret) + dev_err(pmx->dev, "Error parsing config %d\n", ret); + +free_config: + pinctrl_scmi_free_configs(pctldev, num_configs, &p_config_type, + &p_config_value); + return ret; +} + +static int pinctrl_scmi_pinconf_group_set(struct pinctrl_dev *pctldev, + unsigned int group, + unsigned long *configs, + unsigned int num_configs) +{ + int i, ret; + struct scmi_pinctrl *pmx =3D pinctrl_dev_get_drvdata(pctldev); + enum scmi_pinctrl_conf_type config_type[SCMI_NUM_CONFIGS]; + u32 config_value[SCMI_NUM_CONFIGS]; + enum scmi_pinctrl_conf_type *p_config_type =3D config_type; + u32 *p_config_value =3D config_value; + enum pin_config_param param; + + if (!configs || !num_configs) + return -EINVAL; + + ret =3D pinctrl_scmi_alloc_configs(pctldev, num_configs, &p_config_type, + &p_config_value); + if (ret) + return ret; + + for (i =3D 0; i < num_configs; i++) { + param =3D pinconf_to_config_param(configs[i]); + ret =3D pinctrl_scmi_map_pinconf_type(param, + &p_config_type[i]); + if (ret) { + dev_err(pmx->dev, "Error map pinconf_type %d\n", ret); + goto free_config; + } + + p_config_value[i] =3D pinconf_to_config_argument(configs[i]); + } + + ret =3D pinctrl_ops->config_set(pmx->ph, group, GROUP_TYPE, num_configs, + p_config_type, p_config_value); + if (ret) + dev_err(pmx->dev, "Error parsing config %d", ret); + +free_config: + pinctrl_scmi_free_configs(pctldev, num_configs, &p_config_type, + &p_config_value); + return ret; +}; + +static int pinctrl_scmi_pinconf_group_get(struct pinctrl_dev *pctldev, + unsigned int group, + unsigned long *config) +{ + int ret; + struct scmi_pinctrl *pmx =3D pinctrl_dev_get_drvdata(pctldev); + enum pin_config_param config_type; + enum scmi_pinctrl_conf_type type; + u32 config_value; + + if (!config) + return -EINVAL; + + config_type =3D pinconf_to_config_param(*config); + ret =3D pinctrl_scmi_map_pinconf_type(config_type, &type); + if (ret) { + dev_err(pmx->dev, "Error map pinconf_type %d\n", ret); + return ret; + } + + ret =3D pinctrl_ops->config_get(pmx->ph, group, GROUP_TYPE, type, + &config_value); + if (ret) + return ret; + + *config =3D pinconf_to_config_packed(config_type, config_value); + + return 0; +} + +static const struct pinconf_ops pinctrl_scmi_pinconf_ops =3D { + .is_generic =3D true, + .pin_config_get =3D pinctrl_scmi_pinconf_get, + .pin_config_set =3D pinctrl_scmi_pinconf_set, + .pin_config_group_set =3D pinctrl_scmi_pinconf_group_set, + .pin_config_group_get =3D pinctrl_scmi_pinconf_group_get, + .pin_config_config_dbg_show =3D pinconf_generic_dump_config, +}; + +static int pinctrl_scmi_get_pins(struct scmi_pinctrl *pmx, + unsigned int *nr_pins, + const struct pinctrl_pin_desc **pins) +{ + int ret, i; + + if (!pins || !nr_pins) + return -EINVAL; + + if (pmx->nr_pins) { + *pins =3D pmx->pins; + *nr_pins =3D pmx->nr_pins; + return 0; + } + + *nr_pins =3D pinctrl_ops->count_get(pmx->ph, PIN_TYPE); + + pmx->nr_pins =3D *nr_pins; + pmx->pins =3D devm_kmalloc_array(pmx->dev, *nr_pins, sizeof(*pmx->pins), + GFP_KERNEL); + if (!pmx->pins) + return -ENOMEM; + + for (i =3D 0; i < *nr_pins; i++) { + pmx->pins[i].number =3D i; + ret =3D pinctrl_ops->name_get(pmx->ph, i, PIN_TYPE, + &pmx->pins[i].name); + if (ret) { + dev_err(pmx->dev, "Can't get name for pin %d: rc %d", i, ret); + pmx->nr_pins =3D 0; + return ret; + } + } + + *pins =3D pmx->pins; + dev_dbg(pmx->dev, "got pins %d", *nr_pins); + + return 0; +} + +static const struct scmi_device_id scmi_id_table[] =3D { + { SCMI_PROTOCOL_PINCTRL, "pinctrl" }, + { } +}; +MODULE_DEVICE_TABLE(scmi, scmi_id_table); + +static int scmi_pinctrl_probe(struct scmi_device *sdev) +{ + int ret; + struct device *dev =3D &sdev->dev; + struct scmi_pinctrl *pmx; + const struct scmi_handle *handle; + struct scmi_protocol_handle *ph; + + if (!sdev || !sdev->handle) + return -EINVAL; + + handle =3D sdev->handle; + + pinctrl_ops =3D handle->devm_protocol_get(sdev, SCMI_PROTOCOL_PINCTRL, + &ph); + if (IS_ERR(pinctrl_ops)) + return PTR_ERR(pinctrl_ops); + + pmx =3D devm_kzalloc(dev, sizeof(*pmx), GFP_KERNEL); + if (!pmx) + return -ENOMEM; + + pmx->ph =3D ph; + + pmx->dev =3D dev; + pmx->pctl_desc.name =3D DRV_NAME; + pmx->pctl_desc.owner =3D THIS_MODULE; + pmx->pctl_desc.pctlops =3D &pinctrl_scmi_pinctrl_ops; + pmx->pctl_desc.pmxops =3D &pinctrl_scmi_pinmux_ops; + pmx->pctl_desc.confops =3D &pinctrl_scmi_pinconf_ops; + + ret =3D pinctrl_scmi_get_pins(pmx, &pmx->pctl_desc.npins, + &pmx->pctl_desc.pins); + if (ret) + return ret; + + ret =3D devm_pinctrl_register_and_init(dev, &pmx->pctl_desc, pmx, + &pmx->pctldev); + if (ret) + return dev_err_probe(dev, ret, "Failed to register pinctrl\n"); + + pmx->nr_functions =3D pinctrl_scmi_get_functions_count(pmx->pctldev); + pmx->nr_groups =3D pinctrl_scmi_get_groups_count(pmx->pctldev); + + if (pmx->nr_functions) { + pmx->functions =3D devm_kcalloc(dev, pmx->nr_functions, + sizeof(*pmx->functions), + GFP_KERNEL); + if (!pmx->functions) + return -ENOMEM; + } + + if (pmx->nr_groups) { + pmx->groups =3D devm_kcalloc(dev, pmx->nr_groups, + sizeof(*pmx->groups), GFP_KERNEL); + if (!pmx->groups) + return -ENOMEM; + } + + return pinctrl_enable(pmx->pctldev); +} + +static struct scmi_driver scmi_pinctrl_driver =3D { + .name =3D DRV_NAME, + .probe =3D scmi_pinctrl_probe, + .id_table =3D scmi_id_table, +}; +module_scmi_driver(scmi_pinctrl_driver); + +MODULE_AUTHOR("Oleksii Moisieiev "); +MODULE_AUTHOR("Peng Fan "); +MODULE_DESCRIPTION("ARM SCMI pin controller driver"); +MODULE_LICENSE("GPL"); --=20 2.37.1