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It provides a parallel digital RGB (red, green, blue) and signals for horizontal, vertical synchronization, pixel clock and data enable as output to interface directly to a variety of LCD-TFT panels. Main features * 2 input layers blended together to compose the display * Cropping of layers from any input size and location * Multiple input pixel formats: =E2=80=93 Predefined ARGB, with 7 formats: ARGB8888, ABGR8888, RGBA8888, BGRA8888, RGB565, BGR565, RGB888packed. =E2=80=93 Flexible ARGB, allowing any width and location for A,R,G,B components. =E2=80=93 Predefined YUV, with 3 formats: YUV422-1L (FourCC: YUYV, Interleaved), YUV420-2L (FourCC: NV12, semi planar), YUV420-3L (FourCC: Yxx, full planar) with some flexibility on the sequence of the component. * Color look-up table (CLUT) up to 256 colors (256x24 bits) per layer * Color transparency keying * Composition with flexible window position and size versus output display * Blending with flexible layer order and alpha value (per pixel or constant) * Background underlying color * Gamma with non-linear configurable table * Dithering for output with less bits per component (pseudo-random on 2 bits) * Polarity inversion for HSync, VSync, and DataEnable outputs * Output as RGB888 24 bpp or YUV422 16 bpp * Secure layer (using Layer2) capability, with grouped regs and additional interrupt set * Interrupts based on 7 different events * AXI master interface with long efficient bursts (64 or 128 bytes) Signed-off-by: Raphael Gallais-Pou Signed-off-by: Yannick Fertre --- arch/arm/boot/dts/st/stm32mp135.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32mp135.dtsi b/arch/arm/boot/dts/st/st= m32mp135.dtsi index 68d32f9f5314..834a4d545fe4 100644 --- a/arch/arm/boot/dts/st/stm32mp135.dtsi +++ b/arch/arm/boot/dts/st/stm32mp135.dtsi @@ -19,5 +19,16 @@ dcmipp: dcmipp@5a000000 { port { }; }; + + ltdc: display-controller@5a001000 { + compatible =3D "st,stm32-ltdc"; + reg =3D <0x5a001000 0x400>; + interrupts =3D , + ; + clocks =3D <&rcc LTDC_PX>; + clock-names =3D "lcd"; + resets =3D <&scmi_reset RST_SCMI_LTDC>; + status =3D "disabled"; + }; }; }; --=20 2.25.1 From nobody Mon Dec 15 17:59:19 2025 Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 88C617E780; Fri, 23 Feb 2024 12:39:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.132.182.106 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708691946; cv=none; b=eWhqzcgiTgLBK1TmL1ijxXVHoEe8LOedBmYSUJuYTV0ZgOhK7Sofn/qf/fCsDAl7gz34wPu07mU4Iwpecp5qJ68HF3uLz/AktGFPLG8oMassfEjtZ9x69PNwmcQLDwULa5WbNrIq7VMqbCBS8rlYR3Z7meupZ96FTr3GB4qfpbY= ARC-Message-Signature: i=1; a=rsa-sha256; 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Fri, 23 Feb 2024 13:38:05 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 9AD4B28DDC0; Fri, 23 Feb 2024 13:36:54 +0100 (CET) Received: from localhost (10.129.178.151) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Fri, 23 Feb 2024 13:36:53 +0100 From: Raphael Gallais-Pou Date: Fri, 23 Feb 2024 13:36:49 +0100 Subject: [PATCH v3 2/4] ARM: dts: stm32: add LTDC pinctrl on STM32MP13x SoC family Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20240223-ltdc_mp13-v3-2-7f92a59ca11f@foss.st.com> References: <20240223-ltdc_mp13-v3-0-7f92a59ca11f@foss.st.com> In-Reply-To: <20240223-ltdc_mp13-v3-0-7f92a59ca11f@foss.st.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Neil Armstrong , Jessica Zhang , Sam Ravnborg , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter CC: , , , , , Raphael Gallais-Pou X-Mailer: b4 0.12.4 X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-22_15,2024-02-23_01,2023-05-22_02 Adds LTDC pinctrl support and assigns dedicated GPIO pins. Signed-off-by: Raphael Gallais-Pou --- arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi | 57 +++++++++++++++++++++++++= ++++ 1 file changed, 57 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi b/arch/arm/boot/dt= s/st/stm32mp13-pinctrl.dtsi index 27e0c3826789..32c5d8a1e06a 100644 --- a/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi @@ -47,6 +47,63 @@ pins { }; }; =20 + ltdc_pins_a: ltdc-0 { + pins { + pinmux =3D , /* LCD_CLK */ + , /* LCD_HSYNC */ + , /* LCD_VSYNC */ + , /* LCD_DE */ + , /* LCD_R2 */ + , /* LCD_R3 */ + , /* LCD_R4 */ + , /* LCD_R5 */ + , /* LCD_R6 */ + , /* LCD_R7 */ + , /* LCD_G2 */ + , /* LCD_G3 */ + , /* LCD_G4 */ + , /* LCD_G5 */ + , /* LCD_G6 */ + , /* LCD_G7 */ + , /* LCD_B2 */ + , /* LCD_B3 */ + , /* LCD_B4 */ + , /* LCD_B5 */ + , /* LCD_B6 */ + ; /* LCD_B7 */ + bias-disable; + drive-push-pull; + slew-rate =3D <0>; + }; + }; + + ltdc_sleep_pins_a: ltdc-sleep-0 { + pins { + pinmux =3D , /* LCD_CLK */ + , /* LCD_HSYNC */ + , /* LCD_VSYNC */ + , /* LCD_DE */ + , /* LCD_R2 */ + , /* LCD_R3 */ + , /* LCD_R4 */ + , /* LCD_R5 */ + , /* LCD_R6 */ + , /* LCD_R7 */ + , /* LCD_G2 */ + , /* LCD_G3 */ + , /* LCD_G4 */ + , /* LCD_G5 */ + , /* LCD_G6 */ + , /* LCD_G7 */ + , /* LCD_B2 */ + , /* LCD_B3 */ + , /* LCD_B4 */ + , /* LCD_B5 */ + , /* LCD_B6 */ + ; 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Fri, 23 Feb 2024 13:36:54 +0100 (CET) Received: from localhost (10.129.178.151) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Fri, 23 Feb 2024 13:36:54 +0100 From: Raphael Gallais-Pou Date: Fri, 23 Feb 2024 13:36:50 +0100 Subject: [PATCH v3 3/4] ARM: dts: stm32: enable display support on stm32mp135f-dk board Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20240223-ltdc_mp13-v3-3-7f92a59ca11f@foss.st.com> References: <20240223-ltdc_mp13-v3-0-7f92a59ca11f@foss.st.com> In-Reply-To: <20240223-ltdc_mp13-v3-0-7f92a59ca11f@foss.st.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Neil Armstrong , Jessica Zhang , Sam Ravnborg , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter CC: , , , , , Raphael Gallais-Pou X-Mailer: b4 0.12.4 X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-22_15,2024-02-23_01,2023-05-22_02 Link panel and display controller. Enable panel, backlight and display controller. Signed-off-by: Raphael Gallais-Pou --- Changes in v2: - Fixed dtbs_check warnings : arch/arm/boot/dts/st/stm32mp135f-dk.dtb: panel-backlight: 'default-brightne= ss-level' does not match any of the regexes: 'pinctrl-[0-9]+' =E2=80=83=E2=80=83from schema $id: http://devicetree.org/schemas/leds/backl= ight/gpio-backlight.yaml# arch/arm/boot/dts/st/stm32mp135f-dk.dtb: panel-rgb: data-mapping:0: 'bgr666= ' is not one of ['jeida-18', 'jeida-24', 'vesa-24'] =E2=80=83=E2=80=83from schema $id: http://devicetree.org/schemas/display/pa= nel/panel-simple.yaml# arch/arm/boot/dts/st/stm32mp135f-dk.dtb: panel-rgb: compatible: ['rocktech,= rk043fn48h', 'panel-dpi'] is too long =E2=80=83=E2=80=83from schema $id: http://devicetree.org/schemas/display/pa= nel/panel-simple.yaml# arch/arm/boot/dts/st/stm32mp135f-dk.dtb: panel-rgb: data-mapping: False sch= ema does not allow ['bgr666'] =E2=80=83=E2=80=83from schema $id: http://devicetree.org/schemas/display/pa= nel/panel-simple.yaml# --- arch/arm/boot/dts/st/stm32mp135f-dk.dts | 53 +++++++++++++++++++++++++++++= ++++ 1 file changed, 53 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32mp135f-dk.dts b/arch/arm/boot/dts/st= /stm32mp135f-dk.dts index eea740d097c7..c918f332cbfd 100644 --- a/arch/arm/boot/dts/st/stm32mp135f-dk.dts +++ b/arch/arm/boot/dts/st/stm32mp135f-dk.dts @@ -66,6 +66,46 @@ led-blue { default-state =3D "off"; }; }; + + panel_backlight: panel-backlight { + compatible =3D "gpio-backlight"; + gpios =3D <&gpioe 12 GPIO_ACTIVE_HIGH>; + default-on; + status =3D "okay"; + }; + + panel_rgb: panel-rgb { + compatible =3D "rocktech,rk043fn48h"; + enable-gpios =3D <&gpioi 7 GPIO_ACTIVE_HIGH>; + backlight =3D <&panel_backlight>; + power-supply =3D <&scmi_v3v3_sw>; + status =3D "okay"; + + width-mm =3D <105>; + height-mm =3D <67>; + + panel-timing { + clock-frequency =3D <10000000>; + hactive =3D <480>; + hback-porch =3D <43>; + hfront-porch =3D <10>; + hsync-len =3D <1>; + hsync-active =3D <0>; + vactive =3D <272>; + vback-porch =3D <26>; + vfront-porch =3D <4>; + vsync-len =3D <10>; + vsync-active =3D <0>; + de-active =3D <1>; + pixelclk-active =3D <1>; + }; + + port { + panel_in_rgb: endpoint { + remote-endpoint =3D <<dc_out_rgb>; + }; + }; + }; }; =20 &adc_1 { @@ -160,6 +200,19 @@ &iwdg2 { status =3D "okay"; }; =20 +<dc { + pinctrl-names =3D "default", "sleep"; + pinctrl-0 =3D <<dc_pins_a>; + pinctrl-1 =3D <<dc_sleep_pins_a>; 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Fri, 23 Feb 2024 13:38:05 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id A7BC428DDC3; Fri, 23 Feb 2024 13:36:54 +0100 (CET) Received: from localhost (10.129.178.151) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Fri, 23 Feb 2024 13:36:54 +0100 From: Raphael Gallais-Pou Date: Fri, 23 Feb 2024 13:36:51 +0100 Subject: [PATCH v3 4/4] dt-bindings: display: simple: allow panel-common properties Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20240223-ltdc_mp13-v3-4-7f92a59ca11f@foss.st.com> References: <20240223-ltdc_mp13-v3-0-7f92a59ca11f@foss.st.com> In-Reply-To: <20240223-ltdc_mp13-v3-0-7f92a59ca11f@foss.st.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Neil Armstrong , Jessica Zhang , Sam Ravnborg , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter CC: , , , , , Raphael Gallais-Pou X-Mailer: b4 0.12.4 X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-22_15,2024-02-23_01,2023-05-22_02 This device inherits properties from panel-common. Those should be allowed to use, instead of specifying properties to true for each specific use. Signed-off-by: Raphael Gallais-Pou Reviewed-by: Krzysztof Kozlowski --- Changes in v3: - Allow every properties instead of adding each properties to true as Rob suggested - Rewrite commit log to match changes Changes in v2: - Added this patch Fixes following warnings: arch/arm/boot/dts/st/stm32mp135f-dk.dtb: panel-rgb: 'height-mm', 'panel-tim= ing', 'width-mm' do not match any of the regexes: 'pinctrl-[0-9]+' from schema $id: http://devicetree.org/schemas/display/panel/panel-simple.= yaml# --- .../devicetree/bindings/display/panel/panel-simple.yaml | 11 +------= ---- 1 file changed, 1 insertion(+), 10 deletions(-) diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.y= aml b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml index 634a10c6f2dd..01c9153da3d3 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml @@ -344,15 +344,6 @@ properties: # Yes Optoelectronics YTC700TLAG-05-201C 7" TFT LCD panel - yes-optoelectronics,ytc700tlag-05-201c =20 - backlight: true - ddc-i2c-bus: true - enable-gpios: true - port: true - power-supply: true - no-hpd: true - hpd-gpios: true - data-mapping: true - if: not: properties: @@ -363,7 +354,7 @@ then: properties: data-mapping: false =20 -additionalProperties: false +unevaluatedProperties: false =20 required: - compatible --=20 2.25.1