From nobody Tue Feb 10 01:15:01 2026 Received: from mail-sh.amlogic.com (mail-sh.amlogic.com [58.32.228.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AE2AB17C7C; Thu, 22 Feb 2024 08:02:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=58.32.228.43 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708588952; cv=none; b=MdtXaVli1spfAnwGhwd1iXrSPjwt3fBMq0k5Qn8nCZu6rlysyFOvfzKU+jw7pEfvxiEbaFt4kDrDqpspamyGfhO3XhO1FUcTQBI4O6JHJ53AhwpoP8qBmQO/FkNfnF6MQuue5ksKlwfb1UxK6+gRGe2unpqnvgKizYZjub7CFkQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708588952; c=relaxed/simple; bh=qIygGq4laBZ5hKLDwCrWRP0SAoByZ0qSN3CFLnDgXWQ=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=gYm8xZP3nW+i1yVrH/sKWhPlXlH1c1DEEe39kxewaRBn62fiM1z3RpLfT3Wwl763wB1rhg+Qar9KB8FUxx82mBapCfDQ0iQEzyR1ezCad/tmpHu2FrD1Pt/lHMhCKvUd4SWuStZDzJ8ReV9tFO7dCc7KoFXP/2dA6yNFs+q6lMo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amlogic.com; spf=pass smtp.mailfrom=amlogic.com; arc=none smtp.client-ip=58.32.228.43 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amlogic.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amlogic.com Received: from rd02-sz.amlogic.software (10.28.11.83) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2507.6; Thu, 22 Feb 2024 15:47:18 +0800 From: Huqiang Qin To: , , , , , , , , CC: , , , , Huqiang Qin Subject: [RESEND PATCH 2/3] irqchip: Add support for Amlogic-T7 SoCs Date: Thu, 22 Feb 2024 15:46:38 +0800 Message-ID: <20240222074640.1866284-3-huqiang.qin@amlogic.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20240222074640.1866284-1-huqiang.qin@amlogic.com> References: <20240222074640.1866284-1-huqiang.qin@amlogic.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Amlogic-T7 SoCs support 12 GPIO IRQ lines compared with previous serial chips and have something different, details are as below. IRQ Number: - 156 1 pin on bank TESTN - 155:148 8 pins on bank H - 147:129 19 pins on bank Y - 128:115 14 pins on bank M - 114:91 24 pins on bank T - 90:77 14 pins on bank Z - 76:70 7 pins on bank E - 69:57 13 pins on bank D - 56:40 17 pins on bank W - 39:20 20 pins on bank X - 19:13 7 pins on bank C - 12:0 13 pins on bank B Signed-off-by: Huqiang Qin Reviewed-by: Neil Armstrong --- drivers/irqchip/irq-meson-gpio.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/irqchip/irq-meson-gpio.c b/drivers/irqchip/irq-meson-g= pio.c index f88df39f4129..9a1791908598 100644 --- a/drivers/irqchip/irq-meson-gpio.c +++ b/drivers/irqchip/irq-meson-gpio.c @@ -154,6 +154,10 @@ static const struct meson_gpio_irq_params c3_params = =3D { INIT_MESON_S4_COMMON_DATA(55) }; =20 +static const struct meson_gpio_irq_params t7_params =3D { + INIT_MESON_S4_COMMON_DATA(157) +}; + static const struct of_device_id meson_irq_gpio_matches[] __maybe_unused = =3D { { .compatible =3D "amlogic,meson8-gpio-intc", .data =3D &meson8_params }, { .compatible =3D "amlogic,meson8b-gpio-intc", .data =3D &meson8b_params = }, @@ -165,6 +169,7 @@ static const struct of_device_id meson_irq_gpio_matches= [] __maybe_unused =3D { { .compatible =3D "amlogic,meson-a1-gpio-intc", .data =3D &a1_params }, { .compatible =3D "amlogic,meson-s4-gpio-intc", .data =3D &s4_params }, { .compatible =3D "amlogic,c3-gpio-intc", .data =3D &c3_params }, + { .compatible =3D "amlogic,t7-gpio-intc", .data =3D &t7_params }, { } }; =20 --=20 2.42.0