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AJvYcCVgCTbA6gUmf9qRtXlNndh22srlATtPNVI0UVzQHqkwb494wsMNAXn374LuzMnNq5czSpUbmEcdWrCxihgrKvPY6SsGkczFvYhlOvYi X-Gm-Message-State: AOJu0YyOCG9PM0j2TlMUjhcMgjACqVRkkG5AGJW/4mtmB9qt03kieGPR Vn5vX+KT73bK4m/zp1q60T9NkWIMu2V4WCtmztXBhapVdvg5+Gpc5QwLiS/llV8= X-Google-Smtp-Source: AGHT+IFHK5RUyvMii5QlAptAoirJ/ZuRW0A/bZtMk+rPS/m+OG49B3S5mOnnqlLYEWjyb8TnkNBU9Q== X-Received: by 2002:a17:903:182:b0:1dc:25c:f67d with SMTP id z2-20020a170903018200b001dc025cf67dmr2750921plg.54.1708409313859; Mon, 19 Feb 2024 22:08:33 -0800 (PST) Received: from anup-ubuntu-vm.localdomain ([171.76.80.86]) by smtp.gmail.com with ESMTPSA id j6-20020a17090276c600b001db4c89aea5sm5368114plt.158.2024.02.19.22.08.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Feb 2024 22:08:33 -0800 (PST) From: Anup Patel To: Palmer Dabbelt , Paul Walmsley , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Frank Rowand , Conor Dooley Cc: Marc Zyngier , =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= , Atish Patra , Andrew Jones , Sunil V L , Saravana Kannan , Anup Patel , linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Anup Patel Subject: [PATCH v13 08/13] irqchip/riscv-imsic: Add device MSI domain support for PCI devices Date: Tue, 20 Feb 2024 11:37:13 +0530 Message-Id: <20240220060718.823229-9-apatel@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240220060718.823229-1-apatel@ventanamicro.com> References: <20240220060718.823229-1-apatel@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Linux PCI framework supports per-device MSI domains for PCI devices so let us extend the IMSIC driver to allow per-device MSI domains for PCI devices. Signed-off-by: Anup Patel --- drivers/irqchip/Kconfig | 7 +++++ drivers/irqchip/irq-riscv-imsic-platform.c | 36 ++++++++++++++++++++-- 2 files changed, 41 insertions(+), 2 deletions(-) diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index 85f86e31c996..2fc0cb32341a 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -553,6 +553,13 @@ config RISCV_IMSIC select GENERIC_IRQ_MATRIX_ALLOCATOR select GENERIC_MSI_IRQ =20 +config RISCV_IMSIC_PCI + bool + depends on RISCV_IMSIC + depends on PCI + depends on PCI_MSI + default RISCV_IMSIC + config EXYNOS_IRQ_COMBINER bool "Samsung Exynos IRQ combiner support" if COMPILE_TEST depends on (ARCH_EXYNOS && ARM) || COMPILE_TEST diff --git a/drivers/irqchip/irq-riscv-imsic-platform.c b/drivers/irqchip/i= rq-riscv-imsic-platform.c index 7ee44c493dbc..37f47375d5b7 100644 --- a/drivers/irqchip/irq-riscv-imsic-platform.c +++ b/drivers/irqchip/irq-riscv-imsic-platform.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -209,6 +210,28 @@ static const struct irq_domain_ops imsic_base_domain_o= ps =3D { #endif }; =20 +#ifdef CONFIG_RISCV_IMSIC_PCI + +static void imsic_pci_mask_irq(struct irq_data *d) +{ + pci_msi_mask_irq(d); + irq_chip_mask_parent(d); +} + +static void imsic_pci_unmask_irq(struct irq_data *d) +{ + irq_chip_unmask_parent(d); + pci_msi_unmask_irq(d); +} + +#define MATCH_PCI_MSI BIT(DOMAIN_BUS_PCI_MSI) + +#else + +#define MATCH_PCI_MSI 0 + +#endif + static bool imsic_init_dev_msi_info(struct device *dev, struct irq_domain *domain, struct irq_domain *real_parent, @@ -218,6 +241,7 @@ static bool imsic_init_dev_msi_info(struct device *dev, =20 /* MSI parent domain specific settings */ switch (real_parent->bus_token) { + case DOMAIN_BUS_PCI_MSI: case DOMAIN_BUS_NEXUS: if (WARN_ON_ONCE(domain !=3D real_parent)) return false; @@ -232,6 +256,13 @@ static bool imsic_init_dev_msi_info(struct device *dev, =20 /* Is the target supported? */ switch (info->bus_token) { +#ifdef CONFIG_RISCV_IMSIC_PCI + case DOMAIN_BUS_PCI_DEVICE_MSI: + case DOMAIN_BUS_PCI_DEVICE_MSIX: + info->chip->irq_mask =3D imsic_pci_mask_irq; + info->chip->irq_unmask =3D imsic_pci_unmask_irq; + break; +#endif case DOMAIN_BUS_DEVICE_MSI: /* * Per-device MSI should never have any MSI feature bits @@ -271,11 +302,12 @@ static bool imsic_init_dev_msi_info(struct device *de= v, #define MATCH_PLATFORM_MSI BIT(DOMAIN_BUS_PLATFORM_MSI) =20 static const struct msi_parent_ops imsic_msi_parent_ops =3D { - .supported_flags =3D MSI_GENERIC_FLAGS_MASK, + .supported_flags =3D MSI_GENERIC_FLAGS_MASK | + MSI_FLAG_PCI_MSIX, .required_flags =3D MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS, .bus_select_token =3D DOMAIN_BUS_NEXUS, - .bus_select_mask =3D MATCH_PLATFORM_MSI, + .bus_select_mask =3D MATCH_PCI_MSI | MATCH_PLATFORM_MSI, .init_dev_msi_info =3D imsic_init_dev_msi_info, }; =20 --=20 2.34.1