From nobody Thu Oct 9 11:05:47 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8B8F42F1982; Wed, 18 Jun 2025 15:50:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750261850; cv=none; b=SLomo+Deqbklr/fyVj+2g6mYciUQVgnBLbjvN2ujVkeqFzoCfqPSTGGwvcWrkTXiVCKCkipJ8Nf+myHPTTmzqfmLNEG5mmuYHaVpKsl7SXhGQJULOebOCdFRlliSuwYqwtY51SO8HS38kdgjKgZgaoLOX7kpoD6HDpMFR0gapL8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750261850; c=relaxed/simple; bh=rZujrf8cJQS+I89btYoSUMkKofWIINtOzhrn5MbArYQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=EFnCdHk/6AyQOCPE1xuUjNnIGO5uXh2BoDTdGVF03uFD7UuCi0mBgn8F6aqjZxQn1Rrzbv9CPQKmY/jWTBr77g+AlzJaNgA3NtCxSQROptNwUJvO9V8x3qpOt3HcdwzkE42PyPHMC4Y+/6AthE7BLvJA8VAUGHs3l1H2f+7gzyM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=TqtK1aCE; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="TqtK1aCE" Received: by smtp.kernel.org (Postfix) with ESMTPS id 0005AC4CEFC; Wed, 18 Jun 2025 15:50:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1750261850; bh=rZujrf8cJQS+I89btYoSUMkKofWIINtOzhrn5MbArYQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=TqtK1aCE4tV9SmBCEd+oJZ0P0+f7cgth2F2mBswKO+Ob5zK2957jPgAKhi5G+br3c 3JF/x3w1OJECjIGQVcB32GR48y3pQogPGTBMfvyfZ4qGe9rF8uxUSnm7pTRN0cQHlx vZPM3Q3ift0ruO/6e6TDit6hjpnFXlbJ0DdnksEE8ZDdGDCsbFyajiehTyv5nNEZfm XR7uHRgOaVfuM6/SMTUHq4sTGeuD58dE2AzOD6u7sJfDPfnKJQDYNLP+ZfGiFCZzJD EgxRvUA6Ap3K3CDkwnvhhnfJUdtVAcopTiPROrXokGRzpm07LcuFQrnJFJe2ikgm2p S4aeGP5XaNfRA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id E8435C7115A; Wed, 18 Jun 2025 15:50:49 +0000 (UTC) From: Michael Riesch via B4 Relay Date: Wed, 18 Jun 2025 17:38:08 +0200 Subject: [PATCH v9 13/13] arm64: dts: rockchip: enable vicap dvp on wolfvision pf5 io expander Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240220-rk3568-vicap-v9-13-ace1e5cc4a82@collabora.com> References: <20240220-rk3568-vicap-v9-0-ace1e5cc4a82@collabora.com> In-Reply-To: <20240220-rk3568-vicap-v9-0-ace1e5cc4a82@collabora.com> To: Mehdi Djait , Maxime Chevallier , =?utf-8?q?Th=C3=A9o_Lebrun?= , Thomas Petazzoni , Gerald Loacker , Bryan O'Donoghue , Markus Elfring , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Nicolas Dufresne , Sebastian Reichel , Collabora Kernel Team , Paul Kocialkowski , Alexander Shiyan , Val Packett , Rob Herring , Philipp Zabel , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, Michael Riesch , Michael Riesch X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1750261092; l=1661; i=michael.riesch@collabora.com; s=20250410; h=from:subject:message-id; bh=tkvGHWW1RXCremqXv1+qTo26zNWU0UHQFUaztf+p/DI=; b=XqyCIQ3Brf1VeGWUXB+ZXIaeF0HDCkqFjyzkAVTcbxsYQT6o+KVZ7DSahoLdPWniN9fuO2SrZ aAma1XwO2PBBwfkRWmUvBr2IFBmfUSJ6KrDj5usbF8U0wbYcjf3xD5N X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=+MWX1fffLFZtTPG/I6XdYm/+OSvpRE8D9evQaWbiN04= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20250410 with auth_id=371 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch The Digital Video Port (DVP, the 16-bit variant) of the RK3568 VICAP is broken out to the PF5 mainboard expansion header. Enable it in the device tree overlay for the WolfVision PF5 IO Expander board. Signed-off-by: Michael Riesch Reviewed-by: Gerald Loacker Tested-by: Gerald Loacker Signed-off-by: Michael Riesch --- .../rockchip/rk3568-wolfvision-pf5-io-expander.dtso | 20 ++++++++++++++++= ++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5-io-expander= .dtso b/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5-io-expander.dtso index 048933de2943..8cfce71dd318 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5-io-expander.dtso +++ b/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5-io-expander.dtso @@ -11,6 +11,7 @@ #include #include #include +#include #include =20 &{/} { @@ -134,3 +135,22 @@ &usb2phy0_host { phy-supply =3D <&usb_host_vbus>; status =3D "okay"; }; + +&vicap { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&cif_clk &cif_dvp_clk &cif_dvp_bus16>; + status =3D "okay"; +}; + +&vicap_dvp { + vicap_dvp_input: endpoint { + bus-type =3D ; + bus-width =3D <16>; + pclk-sample =3D ; + rockchip,dvp-clk-delay =3D <10>; + }; +}; + +&vicap_mmu { + status =3D "okay"; +}; --=20 2.39.5