From nobody Tue Feb 10 00:38:46 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B3C8631A058; Fri, 24 Oct 2025 12:51:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761310296; cv=none; b=VhEBfy2Q7rrzVVdv8LTwpq87dVJ6OSEa8zPpb+g+MzTzvCUJIzTn3hAO6/XtdH7/LZJn5evUxH1vvPsY7IQdcNrVWj8Lh9/x0Ve1IH2XyI7TdniQn9oZ9jWqsKfit+ISPimHHWhzGTXEJwJ1uBdx0v1Jcw+Bmd1rkJlZK7m1IEk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761310296; c=relaxed/simple; bh=5jMhPOFCNh+bx6rcs2JfpId+D7wtqdIp5IqyLTpouls=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=fMF+KQTrWvbxAG+QOUEme1ahQWXbzGLi4viAfMODYEtELEVnQ+hGNZttad5FnzHlpAzZs8D15dVQ8Gz3ksejuS3whumWcnZhulolCDu5PR0mCL2kKrbOxjcqMR+0N/J1fh14BYJBqUC4mqbwifZdUKV3+6wv1pTyiAuBQGCyrOc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=k3mDj1xX; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="k3mDj1xX" Received: by smtp.kernel.org (Postfix) with ESMTPS id 28E94C2BC86; Fri, 24 Oct 2025 12:51:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1761310296; bh=5jMhPOFCNh+bx6rcs2JfpId+D7wtqdIp5IqyLTpouls=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=k3mDj1xXCZc7vLdBHzjp27zvITFdxtWudhVNvievX6iD8FfGiA6abDqHVEm5GV+Bn seBKCt9ycSLEEhGNRu0BLYKT/BaDFKnpXIeiw7UN4UuviLkNEYoFbndJH2s0EKU6Cn GJ7Wlc2xg3uBFEIIw7LGTNmyf/oe9VB6+MJ7NlSPxPDGV/3EFbye8Z1hMN6Ex59be+ ZyJRgxGzyiDyNG/Rxuy9YrM/NJ5bEX7l4W5+atgHoMvmVq41PoV5nA8nfo5Eqw88d4 93zcTttyq/wVaJ8k22G4dbibiaaVSGVZQTt63xUz0V2GhCo0o9rmP6BhX/Q7l+uVJE JyUzqmvSE+u5A== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1D5A3CCF9E9; Fri, 24 Oct 2025 12:51:36 +0000 (UTC) From: Michael Riesch via B4 Relay Date: Fri, 24 Oct 2025 14:51:33 +0200 Subject: [PATCH v14 04/18] media: dt-bindings: add rockchip rk3568 vicap Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240220-rk3568-vicap-v14-4-b38b6da0fc80@collabora.com> References: <20240220-rk3568-vicap-v14-0-b38b6da0fc80@collabora.com> In-Reply-To: <20240220-rk3568-vicap-v14-0-b38b6da0fc80@collabora.com> To: Mehdi Djait , Maxime Chevallier , =?utf-8?q?Th=C3=A9o_Lebrun?= , Thomas Petazzoni , Gerald Loacker , Bryan O'Donoghue , Markus Elfring , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Nicolas Dufresne , Sebastian Reichel , Collabora Kernel Team , Paul Kocialkowski , Alexander Shiyan , Val Packett , Rob Herring , Philipp Zabel , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, Michael Riesch , Michael Riesch , Krzysztof Kozlowski X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1761310293; l=6341; i=michael.riesch@collabora.com; s=20250410; h=from:subject:message-id; bh=LW3UJeqb8oUu3lTZ3tCGmFbuCQoOXXOLwRXUfJz2nxY=; b=lszOXDVGhoqvruBOZcHoLRgwzoRO9RgHUL4U8XV0jRBamiPGNMeV46+evO9wicyjeWnWAuEER tTJCCnlN41ODUZWsZ2J2fX5hfEJB7nKGqPbEaKzu8gDzKqYMbGtFqBl X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=+MWX1fffLFZtTPG/I6XdYm/+OSvpRE8D9evQaWbiN04= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20250410 with auth_id=371 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch Add documentation for the Rockchip RK3568 Video Capture (VICAP) unit. Signed-off-by: Michael Riesch Reviewed-by: Krzysztof Kozlowski Reviewed-by: Bryan O'Donoghue Signed-off-by: Michael Riesch --- .../bindings/media/rockchip,rk3568-vicap.yaml | 172 +++++++++++++++++= ++++ MAINTAINERS | 1 + 2 files changed, 173 insertions(+) diff --git a/Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.= yaml b/Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.yaml new file mode 100644 index 000000000000..18cd0a5a5318 --- /dev/null +++ b/Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.yaml @@ -0,0 +1,172 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/rockchip,rk3568-vicap.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip RK3568 Video Capture (VICAP) + +maintainers: + - Michael Riesch + +description: + The Rockchip RK3568 Video Capture (VICAP) block features a digital video + port (DVP, a parallel video interface) and a MIPI CSI-2 port. It receives + the data from camera sensors, video decoders, or other companion ICs and + transfers it into system main memory by AXI bus. + +properties: + compatible: + const: rockchip,rk3568-vicap + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: ACLK + - description: HCLK + - description: DCLK + - description: ICLK + + clock-names: + items: + - const: aclk + - const: hclk + - const: dclk + - const: iclk + + iommus: + maxItems: 1 + + resets: + items: + - description: ARST + - description: HRST + - description: DRST + - description: PRST + - description: IRST + + reset-names: + items: + - const: arst + - const: hrst + - const: drst + - const: prst + - const: irst + + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: Phandle to general register file used for video input blo= ck control. + + power-domains: + maxItems: 1 + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: The digital video port (DVP, a parallel video interfa= ce). + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + bus-type: + enum: + - 5 # MEDIA_BUS_TYPE_PARALLEL + - 6 # MEDIA_BUS_TYPE_BT656 + + rockchip,dvp-clk-delay: + $ref: /schemas/types.yaml#/definitions/uint32 + default: 0 + minimum: 0 + maximum: 127 + description: + Delay the DVP path clock input to align the sampling pha= se, + only valid in dual edge sampling mode. Delay is zero by + default and can be adjusted optionally. + + required: + - bus-type + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: Port connected to the MIPI CSI-2 receiver output. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + +required: + - compatible + - reg + - interrupts + - clocks + - ports + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + #include + + soc { + #address-cells =3D <2>; + #size-cells =3D <2>; + + vicap: video-capture@fdfe0000 { + compatible =3D "rockchip,rk3568-vicap"; + reg =3D <0x0 0xfdfe0000 0x0 0x200>; + interrupts =3D ; + assigned-clocks =3D <&cru DCLK_VICAP>; + assigned-clock-rates =3D <300000000>; + clocks =3D <&cru ACLK_VICAP>, <&cru HCLK_VICAP>, + <&cru DCLK_VICAP>, <&cru ICLK_VICAP_G>; + clock-names =3D "aclk", "hclk", "dclk", "iclk"; + iommus =3D <&vicap_mmu>; + power-domains =3D <&power RK3568_PD_VI>; + resets =3D <&cru SRST_A_VICAP>, <&cru SRST_H_VICAP>, + <&cru SRST_D_VICAP>, <&cru SRST_P_VICAP>, + <&cru SRST_I_VICAP>; + reset-names =3D "arst", "hrst", "drst", "prst", "irst"; + rockchip,grf =3D <&grf>; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + vicap_dvp: port@0 { + reg =3D <0>; + + vicap_dvp_input: endpoint { + bus-type =3D ; + bus-width =3D <16>; + pclk-sample =3D ; + remote-endpoint =3D <&it6801_output>; + }; + }; + + vicap_mipi: port@1 { + reg =3D <1>; + + vicap_mipi_input: endpoint { + remote-endpoint =3D <&csi_output>; + }; + }; + }; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 193b96309cfc..758860b5bb61 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -22216,6 +22216,7 @@ L: linux-media@vger.kernel.org S: Maintained F: Documentation/admin-guide/media/rkcif* F: Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml +F: Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.yaml =20 ROCKCHIP CRYPTO DRIVERS M: Corentin Labbe --=20 2.39.5