From nobody Tue Feb 10 12:57:12 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1DE6331B107; Fri, 24 Oct 2025 12:51:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761310297; cv=none; b=rqyZ0GdeaJjNzpjEyGLyXaozwqVsJb5Al7dsS1Lm5vzhZu7rr10tuVmnGdrD4nAU5aRIPDYvidgM3Jmn/cj4354WBiDzRsVRUZpPQ4M/VxmjAq7CiJXbE8n8D8I9+oAXlzTgzUxv87L8KxsqqCYNYIUVgonsN/rZdGcCTnrahHw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761310297; c=relaxed/simple; bh=Tz6jnD4R99+sBwzNPFxbH438Jp+SLdj3TJqQrSpfSJg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=RtS9/PWDFng5ZuCeB9zOLBz+kacW3L//ToXP6nirP1DAxMCQEHo6FJldZNYaE+RdKMjqcsN0+mNSgY93t0zQR8LBsJZYZbBMJoJaW+tIml68si+drVv0VMe5nTD+yPko5SEDWnTaY+NwWb1B65i9cC2ZtZqU8WZJH5t6IDTxh4o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=d9R1D65G; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="d9R1D65G" Received: by smtp.kernel.org (Postfix) with ESMTPS id E90F4C113D0; Fri, 24 Oct 2025 12:51:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1761310297; bh=Tz6jnD4R99+sBwzNPFxbH438Jp+SLdj3TJqQrSpfSJg=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=d9R1D65GMo29MLFSvaWbRD/jdJig9/lEQnGj8LaWJd8ghLzH5fJMIgcjAUFlR2SMx 15vEUeOTMxLjwMZuPxJ/vJPnSdahLOCmxpyMEwisfjUIq6nXKop2JMht/Z+FAs8ZeL pTp5pzl1ctIlNqT6wuBAxFK5K83Agt/useC88KsrPeMYAsBuJwmoM7tCtVumlJABxA XjEcAwy52796dRT8bDkpFIyZwnyvTb/MeCvMOxm/qZah4odATGxljxedL69oUT2LaI sp+gmrtys1GSEwf2Hw7RImD7HJuVWHrl9fGVOu2GrOXM8dI20ZL/YaR8moIBW/r8zn Kx5l0zhddaSug== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id DBFAFCCF9E0; Fri, 24 Oct 2025 12:51:36 +0000 (UTC) From: Michael Riesch via B4 Relay Date: Fri, 24 Oct 2025 14:51:43 +0200 Subject: [PATCH v14 14/18] arm64: dts: rockchip: add the vip node to px30 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240220-rk3568-vicap-v14-14-b38b6da0fc80@collabora.com> References: <20240220-rk3568-vicap-v14-0-b38b6da0fc80@collabora.com> In-Reply-To: <20240220-rk3568-vicap-v14-0-b38b6da0fc80@collabora.com> To: Mehdi Djait , Maxime Chevallier , =?utf-8?q?Th=C3=A9o_Lebrun?= , Thomas Petazzoni , Gerald Loacker , Bryan O'Donoghue , Markus Elfring , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Nicolas Dufresne , Sebastian Reichel , Collabora Kernel Team , Paul Kocialkowski , Alexander Shiyan , Val Packett , Rob Herring , Philipp Zabel , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, Michael Riesch , Michael Riesch , Mehdi Djait X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1761310293; l=1332; i=michael.riesch@collabora.com; s=20250410; h=from:subject:message-id; bh=EwZeXY5MIObNAjpIDbc8b4sEOVnnQIy6dupHuKvt3ds=; b=v3qYu0fYp8wQ8McNY2oZdU5qSy/y5tUgNyNK6of/Pm5fjyx8st22NW+obtdlgikLXZg/a58Mh k0H1v61hGbKCX1e5F6XDBWw+jGyjJP2dnqk5UrNWiI2r5wAiY5tTN02 X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=+MWX1fffLFZtTPG/I6XdYm/+OSvpRE8D9evQaWbiN04= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20250410 with auth_id=371 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Mehdi Djait Add the device tree node for the PX30 Video Input Processor (VIP). Signed-off-by: Mehdi Djait [added cosmetic changes] Signed-off-by: Michael Riesch Reviewed-by: Bryan O'Donoghue Signed-off-by: Michael Riesch --- arch/arm64/boot/dts/rockchip/px30.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/r= ockchip/px30.dtsi index 46f64cd33b9b..ef52879d6a73 100644 --- a/arch/arm64/boot/dts/rockchip/px30.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi @@ -1280,6 +1280,18 @@ isp_mmu: iommu@ff4a8000 { #iommu-cells =3D <0>; }; =20 + cif: video-capture@ff490000 { + compatible =3D "rockchip,px30-vip"; + reg =3D <0x0 0xff490000 0x0 0x200>; + interrupts =3D ; + clocks =3D <&cru ACLK_CIF>, <&cru HCLK_CIF>, <&cru PCLK_CIF>; + clock-names =3D "aclk", "hclk", "pclk"; + power-domains =3D <&power PX30_PD_VI>; + resets =3D <&cru SRST_CIF_A>, <&cru SRST_CIF_H>, <&cru SRST_CIF_PCLKIN>; + reset-names =3D "axi", "ahb", "pclkin"; + status =3D "disabled"; + }; + qos_gmac: qos@ff518000 { compatible =3D "rockchip,px30-qos", "syscon"; reg =3D <0x0 0xff518000 0x0 0x20>; --=20 2.39.5