From nobody Tue Feb 10 05:48:30 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 02DD82DCBF1; Wed, 15 Oct 2025 14:56:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760540189; cv=none; b=XvsS31sD90murZvE2VXS50myK0lzLtfBkB3cCF+uGnO6sPRqWtj2XMlbuPGaz/nIumJZGHTGlq/twNN1TFU+0vmJar3ZU4WjfV3iGAk3a9ZzOcPTstkWtpaJymSLlzGXk2DIvD17DjKwByiDVAtbX4sHbYEMs/oEc+E67hKy/Lk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760540189; c=relaxed/simple; bh=Zl4Mel46TcR7AjpUnvtEjIgKxbaBwJflcYSmq34rCyA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Qvi4viTZwJluHFQpbvV+2TkFvyzmw07UmHdArysiVFHOZ5Xq/KJPW+UdZ1iVpfJLxr3kHuwsnx71TR3lJueuVVuagmbSNnnpBMlpvKTrdJyPFnywC4jPD4qiRxt+JJpyaByj4Z2GtcMPsmp7FoTnGx8FgUA/6suo/esaHtRoYnE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=sIl5nM2b; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="sIl5nM2b" Received: by smtp.kernel.org (Postfix) with ESMTPS id B5306C4DDE2; Wed, 15 Oct 2025 14:56:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1760540188; bh=Zl4Mel46TcR7AjpUnvtEjIgKxbaBwJflcYSmq34rCyA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=sIl5nM2bvFE3k9vXW/3Utnz7ESxpyUbR46hQbDfckOVVmAg/pbXEgVzqXWrQmeoHJ I2eBT9Rl3R+X9BOyDrmG09YV6z3r53bJxIMV7JuasgBXd//HM4EbbJUP64zOmJ9QPo O6+DEsHmoG8JChZoDevBBnVuRTxEmV/OL5+L63Iz7Gjtak/Sa8+sIM3UrMv/LhpgfC vnPF7g6YSxolildhwmox6mv0v8vkMmowl+uBkxUxOceWWu7CPzoAhYf5aXYncKIBIA xFeroin9g0Uo/RaNH2vkr/t8SyClag/Sk1hL53Q0uZiyb5nUhp2UKk/SjvIuL+Qj5P 0yMpGewiGQg6w== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 96C4ECCD185; Wed, 15 Oct 2025 14:56:28 +0000 (UTC) From: Michael Riesch via B4 Relay Date: Wed, 15 Oct 2025 16:56:40 +0200 Subject: [PATCH v13 17/18] arm64: dts: rockchip: enable vicap dvp on wolfvision pf5 io expander Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240220-rk3568-vicap-v13-17-da164b4918fe@collabora.com> References: <20240220-rk3568-vicap-v13-0-da164b4918fe@collabora.com> In-Reply-To: <20240220-rk3568-vicap-v13-0-da164b4918fe@collabora.com> To: Mehdi Djait , Maxime Chevallier , =?utf-8?q?Th=C3=A9o_Lebrun?= , Thomas Petazzoni , Gerald Loacker , Bryan O'Donoghue , Markus Elfring , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Nicolas Dufresne , Sebastian Reichel , Collabora Kernel Team , Paul Kocialkowski , Alexander Shiyan , Val Packett , Rob Herring , Philipp Zabel , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, Michael Riesch , Michael Riesch X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1760540185; l=1721; i=michael.riesch@collabora.com; s=20250410; h=from:subject:message-id; bh=0H9SWagLsWuudSJ0hjW87B9xG48FbT9CuvPeqAKM5fI=; b=kDk1Dhq5Tb8DcEUcG68xEmaT925yDwQqPcyUnRYnByNUmniDP/B7UvfljdgxxGUNZPieFnqzi RlrsZ60wFwmBIM1je3xM2ekkUD4yNA6Set5FXM2yh8aNLyiLDM+UBll X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=+MWX1fffLFZtTPG/I6XdYm/+OSvpRE8D9evQaWbiN04= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20250410 with auth_id=371 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch The Digital Video Port (DVP, the 16-bit variant) of the RK3568 VICAP is broken out to the PF5 mainboard expansion header. Enable it in the device tree overlay for the WolfVision PF5 IO Expander board. Signed-off-by: Michael Riesch Reviewed-by: Gerald Loacker Tested-by: Gerald Loacker Reviewed-by: Bryan O'Donoghue Signed-off-by: Michael Riesch --- .../rockchip/rk3568-wolfvision-pf5-io-expander.dtso | 20 ++++++++++++++++= ++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5-io-expander= .dtso b/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5-io-expander.dtso index 048933de2943..8cfce71dd318 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5-io-expander.dtso +++ b/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5-io-expander.dtso @@ -11,6 +11,7 @@ #include #include #include +#include #include =20 &{/} { @@ -134,3 +135,22 @@ &usb2phy0_host { phy-supply =3D <&usb_host_vbus>; status =3D "okay"; }; + +&vicap { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&cif_clk &cif_dvp_clk &cif_dvp_bus16>; + status =3D "okay"; +}; + +&vicap_dvp { + vicap_dvp_input: endpoint { + bus-type =3D ; + bus-width =3D <16>; + pclk-sample =3D ; + rockchip,dvp-clk-delay =3D <10>; + }; +}; + +&vicap_mmu { + status =3D "okay"; +}; --=20 2.39.5