From nobody Tue Feb 10 00:00:54 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C5EE5314A80; Tue, 14 Oct 2025 13:02:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760446966; cv=none; b=u9BgqV+gYRHNDHV4u3IFBH6aHC9c1oAcQEHQd0zPa3jaLXZi87H12Z3kO7Qfrq1wntQFZNrTGs4xfHv/LdY4ttGtcqFqKula01EIkZ3Yn06FmKge6lwl/bMVacjMz0i/tPDglt2kGF62nJ/ekfwfP/3aOIOIkTtzZuyfpcvV+gk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760446966; c=relaxed/simple; bh=YADDeCmq5uePnzFDn+9evtVAHH2fPQHvEnKepdXqNFc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=pZE4I9m9Kz/KqCiWZFFLZ5Pi0o2Z3gjIk9aUv3QdW4dg9LkiGLisSo+13sJ4HxckljvUVJ3+JKw4Y/HNh14BVo5QvzE0vHA8HhDg8CywTZxuqPpJuKdNlrt3p3C6pA33UXzmvQK/cxMafUGBsuHlDg0cF9sy4ed8En7vEZsbrFs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=fIkdWmAs; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="fIkdWmAs" Received: by smtp.kernel.org (Postfix) with ESMTPS id 9DCACC113D0; Tue, 14 Oct 2025 13:02:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1760446966; bh=YADDeCmq5uePnzFDn+9evtVAHH2fPQHvEnKepdXqNFc=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=fIkdWmAslne8xy5vQ3qxxdqAyjg0V6QmRdP76Sc6KT+PTuankczjeG6gz0qr0cIrH TWHgCrLQhxEgHqZTVULmgQlECcuhu8FvBstWAsVQL7MObCsYUQImVvi5Dr9AzpxNGS OIqyqzxIBCNESs5nvBuhAn1lHRcJgFONruOlxYjsiR2AEZhSQjAgOOz/FQAR2FMnNF gsTod5XbRFU3H7fU1CSfMoa38wSsUGG357kW63JQoP+ARtKROlTntUhDVnLQJIvl3s RQAMzgQZJN4QQxDSI09G/5bTu6b46mSNW3iwQHYLPTpELoryeTTLNqJBn9F0CXrDkt gxXtp8P23RqPA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 949B4CCD193; Tue, 14 Oct 2025 13:02:46 +0000 (UTC) From: Michael Riesch via B4 Relay Date: Tue, 14 Oct 2025 15:01:59 +0200 Subject: [PATCH v12 13/18] arm64: defconfig: enable rockchip camera interface and mipi csi-2 receiver Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240220-rk3568-vicap-v12-13-c6dbece6bb98@collabora.com> References: <20240220-rk3568-vicap-v12-0-c6dbece6bb98@collabora.com> In-Reply-To: <20240220-rk3568-vicap-v12-0-c6dbece6bb98@collabora.com> To: Mehdi Djait , Maxime Chevallier , =?utf-8?q?Th=C3=A9o_Lebrun?= , Thomas Petazzoni , Gerald Loacker , Bryan O'Donoghue , Markus Elfring , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Nicolas Dufresne , Sebastian Reichel , Collabora Kernel Team , Paul Kocialkowski , Alexander Shiyan , Val Packett , Rob Herring , Philipp Zabel , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, Michael Riesch , Michael Riesch X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1760446963; l=894; i=michael.riesch@collabora.com; s=20250410; h=from:subject:message-id; bh=qagheTrOUgm9PAts7S1syhcsrJaB5GYArNSZ52aSGoY=; b=i2/6TtnjEwY1XwBiRdryuM+1Z73ergSV/uElfYkRbLrWDg6uQatqmbwNuh2xrqwYn2La5I27O wNcfoQWJhAZBgUNN3jnii7uFFnUC4yutN7qCVGHuUh6d1psEoXVcTAx X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=+MWX1fffLFZtTPG/I6XdYm/+OSvpRE8D9evQaWbiN04= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20250410 with auth_id=371 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch The Rockchip Camera Interface (CIF) and the Rockchip MIPI CSI-2 Receiver are featured in many Rockchip SoCs in different variations. Enable the drivers for them in the default configuration. Reviewed-by: Bryan O'Donoghue Signed-off-by: Michael Riesch --- arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index e3a2d37bd104..86e39240979a 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -883,6 +883,8 @@ CONFIG_VIDEO_RENESAS_FCP=3Dm CONFIG_VIDEO_RENESAS_FDP1=3Dm CONFIG_VIDEO_RENESAS_VSP1=3Dm CONFIG_VIDEO_RCAR_DRIF=3Dm +CONFIG_VIDEO_ROCKCHIP_CIF=3Dm +CONFIG_VIDEO_ROCKCHIP_CSI=3Dm CONFIG_VIDEO_ROCKCHIP_RGA=3Dm CONFIG_VIDEO_SAMSUNG_EXYNOS_GSC=3Dm CONFIG_VIDEO_SAMSUNG_S5P_JPEG=3Dm --=20 2.39.5